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Add Xtensa port

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This commit is contained in:
Nick Clifton
2003-04-01 15:50:31 +00:00
parent ce0c72625a
commit e0001a05d2
75 changed files with 28789 additions and 392 deletions
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30
bfd/ChangeLog
View File

@ -1,3 +1,33 @@
2003-04-01 Bob Wilson <bob.wilson@acm.org>
* Makefile.am (ALL_MACHINES): Add cpu-xtensa.lo.
(ALL_MACHINES_CFILES): Add cpu-xtensa.c.
(BFD32_BACKENDS): Add elf32-xtensa.lo, xtensa-isa.lo, and
xtensa-modules.lo.
(BFD32_BACKENDS_CFILES): Add elf32-xtensa.c, xtensa-isa.c, and
xtensa-modules.c.
(cpu-xtensa.lo): New target.
(elf32-xtensa.lo): Likewise.
(xtensa-isa.lo): Likewise.
(xtensa-modules.lo): Likewise.
* Makefile.in: Regenerate.
* archures.c (bfd_architecture): Add bfd_{arch,mach}_xtensa.
(bfd_archures_list): Add bfd_xtensa_arch.
* config.bfd: Handle xtensa-*-*.
* configure.in: Handle bfd_elf32_xtensa_{le,be}_vec.
* configure: Regenerate.
* reloc.c: Add BFD_RELOC_XTENSA_{RTLD,GLOB_DAT,JMP_SLOT,RELATIVE,
PLT,OP0,OP1,OP2,ASM_EXPAND,ASM_SIMPLIFY}.
* targets.c (bfd_elf32_xtensa_be_vec): Declare.
(bfd_elf32_xtensa_le_vec): Likewise.
(bfd_target_vector): Add bfd_elf32_xtensa_{be,le}_vec.
* cpu-xtensa.c: New file.
* elf32-xtensa.c: Likewise.
* xtensa-isa.c: Likewise.
* xtensa-modules.c: Likewise.
* libbfd.h: Regenerate.
* bfd-in2.h: Likewise.
2003-04-01 Nick Clifton <nickc@redhat.com>
* archures.c (bfd_mach_arm_unknown): Define.

20
bfd/Makefile.am
View File

@ -101,6 +101,7 @@ ALL_MACHINES = \
cpu-we32k.lo \
cpu-w65.lo \
cpu-xstormy16.lo \
cpu-xtensa.lo \
cpu-z8k.lo
ALL_MACHINES_CFILES = \
@ -155,6 +156,7 @@ ALL_MACHINES_CFILES = \
cpu-we32k.c \
cpu-w65.c \
cpu-xstormy16.c \
cpu-xtensa.c \
cpu-z8k.c
# The .o files needed by all of the 32 bit vectors that are configured into
@ -249,6 +251,7 @@ BFD32_BACKENDS = \
elf32-v850.lo \
elf32-vax.lo \
elf32-xstormy16.lo \
elf32-xtensa.lo \
elf32.lo \
elflink.lo \
elf-strtab.lo \
@ -317,7 +320,9 @@ BFD32_BACKENDS = \
vms-misc.lo \
vms-tir.lo \
xcofflink.lo \
xsym.lo
xsym.lo \
xtensa-isa.lo \
xtensa-modules.lo
BFD32_BACKENDS_CFILES = \
aout-adobe.c \
@ -408,6 +413,7 @@ BFD32_BACKENDS_CFILES = \
elf32-v850.c \
elf32-vax.c \
elf32-xstormy16.c \
elf32-xtensa.c \
elf32.c \
elflink.c \
elf-strtab.c \
@ -475,7 +481,9 @@ BFD32_BACKENDS_CFILES = \
vms-misc.c \
vms-tir.c \
xcofflink.c \
xsym.c
xsym.c \
xtensa-isa.c \
xtensa-modules.c
# The .o files needed by all of the 64 bit vectors that are configured into
# target_vector in targets.c if configured with --enable-targets=all
@ -957,6 +965,7 @@ cpu-vax.lo: cpu-vax.c $(INCDIR)/filenames.h
cpu-we32k.lo: cpu-we32k.c $(INCDIR)/filenames.h
cpu-w65.lo: cpu-w65.c $(INCDIR)/filenames.h
cpu-xstormy16.lo: cpu-xstormy16.c $(INCDIR)/filenames.h
cpu-xtensa.lo: cpu-xtensa.c $(INCDIR)/filenames.h
cpu-z8k.lo: cpu-z8k.c $(INCDIR)/filenames.h
aout-adobe.lo: aout-adobe.c $(INCDIR)/filenames.h $(INCDIR)/aout/adobe.h \
$(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def libaout.h \
@ -1286,6 +1295,9 @@ elf32-xstormy16.lo: elf32-xstormy16.c $(INCDIR)/filenames.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/xstormy16.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/libiberty.h \
elf32-target.h
elf32-xtensa.lo: elf32-xtensa.c $(INCDIR)/bfdlink.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/elf/xtensa.h $(INCDIR)/xtensa-isa.h elf32-target.h
elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h \
@ -1490,6 +1502,10 @@ xcofflink.lo: xcofflink.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/xcoff.h libcoff.h \
libxcoff.h
xsym.lo: xsym.c xsym.h $(INCDIR)/filenames.h
xtensa-isa.lo: xtensa-isa.c $(INCDIR)/xtensa-isa.h \
$(INCDIR)/xtensa-isa-internal.h
xtensa-modules.lo: xtensa-modules.c $(INCDIR)/xtensa-isa.h \
$(INCDIR)/xtensa-isa-internal.h
aix5ppc-core.lo: aix5ppc-core.c
aout64.lo: aout64.c aoutx.h $(INCDIR)/filenames.h $(INCDIR)/safe-ctype.h \
$(INCDIR)/bfdlink.h libaout.h $(INCDIR)/aout/aout64.h \

24
bfd/Makefile.in
View File

@ -1,4 +1,4 @@
# Makefile.in generated automatically by automake 1.4-p6 from Makefile.am
# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
# This Makefile.in is free software; the Free Software Foundation
@ -226,6 +226,7 @@ ALL_MACHINES = \
cpu-we32k.lo \
cpu-w65.lo \
cpu-xstormy16.lo \
cpu-xtensa.lo \
cpu-z8k.lo
@ -281,6 +282,7 @@ ALL_MACHINES_CFILES = \
cpu-we32k.c \
cpu-w65.c \
cpu-xstormy16.c \
cpu-xtensa.c \
cpu-z8k.c
@ -376,6 +378,7 @@ BFD32_BACKENDS = \
elf32-v850.lo \
elf32-vax.lo \
elf32-xstormy16.lo \
elf32-xtensa.lo \
elf32.lo \
elflink.lo \
elf-strtab.lo \
@ -444,7 +447,9 @@ BFD32_BACKENDS = \
vms-misc.lo \
vms-tir.lo \
xcofflink.lo \
xsym.lo
xsym.lo \
xtensa-isa.lo \
xtensa-modules.lo
BFD32_BACKENDS_CFILES = \
@ -536,6 +541,7 @@ BFD32_BACKENDS_CFILES = \
elf32-v850.c \
elf32-vax.c \
elf32-xstormy16.c \
elf32-xtensa.c \
elf32.c \
elflink.c \
elf-strtab.c \
@ -603,7 +609,9 @@ BFD32_BACKENDS_CFILES = \
vms-misc.c \
vms-tir.c \
xcofflink.c \
xsym.c
xsym.c \
xtensa-isa.c \
xtensa-modules.c
# The .o files needed by all of the 64 bit vectors that are configured into
@ -799,7 +807,7 @@ configure.in version.h
DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
TAR = tar
TAR = gtar
GZIP_ENV = --best
SOURCES = $(libbfd_a_SOURCES) $(libbfd_la_SOURCES)
OBJECTS = $(libbfd_a_OBJECTS) $(libbfd_la_OBJECTS)
@ -1490,6 +1498,7 @@ cpu-vax.lo: cpu-vax.c $(INCDIR)/filenames.h
cpu-we32k.lo: cpu-we32k.c $(INCDIR)/filenames.h
cpu-w65.lo: cpu-w65.c $(INCDIR)/filenames.h
cpu-xstormy16.lo: cpu-xstormy16.c $(INCDIR)/filenames.h
cpu-xtensa.lo: cpu-xtensa.c $(INCDIR)/filenames.h
cpu-z8k.lo: cpu-z8k.c $(INCDIR)/filenames.h
aout-adobe.lo: aout-adobe.c $(INCDIR)/filenames.h $(INCDIR)/aout/adobe.h \
$(INCDIR)/aout/stab_gnu.h $(INCDIR)/aout/stab.def libaout.h \
@ -1819,6 +1828,9 @@ elf32-xstormy16.lo: elf32-xstormy16.c $(INCDIR)/filenames.h \
$(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h $(INCDIR)/elf/xstormy16.h \
$(INCDIR)/elf/reloc-macros.h $(INCDIR)/libiberty.h \
elf32-target.h
elf32-xtensa.lo: elf32-xtensa.c $(INCDIR)/bfdlink.h elf-bfd.h \
$(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
$(INCDIR)/elf/xtensa.h $(INCDIR)/xtensa-isa.h elf32-target.h
elf32.lo: elf32.c elfcode.h $(INCDIR)/filenames.h $(INCDIR)/libiberty.h \
$(INCDIR)/bfdlink.h elf-bfd.h $(INCDIR)/elf/common.h \
$(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h elfcore.h \
@ -2023,6 +2035,10 @@ xcofflink.lo: xcofflink.c $(INCDIR)/filenames.h $(INCDIR)/bfdlink.h \
$(INCDIR)/coff/internal.h $(INCDIR)/coff/xcoff.h libcoff.h \
libxcoff.h
xsym.lo: xsym.c xsym.h $(INCDIR)/filenames.h
xtensa-isa.lo: xtensa-isa.c $(INCDIR)/xtensa-isa.h \
$(INCDIR)/xtensa-isa-internal.h
xtensa-modules.lo: xtensa-modules.c $(INCDIR)/xtensa-isa.h \
$(INCDIR)/xtensa-isa-internal.h
aix5ppc-core.lo: aix5ppc-core.c
aout64.lo: aout64.c aoutx.h $(INCDIR)/filenames.h $(INCDIR)/safe-ctype.h \
$(INCDIR)/bfdlink.h libaout.h $(INCDIR)/aout/aout64.h \

4
bfd/archures.c
View File

@ -308,6 +308,8 @@ DESCRIPTION
.#define bfd_mach_msp44 44
.#define bfd_mach_msp15 15
.#define bfd_mach_msp16 16
. bfd_arch_xtensa, {* Tensilica's Xtensa cores. *}
.#define bfd_mach_xtensa 1
. bfd_arch_last
. };
*/
@ -399,6 +401,7 @@ extern const bfd_arch_info_type bfd_vax_arch;
extern const bfd_arch_info_type bfd_we32k_arch;
extern const bfd_arch_info_type bfd_w65_arch;
extern const bfd_arch_info_type bfd_xstormy16_arch;
extern const bfd_arch_info_type bfd_xtensa_arch;
extern const bfd_arch_info_type bfd_z8k_arch;
static const bfd_arch_info_type * const bfd_archures_list[] =
@ -456,6 +459,7 @@ static const bfd_arch_info_type * const bfd_archures_list[] =
&bfd_w65_arch,
&bfd_we32k_arch,
&bfd_xstormy16_arch,
&bfd_xtensa_arch,
&bfd_z8k_arch,
#endif
0

34
bfd/bfd-in2.h
View File

@ -1774,6 +1774,8 @@ enum bfd_architecture
#define bfd_mach_msp44 44
#define bfd_mach_msp15 15
#define bfd_mach_msp16 16
bfd_arch_xtensa, /* Tensilica's Xtensa cores. */
#define bfd_mach_xtensa 1
bfd_arch_last
};
@ -3437,6 +3439,38 @@ to follow the 16K memory bank of 68HC12 (seen as mapped in the window). */
BFD_RELOC_IQ2000_OFFSET_16,
BFD_RELOC_IQ2000_OFFSET_21,
BFD_RELOC_IQ2000_UHI16,
/* Special Xtensa relocation used only by PLT entries in ELF shared
objects to indicate that the runtime linker should set the value
to one of its own internal functions or data structures. */
BFD_RELOC_XTENSA_RTLD,
/* Xtensa relocations for ELF shared objects. */
BFD_RELOC_XTENSA_GLOB_DAT,
BFD_RELOC_XTENSA_JMP_SLOT,
BFD_RELOC_XTENSA_RELATIVE,
/* Xtensa relocation used in ELF object files for symbols that may require
PLT entries. Otherwise, this is just a generic 32-bit relocation. */
BFD_RELOC_XTENSA_PLT,
/* Generic Xtensa relocations. Only the operand number is encoded
in the relocation. The details are determined by extracting the
instruction opcode. */
BFD_RELOC_XTENSA_OP0,
BFD_RELOC_XTENSA_OP1,
BFD_RELOC_XTENSA_OP2,
/* Xtensa relocation to mark that the assembler expanded the
instructions from an original target. The expansion size is
encoded in the reloc size. */
BFD_RELOC_XTENSA_ASM_EXPAND,
/* Xtensa relocation to mark that the linker should simplify
assembler-expanded instructions. This is commonly used
internally by the linker after analysis of a
BFD_RELOC_XTENSA_ASM_EXPAND. */
BFD_RELOC_XTENSA_ASM_SIMPLIFY,
BFD_RELOC_UNUSED };
typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
reloc_howto_type *

6
bfd/config.bfd
View File

@ -58,6 +58,7 @@ thumb*) targ_archs=bfd_arm_arch ;;
v850*) targ_archs=bfd_v850_arch ;;
x86_64) targ_archs=bfd_i386_arch ;;
xscale*) targ_archs=bfd_arm_arch ;;
xtensa*) targ_archs=bfd_xtensa_arch ;;
z8k*) targ_archs=bfd_z8k_arch ;;
*) targ_archs=bfd_${targ_cpu}_arch ;;
esac
@ -1214,6 +1215,11 @@ case "${targ}" in
targ_defvec=bfd_elf32_xstormy16_vec
;;
xtensa-*-*)
targ_defvec=bfd_elf32_xtensa_le_vec
targ_selvecs=bfd_elf32_xtensa_be_vec
;;
z8k*-*-*)
targ_defvec=z8kcoff_vec
targ_underscore=yes

30
bfd/configure vendored
View File

@ -6155,6 +6155,8 @@ do
bfd_elf32_v850_vec) tb="$tb elf32-v850.lo elf32.lo $elf" ;;
bfd_elf32_vax_vec) tb="$tb elf32-vax.lo elf32.lo $elf" ;;
bfd_elf32_xstormy16_vec) tb="$tb elf32-xstormy16.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_le_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_be_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_alpha_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_big_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;;
@ -6372,10 +6374,10 @@ case ${host64}-${target64}-${want64} in
if test -n "$GCC" ; then
bad_64bit_gcc=no;
echo $ac_n "checking for gcc version with buggy 64-bit support""... $ac_c" 1>&6
echo "configure:6376: checking for gcc version with buggy 64-bit support" >&5
echo "configure:6378: checking for gcc version with buggy 64-bit support" >&5
# Add more tests for gcc versions with non-working 64-bit support here.
cat > conftest.$ac_ext <<EOF
#line 6379 "configure"
#line 6381 "configure"
#include "confdefs.h"
:__GNUC__:__GNUC_MINOR__:__i386__:
EOF
@ -6421,17 +6423,17 @@ for ac_hdr in unistd.h
do
ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'`
echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6
echo "configure:6425: checking for $ac_hdr" >&5
echo "configure:6427: checking for $ac_hdr" >&5
if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6430 "configure"
#line 6432 "configure"
#include "confdefs.h"
#include <$ac_hdr>
EOF
ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out"
{ (eval echo configure:6435: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
{ (eval echo configure:6437: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }
ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"`
if test -z "$ac_err"; then
rm -rf conftest*
@ -6460,12 +6462,12 @@ done
for ac_func in getpagesize
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
echo "configure:6464: checking for $ac_func" >&5
echo "configure:6466: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6469 "configure"
#line 6471 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -6488,7 +6490,7 @@ $ac_func();
; return 0; }
EOF
if { (eval echo configure:6492: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
if { (eval echo configure:6494: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else
@ -6513,7 +6515,7 @@ fi
done
echo $ac_n "checking for working mmap""... $ac_c" 1>&6
echo "configure:6517: checking for working mmap" >&5
echo "configure:6519: checking for working mmap" >&5
if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
@ -6521,7 +6523,7 @@ else
ac_cv_func_mmap_fixed_mapped=no
else
cat > conftest.$ac_ext <<EOF
#line 6525 "configure"
#line 6527 "configure"
#include "confdefs.h"
/* Thanks to Mike Haertel and Jim Avera for this test.
@ -6661,7 +6663,7 @@ main()
}
EOF
if { (eval echo configure:6665: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
if { (eval echo configure:6667: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null
then
ac_cv_func_mmap_fixed_mapped=yes
else
@ -6686,12 +6688,12 @@ fi
for ac_func in madvise mprotect
do
echo $ac_n "checking for $ac_func""... $ac_c" 1>&6
echo "configure:6690: checking for $ac_func" >&5
echo "configure:6692: checking for $ac_func" >&5
if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then
echo $ac_n "(cached) $ac_c" 1>&6
else
cat > conftest.$ac_ext <<EOF
#line 6695 "configure"
#line 6697 "configure"
#include "confdefs.h"
/* System header to define __stub macros and hopefully few prototypes,
which can conflict with char $ac_func(); below. */
@ -6714,7 +6716,7 @@ $ac_func();
; return 0; }
EOF
if { (eval echo configure:6718: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
if { (eval echo configure:6720: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
rm -rf conftest*
eval "ac_cv_func_$ac_func=yes"
else

2
bfd/configure.in
View File

@ -639,6 +639,8 @@ do
bfd_elf32_v850_vec) tb="$tb elf32-v850.lo elf32.lo $elf" ;;
bfd_elf32_vax_vec) tb="$tb elf32-vax.lo elf32.lo $elf" ;;
bfd_elf32_xstormy16_vec) tb="$tb elf32-xstormy16.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_le_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf32_xtensa_be_vec) tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
bfd_elf64_alpha_freebsd_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_alpha_vec) tb="$tb elf64-alpha.lo elf64.lo $elf"; target_size=64 ;;
bfd_elf64_big_generic_vec) tb="$tb elf64-gen.lo elf64.lo $elf"; target_size=64 ;;

38
bfd/cpu-xtensa.c Normal file
View File

@ -0,0 +1,38 @@
/* BFD support for the Xtensa processor.
Copyright 2003 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "bfd.h"
#include "sysdep.h"
#include "libbfd.h"
const bfd_arch_info_type bfd_xtensa_arch =
{
32, /* Bits per word. */
32, /* Bits per address. */
8, /* Bits per byte. */
bfd_arch_xtensa, /* Architecture. */
bfd_mach_xtensa, /* Machine. */
"xtensa", /* Architecture name. */
"xtensa", /* Printable name. */
4, /* Section align power. */
TRUE, /* The default? */
bfd_default_compatible, /* Architecture comparison fn. */
bfd_default_scan, /* String to architecture convert fn. */
NULL /* Next in list. */
};

5846
bfd/elf32-xtensa.c Normal file
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File diff suppressed because it is too large Load Diff

10
bfd/libbfd.h
View File

@ -1475,6 +1475,16 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_IQ2000_OFFSET_16",
"BFD_RELOC_IQ2000_OFFSET_21",
"BFD_RELOC_IQ2000_UHI16",
"BFD_RELOC_XTENSA_RTLD",
"BFD_RELOC_XTENSA_GLOB_DAT",
"BFD_RELOC_XTENSA_JMP_SLOT",
"BFD_RELOC_XTENSA_RELATIVE",
"BFD_RELOC_XTENSA_PLT",
"BFD_RELOC_XTENSA_OP0",
"BFD_RELOC_XTENSA_OP1",
"BFD_RELOC_XTENSA_OP2",
"BFD_RELOC_XTENSA_ASM_EXPAND",
"BFD_RELOC_XTENSA_ASM_SIMPLIFY",
"@@overflow: BFD_RELOC_UNUSED@@",
};
#endif

43
bfd/reloc.c
View File

@ -3850,6 +3850,49 @@ ENUMX
ENUMDOC
IQ2000 Relocations.
ENUM
BFD_RELOC_XTENSA_RTLD
ENUMDOC
Special Xtensa relocation used only by PLT entries in ELF shared
objects to indicate that the runtime linker should set the value
to one of its own internal functions or data structures.
ENUM
BFD_RELOC_XTENSA_GLOB_DAT
ENUMX
BFD_RELOC_XTENSA_JMP_SLOT
ENUMX
BFD_RELOC_XTENSA_RELATIVE
ENUMDOC
Xtensa relocations for ELF shared objects.
ENUM
BFD_RELOC_XTENSA_PLT
ENUMDOC
Xtensa relocation used in ELF object files for symbols that may require
PLT entries. Otherwise, this is just a generic 32-bit relocation.
ENUM
BFD_RELOC_XTENSA_OP0
ENUMX
BFD_RELOC_XTENSA_OP1
ENUMX
BFD_RELOC_XTENSA_OP2
ENUMDOC
Generic Xtensa relocations. Only the operand number is encoded
in the relocation. The details are determined by extracting the
instruction opcode.
ENUM
BFD_RELOC_XTENSA_ASM_EXPAND
ENUMDOC
Xtensa relocation to mark that the assembler expanded the
instructions from an original target. The expansion size is
encoded in the reloc size.
ENUM
BFD_RELOC_XTENSA_ASM_SIMPLIFY
ENUMDOC
Xtensa relocation to mark that the linker should simplify
assembler-expanded instructions. This is commonly used
internally by the linker after analysis of a
BFD_RELOC_XTENSA_ASM_EXPAND.
ENDSENUM
BFD_RELOC_UNUSED
CODE_FRAGMENT

4
bfd/targets.c
View File

@ -579,6 +579,8 @@ extern const bfd_target bfd_elf32_us_cris_vec;
extern const bfd_target bfd_elf32_v850_vec;
extern const bfd_target bfd_elf32_vax_vec;
extern const bfd_target bfd_elf32_xstormy16_vec;
extern const bfd_target bfd_elf32_xtensa_be_vec;
extern const bfd_target bfd_elf32_xtensa_le_vec;
extern const bfd_target bfd_elf64_alpha_freebsd_vec;
extern const bfd_target bfd_elf64_alpha_vec;
extern const bfd_target bfd_elf64_big_generic_vec;
@ -871,6 +873,8 @@ static const bfd_target * const _bfd_target_vector[] = {
&bfd_elf32_v850_vec,
&bfd_elf32_vax_vec,
&bfd_elf32_xstormy16_vec,
&bfd_elf32_xtensa_be_vec,
&bfd_elf32_xtensa_le_vec,
#ifdef BFD64
&bfd_elf64_alpha_freebsd_vec,
&bfd_elf64_alpha_vec,

593
bfd/xtensa-isa.c Normal file
View File

@ -0,0 +1,593 @@
/* Configurable Xtensa ISA support.
Copyright 2003 Free Software Foundation, Inc.
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include <stdio.h>
#include <stdlib.h>
#include <sys/types.h>
#include <string.h>
#include "xtensa-isa.h"
#include "xtensa-isa-internal.h"
xtensa_isa xtensa_default_isa = NULL;
static int
opname_lookup_compare (const void *v1, const void *v2)
{
opname_lookup_entry *e1 = (opname_lookup_entry *)v1;
opname_lookup_entry *e2 = (opname_lookup_entry *)v2;
return strcmp (e1->key, e2->key);
}
xtensa_isa
xtensa_isa_init (void)
{
xtensa_isa isa;
int mod;
isa = xtensa_load_isa (0);
if (isa == 0)
{
fprintf (stderr, "Failed to initialize Xtensa base ISA module\n");
return NULL;
}
for (mod = 1; xtensa_isa_modules[mod].get_num_opcodes_fn; mod++)
{
if (!xtensa_extend_isa (isa, mod))
{
fprintf (stderr, "Failed to initialize Xtensa TIE ISA module\n");
return NULL;
}
}
return isa;
}
/* ISA information. */
static int
xtensa_check_isa_config (xtensa_isa_internal *isa,
struct config_struct *config_table)
{
int i, j;
if (!config_table)
{
fprintf (stderr, "Error: Empty configuration table in ISA DLL\n");
return 0;
}
/* For the first module, save a pointer to the table and record the
specified endianness and availability of the density option. */
if (isa->num_modules == 0)
{
int found_memory_order = 0;
isa->config = config_table;
isa->has_density = 1; /* Default to have density option. */
for (i = 0; config_table[i].param_name; i++)
{
if (!strcmp (config_table[i].param_name, "IsaMemoryOrder"))
{
isa->is_big_endian =
(strcmp (config_table[i].param_value, "BigEndian") == 0);
found_memory_order = 1;
}
if (!strcmp (config_table[i].param_name, "IsaUseDensityInstruction"))
{
isa->has_density = atoi (config_table[i].param_value);
}
}
if (!found_memory_order)
{
fprintf (stderr, "Error: \"IsaMemoryOrder\" missing from "
"configuration table in ISA DLL\n");
return 0;
}
return 1;
}
/* For subsequent modules, check that the parameters match. Note: This
code is sufficient to handle the current model where there are never
more than 2 modules; we might at some point want to handle cases where
module N > 0 specifies some parameters not included in the base table,
and we would then add those to isa->config so that subsequent modules
would check against them. */
for (i = 0; config_table[i].param_name; i++)
{
for (j = 0; isa->config[j].param_name; j++)
{
if (!strcmp (config_table[i].param_name, isa->config[j].param_name))
{
int mismatch;
if (!strcmp (config_table[i].param_name, "IsaCoprocessorCount"))
{
/* Only require the coprocessor count to be <= the base. */
int tiecnt = atoi (config_table[i].param_value);
int basecnt = atoi (isa->config[j].param_value);
mismatch = (tiecnt > basecnt);
}
else
mismatch = strcmp (config_table[i].param_value,
isa->config[j].param_value);
if (mismatch)
{
#define MISMATCH_MESSAGE \
"Error: Configuration mismatch in the \"%s\" parameter:\n\
the configuration used when the TIE file was compiled had a value of\n\
\"%s\", while the current configuration has a value of\n\
\"%s\". Please rerun the TIE compiler with a matching\n\
configuration.\n"
fprintf (stderr, MISMATCH_MESSAGE,
config_table[i].param_name,
config_table[i].param_value,
isa->config[j].param_value);
return 0;
}
break;
}
}
}
return 1;
}
static int
xtensa_add_isa (xtensa_isa_internal *isa, libisa_module_specifier libisa)
{
const int (*get_num_opcodes_fn) (void);
struct config_struct *(*get_config_table_fn) (void);
xtensa_opcode_internal **(*get_opcodes_fn) (void);
int (*decode_insn_fn) (const xtensa_insnbuf);
xtensa_opcode_internal **opcodes;
int opc, insn_size, prev_num_opcodes, new_num_opcodes, this_module;
get_num_opcodes_fn = xtensa_isa_modules[libisa].get_num_opcodes_fn;
get_opcodes_fn = xtensa_isa_modules[libisa].get_opcodes_fn;
decode_insn_fn = xtensa_isa_modules[libisa].decode_insn_fn;
get_config_table_fn = xtensa_isa_modules[libisa].get_config_table_fn;
if (!get_num_opcodes_fn || !get_opcodes_fn || !decode_insn_fn
|| (!get_config_table_fn && isa->num_modules == 0))
return 0;
if (get_config_table_fn
&& !xtensa_check_isa_config (isa, get_config_table_fn ()))
return 0;
prev_num_opcodes = isa->num_opcodes;
new_num_opcodes = (*get_num_opcodes_fn) ();
isa->num_opcodes += new_num_opcodes;
isa->opcode_table = (xtensa_opcode_internal **)
realloc (isa->opcode_table, isa->num_opcodes *
sizeof (xtensa_opcode_internal *));
isa->opname_lookup_table = (opname_lookup_entry *)
realloc (isa->opname_lookup_table, isa->num_opcodes *
sizeof (opname_lookup_entry));
opcodes = (*get_opcodes_fn) ();
insn_size = isa->insn_size;
for (opc = 0; opc < new_num_opcodes; opc++)
{
xtensa_opcode_internal *intopc = opcodes[opc];
int newopc = prev_num_opcodes + opc;
isa->opcode_table[newopc] = intopc;
isa->opname_lookup_table[newopc].key = intopc->name;
isa->opname_lookup_table[newopc].opcode = newopc;
if (intopc->length > insn_size)
insn_size = intopc->length;
}
isa->insn_size = insn_size;
isa->insnbuf_size = ((isa->insn_size + sizeof (xtensa_insnbuf_word) - 1) /
sizeof (xtensa_insnbuf_word));
qsort (isa->opname_lookup_table, isa->num_opcodes,
sizeof (opname_lookup_entry), opname_lookup_compare);
/* Check for duplicate opcode names. */
for (opc = 1; opc < isa->num_opcodes; opc++)
{
if (!opname_lookup_compare (&isa->opname_lookup_table[opc-1],
&isa->opname_lookup_table[opc]))
{
fprintf (stderr, "Error: Duplicate TIE opcode \"%s\"\n",
isa->opname_lookup_table[opc].key);
return 0;
}
}
this_module = isa->num_modules;
isa->num_modules += 1;
isa->module_opcode_base = (int *) realloc (isa->module_opcode_base,
isa->num_modules * sizeof (int));
isa->module_decode_fn = (xtensa_insn_decode_fn *)
realloc (isa->module_decode_fn, isa->num_modules *
sizeof (xtensa_insn_decode_fn));
isa->module_opcode_base[this_module] = prev_num_opcodes;
isa->module_decode_fn[this_module] = decode_insn_fn;
xtensa_default_isa = isa;
return 1; /* Library was successfully added. */
}
xtensa_isa
xtensa_load_isa (libisa_module_specifier libisa)
{
xtensa_isa_internal *isa;
isa = (xtensa_isa_internal *) malloc (sizeof (xtensa_isa_internal));
memset (isa, 0, sizeof (xtensa_isa_internal));
if (!xtensa_add_isa (isa, libisa))
{
xtensa_isa_free (isa);
return NULL;
}
return (xtensa_isa) isa;
}
int
xtensa_extend_isa (xtensa_isa isa, libisa_module_specifier libisa)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
return xtensa_add_isa (intisa, libisa);
}
void
xtensa_isa_free (xtensa_isa isa)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
if (intisa->opcode_table)
free (intisa->opcode_table);
if (intisa->opname_lookup_table)
free (intisa->opname_lookup_table);
if (intisa->module_opcode_base)
free (intisa->module_opcode_base);
if (intisa->module_decode_fn)
free (intisa->module_decode_fn);
free (intisa);
}
int
xtensa_insn_maxlength (xtensa_isa isa)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
return intisa->insn_size;
}
int
xtensa_insnbuf_size (xtensa_isa isa)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *)isa;
return intisa->insnbuf_size;
}
int
xtensa_num_opcodes (xtensa_isa isa)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
return intisa->num_opcodes;
}
xtensa_opcode
xtensa_opcode_lookup (xtensa_isa isa, const char *opname)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
opname_lookup_entry entry, *result;
entry.key = opname;
result = bsearch (&entry, intisa->opname_lookup_table, intisa->num_opcodes,
sizeof (opname_lookup_entry), opname_lookup_compare);
if (!result) return XTENSA_UNDEFINED;
return result->opcode;
}
xtensa_opcode
xtensa_decode_insn (xtensa_isa isa, const xtensa_insnbuf insn)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
int n, opc;
for (n = 0; n < intisa->num_modules; n++) {
opc = (intisa->module_decode_fn[n]) (insn);
if (opc != XTENSA_UNDEFINED)
return intisa->module_opcode_base[n] + opc;
}
return XTENSA_UNDEFINED;
}
/* Opcode information. */
void
xtensa_encode_insn (xtensa_isa isa, xtensa_opcode opc, xtensa_insnbuf insn)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
xtensa_insnbuf template = intisa->opcode_table[opc]->template();
int len = intisa->opcode_table[opc]->length;
int n;
/* Convert length to 32-bit words. */
len = (len + 3) / 4;
/* Copy the template. */
for (n = 0; n < len; n++)
insn[n] = template[n];
/* Fill any unused buffer space with zeros. */
for ( ; n < intisa->insnbuf_size; n++)
insn[n] = 0;
}
const char *
xtensa_opcode_name (xtensa_isa isa, xtensa_opcode opc)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
return intisa->opcode_table[opc]->name;
}
int
xtensa_insn_length (xtensa_isa isa, xtensa_opcode opc)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
return intisa->opcode_table[opc]->length;
}
int
xtensa_insn_length_from_first_byte (xtensa_isa isa, char first_byte)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
int is_density = (first_byte & (intisa->is_big_endian ? 0x80 : 0x08)) != 0;
return (intisa->has_density && is_density ? 2 : 3);
}
int
xtensa_num_operands (xtensa_isa isa, xtensa_opcode opc)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
return intisa->opcode_table[opc]->iclass->num_operands;
}
xtensa_operand
xtensa_get_operand (xtensa_isa isa, xtensa_opcode opc, int opnd)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
xtensa_iclass_internal *iclass = intisa->opcode_table[opc]->iclass;
if (opnd >= iclass->num_operands)
return NULL;
return (xtensa_operand) iclass->operands[opnd];
}
/* Operand information. */
char *
xtensa_operand_kind (xtensa_operand opnd)
{
xtensa_operand_internal *intop = (xtensa_operand_internal *) opnd;
return intop->operand_kind;
}
char
xtensa_operand_inout (xtensa_operand opnd)
{
xtensa_operand_internal *intop = (xtensa_operand_internal *) opnd;
return intop->inout;
}
uint32
xtensa_operand_get_field (xtensa_operand opnd, const xtensa_insnbuf insn)
{
xtensa_operand_internal *intop = (xtensa_operand_internal *) opnd;
return (*intop->get_field) (insn);
}
void
xtensa_operand_set_field (xtensa_operand opnd, xtensa_insnbuf insn, uint32 val)
{
xtensa_operand_internal *intop = (xtensa_operand_internal *) opnd;
return (*intop->set_field) (insn, val);
}
xtensa_encode_result
xtensa_operand_encode (xtensa_operand opnd, uint32 *valp)
{
xtensa_operand_internal *intop = (xtensa_operand_internal *) opnd;
return (*intop->encode) (valp);
}
uint32
xtensa_operand_decode (xtensa_operand opnd, uint32 val)
{
xtensa_operand_internal *intop = (xtensa_operand_internal *) opnd;
return (*intop->decode) (val);
}
int
xtensa_operand_isPCRelative (xtensa_operand opnd)
{
xtensa_operand_internal *intop = (xtensa_operand_internal *) opnd;
return intop->isPCRelative;
}
uint32
xtensa_operand_do_reloc (xtensa_operand opnd, uint32 addr, uint32 pc)
{
xtensa_operand_internal *intop = (xtensa_operand_internal *) opnd;
if (!intop->isPCRelative)
return addr;
return (*intop->do_reloc) (addr, pc);
}
uint32
xtensa_operand_undo_reloc (xtensa_operand opnd, uint32 offset, uint32 pc)
{
xtensa_operand_internal *intop = (xtensa_operand_internal *) opnd;
if (!intop->isPCRelative)
return offset;
return (*intop->undo_reloc) (offset, pc);
}
/* Instruction buffers. */
xtensa_insnbuf
xtensa_insnbuf_alloc (xtensa_isa isa)
{
return (xtensa_insnbuf) malloc (xtensa_insnbuf_size (isa) *
sizeof (xtensa_insnbuf_word));
}
void
xtensa_insnbuf_free (xtensa_insnbuf buf)
{
free( buf );
}
/* Given <byte_index>, the index of a byte in a xtensa_insnbuf, our
internal representation of a xtensa instruction word, return the index of
its word and the bit index of its low order byte in the xtensa_insnbuf. */
static inline int
byte_to_word_index (int byte_index)
{
return byte_index / sizeof (xtensa_insnbuf_word);
}
static inline int
byte_to_bit_index (int byte_index)
{
return (byte_index & 0x3) * 8;
}
/* Copy an instruction in the 32 bit words pointed at by <insn> to characters
pointed at by <cp>. This is more complicated than you might think because
we want 16 bit instructions in bytes 2,3 for big endian. This function
allows us to specify which byte in <insn> to start with and which way to
increment, allowing trivial implementation for both big and little endian.
And it seems to make pretty good code for both. */
void
xtensa_insnbuf_to_chars (xtensa_isa isa, const xtensa_insnbuf insn, char *cp)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
int insn_size = xtensa_insn_maxlength (intisa);
int fence_post, start, increment, i, byte_count;
xtensa_opcode opc;
if (intisa->is_big_endian)
{
start = insn_size - 1;
increment = -1;
}
else
{
start = 0;
increment = 1;
}
/* Find the opcode; do nothing if the buffer does not contain a valid
instruction since we need to know how many bytes to copy. */
opc = xtensa_decode_insn (isa, insn);
if (opc == XTENSA_UNDEFINED)
return;
byte_count = xtensa_insn_length (isa, opc);
fence_post = start + (byte_count * increment);
for (i = start; i != fence_post; i += increment, ++cp)
{
int word_inx = byte_to_word_index (i);
int bit_inx = byte_to_bit_index (i);
*cp = (insn[word_inx] >> bit_inx) & 0xff;
}
}
/* Inward conversion from byte stream to xtensa_insnbuf. See
xtensa_insnbuf_to_chars for a discussion of why this is
complicated by endianness. */
void
xtensa_insnbuf_from_chars (xtensa_isa isa, xtensa_insnbuf insn, const char* cp)
{
xtensa_isa_internal *intisa = (xtensa_isa_internal *) isa;
int insn_size = xtensa_insn_maxlength (intisa);
int fence_post, start, increment, i;
if (intisa->is_big_endian)
{
start = insn_size - 1;
increment = -1;
}
else
{
start = 0;
increment = 1;
}
fence_post = start + (insn_size * increment);
memset (insn, 0, xtensa_insnbuf_size (isa) * sizeof (xtensa_insnbuf_word));
for ( i = start; i != fence_post; i += increment, ++cp )
{
int word_inx = byte_to_word_index (i);
int bit_inx = byte_to_bit_index (i);
insn[word_inx] |= (*cp & 0xff) << bit_inx;
}
}

6090
bfd/xtensa-modules.c Normal file
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