* gas/mcore/allinsn.d: Escape dots. Pass -z to objdump and adjust

to suit.  Match coff relocs.  Match "from address pool" comments.
	* gas/sparc/pcrel.s: Use 2b label in expressions.
	* gas/sparc/pcrel64.s: Likewise.
	* gas/sparc/pcrel.d: Adjust to suit.
	* gas/sparc/pcrel64.d: Likewise.
	* gas/vtable/vtable.exp: Move xfails to ..
	(proc vtable_setup_xfails): .. here. Add i866.
This commit is contained in:
Alan Modra
2002-08-27 23:51:47 +00:00
parent bcd9320746
commit deda5edf4b
7 changed files with 49 additions and 38 deletions

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@ -1,5 +1,14 @@
2002-08-28 Alan Modra <amodra@bigpond.net.au> 2002-08-28 Alan Modra <amodra@bigpond.net.au>
* gas/mcore/allinsn.d: Escape dots. Pass -z to objdump and adjust
to suit. Match coff relocs. Match "from address pool" comments.
* gas/sparc/pcrel.s: Use 2b label in expressions.
* gas/sparc/pcrel64.s: Likewise.
* gas/sparc/pcrel.d: Adjust to suit.
* gas/sparc/pcrel64.d: Likewise.
* gas/vtable/vtable.exp: Move xfails to ..
(proc vtable_setup_xfails): .. here. Add i866.
* gas/macros/macros.exp (strings): Update xfails. * gas/macros/macros.exp (strings): Update xfails.
2002-08-26 Alan Modra <amodra@bigpond.net.au> 2002-08-26 Alan Modra <amodra@bigpond.net.au>

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@ -1,10 +1,10 @@
#as: #as:
#objdump: -dr #objdump: -drz
#name: allinsn #name: allinsn
.*: +file format .* .*: +file format .*
Disassembly of section .text: Disassembly of section \.text:
0+000 <abs>: 0+000 <abs>:
0: 01e0 abs r0 0: 01e0 abs r0
@ -55,7 +55,7 @@ Disassembly of section .text:
1e: 1321 bgenr r1, r2 1e: 1321 bgenr r1, r2
0+020 <bkpt>: 0+020 <bkpt>:
... 20: 0000 bkpt
0+022 <bmaski>: 0+022 <bmaski>:
22: 2c83 bmaski r3, 8 22: 2c83 bmaski r3, 8
@ -154,7 +154,7 @@ Disassembly of section .text:
60: f00e br 0x7e 60: f00e br 0x7e
0+062 <jbsr>: 0+062 <jbsr>:
62: 7f0a jsri 0x.* 62: 7f0a jsri 0x0 // from address pool at 0x8c
0+064 <jbt>: 0+064 <jbt>:
64: e00c bt 0x7e 64: e00c bt 0x7e
@ -163,21 +163,21 @@ Disassembly of section .text:
66: 00c1 jmp r1 66: 00c1 jmp r1
0+068 <jmpi>: 0+068 <jmpi>:
68: 7009 jmpi 0x.* 68: 7009 jmpi 0x0 // from address pool at 0x8c
0+06a <jsr>: 0+06a <jsr>:
6a: 00d2 jsr r2 6a: 00d2 jsr r2
0+06c <jsri>: 0+06c <jsri>:
6c: 7f08 jsri 0x.* 6c: 7f08 jsri 0x0 // from address pool at 0x8c
0+06e <ld.b>: 0+06e <ld\.b>:
6e: a304 ldb r3, \(r4, 0\) 6e: a304 ldb r3, \(r4, 0\)
0+070 <ld.h>: 0+070 <ld\.h>:
70: c516 ldh r5, \(r6, 2\) 70: c516 ldh r5, \(r6, 2\)
0+072 <ld.w>: 0+072 <ld\.w>:
72: 8718 ld r7, \(r8, 4\) 72: 8718 ld r7, \(r8, 4\)
0+074 <ldb>: 0+074 <ldb>:
@ -202,7 +202,7 @@ Disassembly of section .text:
80: 048e loopt r8, 0x64 80: 048e loopt r8, 0x64
0+082 <LRW>: 0+082 <LRW>:
82: 7903 lrw r9, 0x.* 82: 7903 lrw r9, (0x86|0x0 // from address pool at 0x90)
0+084 <lrw>: 0+084 <lrw>:
84: 7904 lrw r9, 0x4321 84: 7904 lrw r9, 0x4321
@ -215,12 +215,14 @@ Disassembly of section .text:
0+08a <lslc>: 0+08a <lslc>:
8a: 3c0c lslc r12 8a: 3c0c lslc r12
8c: 0000 bkpt
... 8c: ADDR32 \.text
8c: ADDR32 .text 8e: 0000 bkpt
90: ADDR32 .text.* 90: (0000 bkpt|0086 dect r6)
94: 0000 bkpt 90: ADDR32 \.text(\+0x86)?
96: 4321 .short 0x4321 92: 0000 bkpt
94: 4321 \.short 0x4321
96: 0000 bkpt
0+098 <lsli>: 0+098 <lsli>:
98: 3dfd lsli r13, 31 98: 3dfd lsli r13, 31
@ -312,13 +314,13 @@ Disassembly of section .text:
0+0d2 <sexth>: 0+0d2 <sexth>:
d2: 0177 sexth r7 d2: 0177 sexth r7
0+0d4 <st.b>: 0+0d4 <st\.b>:
d4: b809 stb r8, \(r9, 0\) d4: b809 stb r8, \(r9, 0\)
0+0d6 <st.h>: 0+0d6 <st\.h>:
d6: da1b sth r10, \(r11, 2\) d6: da1b sth r10, \(r11, 2\)
0+0d8 <st.w>: 0+0d8 <st\.w>:
d8: 9c1d st r12, \(r13, 4\) d8: 9c1d st r12, \(r13, 4\)
0+0da <stb>: 0+0da <stb>:

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@ -20,8 +20,8 @@ Disassembly of section .data:
... ...
8: R_SPARC_32 .text\+0x10 8: R_SPARC_32 .text\+0x10
c: R_SPARC_DISP32 .text\+0x10 c: R_SPARC_DISP32 .text\+0x10
10: R_SPARC_32 .text\+0x10 10: R_SPARC_32 .text\+0x14
14: R_SPARC_DISP32 .text\+0x10 14: R_SPARC_DISP32 .text\+0x14
18: R_SPARC_32 foo 18: R_SPARC_32 foo
1c: R_SPARC_DISP32 foo 1c: R_SPARC_DISP32 foo
20: R_SPARC_32 foo\+0x10 20: R_SPARC_32 foo\+0x10

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@ -11,8 +11,8 @@ foo: nop
.word 1 .word 1
.word 1b + 16 .word 1b + 16
.word %r_disp32(1b + 16) .word %r_disp32(1b + 16)
.word 1b + 16 .word 2b + 16
.word %r_disp32(1b + 16) .word %r_disp32(2b + 16)
3: .word foo 3: .word foo
.word %r_disp32(foo) .word %r_disp32(foo)
.word foo + 16 .word foo + 16

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@ -20,8 +20,8 @@ Disassembly of section .data:
... ...
8: R_SPARC_32 .text\+0x10 8: R_SPARC_32 .text\+0x10
c: R_SPARC_DISP32 .text\+0x10 c: R_SPARC_DISP32 .text\+0x10
10: R_SPARC_32 .text\+0x10 10: R_SPARC_32 .text\+0x14
14: R_SPARC_DISP32 .text\+0x10 14: R_SPARC_DISP32 .text\+0x14
18: R_SPARC_32 foo 18: R_SPARC_32 foo
1c: R_SPARC_DISP32 foo 1c: R_SPARC_DISP32 foo
20: R_SPARC_32 foo\+0x10 20: R_SPARC_32 foo\+0x10

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@ -11,8 +11,8 @@ foo: nop
.word 1 .word 1
.word 1b + 16 .word 1b + 16
.word %r_disp32(1b + 16) .word %r_disp32(1b + 16)
.word 1b + 16 .word 2b + 16
.word %r_disp32(1b + 16) .word %r_disp32(2b + 16)
3: .word foo 3: .word foo
.word %r_disp32(foo) .word %r_disp32(foo)
.word foo + 16 .word foo + 16

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@ -14,28 +14,28 @@ proc run_list_test { name opts } {
pass $testname pass $testname
} }
# These tests are not (yet) supported on some targets.
proc vtable_setup_xfails { } {
setup_xfail "alpha*-*" "arc-*" "avr-*" "d30v-*"
setup_xfail "h8300*-*" "hppa*64*-*-*hpux*"
setup_xfail "i370-*" "i860-*" "i960-*" "ia64-*" "ip2k-*"
setup_xfail "mn10200-*" "or32-*" "sparc64*-*"
}
# Vtable bits are only supported by ELF targets. # Vtable bits are only supported by ELF targets.
if { ( [istarget "*-*-elf*"] || [istarget "*-*-linux*"]) if { ( [istarget "*-*-elf*"] || [istarget "*-*-linux*"])
&& ![istarget *-*-linux*aout*] && ![istarget *-*-linux*aout*]
&& ![istarget *-*-linux*ecoff*] && ![istarget *-*-linux*ecoff*]
&& ![istarget *-*-linux*oldld*] } then { && ![istarget *-*-linux*oldld*] } then {
# These tests are not (yet) supported on some targets. vtable_setup_xfails
setup_xfail "alpha*-*" "arc-*" "avr-*" "d30v-*"
setup_xfail "h8300*-*" "hppa*64*-*-*hpux*"
setup_xfail "i370-*" "i960-*" "ia64-*" "ip2k-*"
setup_xfail "mn10200-*" "or32-*" "sparc64*-*"
run_dump_test "inherit0" run_dump_test "inherit0"
# This particular test is supposed to fail.. # This particular test is supposed to fail..
run_list_test "inherit1" "-al" run_list_test "inherit1" "-al"
setup_xfail "alpha*-*" "arc-*" "avr-*" "d30v-*"
setup_xfail "h8300*-*" "hppa*64*-*-*hpux*"
setup_xfail "i370-*" "i960-*" "ia64-*" "ip2k-*"
setup_xfail "mn10200-*" "or32-*" "sparc64*-*"
# The vtable entry results are different on Rel and Rela targets. # The vtable entry results are different on Rel and Rela targets.
vtable_setup_xfails
if {[istarget "arm*-*"] if {[istarget "arm*-*"]
|| [istarget "arc-*"] || [istarget "arc-*"]
|| [istarget "d10v-*"] || [istarget "d10v-*"]