* config/tc-mips.c (mips_fix_adjustable): If the full addend is

going to be split into more than one in-place addend, return 0
	for relocations against mergeable sections.  Associate comments
	with code.

gas/ChangeLog

@@ -1,3 +1,10 @@
+2004-07-08  Richard Sandiford  <rsandifo@redhat.com>
+
+	* config/tc-mips.c (mips_fix_adjustable): If the full addend is
+	going to be split into more than one in-place addend, return 0
+	for relocations against mergeable sections.  Associate comments
+	with code.
+
 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 
 	* Makefile.am (CPU_TYPES): Add crx.

gas/config/tc-mips.c

@@ -12733,15 +12733,13 @@ md_estimate_size_before_relax (fragS *fragp, asection *segtype)
 }
 
 /* This is called to see whether a reloc against a defined symbol
-   should be converted into a reloc against a section.  Don't adjust
+   should be converted into a reloc against a section.  */
-   MIPS16 jump relocations, so we don't have to worry about the format
-   of the offset in the .o file.  Don't adjust relocations against
-   mips16 symbols, so that the linker can find them if it needs to set
-   up a stub.  */
 
 int
 mips_fix_adjustable (fixS *fixp)
 {
+  /* Don't adjust MIPS16 jump relocations, so we don't have to worry
+     about the format of the offset in the .o file. */
   if (fixp->fx_r_type == BFD_RELOC_MIPS16_JMP)
     return 0;
 
@@ -12752,7 +12750,28 @@ mips_fix_adjustable (fixS *fixp)
   if (fixp->fx_addsy == NULL)
     return 1;
 
+  /* If symbol SYM is in a mergeable section, relocations of the form
+     SYM + 0 can usually be made section-relative.  The mergeable data
+     is then identified by the section offset rather than by the symbol.
+
+     However, if we're generating REL LO16 relocations, the offset is split
+     between the LO16 and parterning high part relocation.  The linker will
+     need to recalculate the complete offset in order to correctly identify
+     the merge data.
+
+     The linker has traditionally not looked for the parterning high part
+     relocation, and has thus allowed orphaned R_MIPS_LO16 relocations to be
+     placed anywhere.  Rather than break backwards compatibility by changing
+     this, it seems better not to force the issue, and instead keep the
+     original symbol.  This will work with either linker behavior.  */
+  if ((fixp->fx_r_type == BFD_RELOC_LO16 || reloc_needs_lo_p (fixp->fx_r_type))
+      && HAVE_IN_PLACE_ADDENDS
+      && (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE) != 0)
+    return 0;
+
 #ifdef OBJ_ELF
+  /* Don't adjust relocations against mips16 symbols, so that the linker
+     can find them if it needs to set up a stub.  */
   if (OUTPUT_FLAVOR == bfd_target_elf_flavour
       && S_GET_OTHER (fixp->fx_addsy) == STO_MIPS16
       && fixp->fx_subsy == NULL)

gas/testsuite/ChangeLog

@@ -1,3 +1,8 @@
+2004-07-08  Richard Sandiford  <rsandifo@redhat.com>
+
+	* gas/mips/elf-rel7.d: Expect relocations against bar to refer to bar.
+	* gas/mips/elf-refl19.d: Likewise L2.
+
 2004-07-03  Richard Sandiford  <rsandifo@redhat.com>
 
 	* config/tc-mips.c (HAVE_IN_PLACE_ADDENDS): New macro.

gas/testsuite/gas/mips/elf-rel19.d

@@ -10,10 +10,10 @@ Disassembly of section \.text:
 # Relocation agsinst .rodata.str1.1
 #
 .*:	8f840000 	lw	a0,0\(gp\)
-			.*: R_MIPS_GOT16	\.rodata\.str1\.1
+			.*: R_MIPS_GOT16	L2
 .*:	00000000 	nop
-.*:	24840004 	addiu	a0,a0,4
+.*:	24840000 	addiu	a0,a0,0
-			.*: R_MIPS_LO16	\.rodata\.str1\.1
+			.*: R_MIPS_LO16	L2
 #
 # Relocation agsinst L2 + 2
 #

gas/testsuite/gas/mips/elf-rel7.d

@@ -6,9 +6,9 @@
 
 Disassembly of section \.text:
 0+00 <.*> lui	a0,0x0
-			0: R_MIPS_HI16	.barsec
+			0: R_MIPS_HI16	bar
-0+04 <.*> lw	a0,8\(a0\)
+0+04 <.*> lw	a0,0\(a0\)
-			4: R_MIPS_LO16	.barsec
+			4: R_MIPS_LO16	bar
 0+08 <.*> lui	a0,0x0
 			8: R_MIPS_HI16	bar
 0+0c <.*> lw	a0,4\(a0\)