Fix ARm assembler so that it rejects invalid immediate values for the Thumb ORR instruction.

PR 22773
	* config/tc-arm.c (md_apply_fix): Test Rn field of Thumb ORR
	instruction before assuming that it is a MOV instruction.
	* testsuite/gas/arm/pr22773.s: New test.
	* testsuite/gas/arm/pr22773.d: New test driver.
	* testsuite/gas/arm/pr22773.l: New expected output.
This commit is contained in:
Nick Clifton
2018-02-13 16:50:04 +00:00
parent bd7ab16b45
commit db7bf1058d
5 changed files with 28 additions and 3 deletions

View File

@ -1,3 +1,12 @@
2018-02-13 Nick Clifton <nickc@redhat.com>
PR 22773
* config/tc-arm.c (md_apply_fix): Test Rn field of Thumb ORR
instruction before assuming that it is a MOV instruction.
* testsuite/gas/arm/pr22773.s: New test.
* testsuite/gas/arm/pr22773.d: New test driver.
* testsuite/gas/arm/pr22773.l: New expected output.
2018-02-13 H.J. Lu <hongjiu.lu@intel.com> 2018-02-13 H.J. Lu <hongjiu.lu@intel.com>
PR gas/22791 PR gas/22791

View File

@ -23596,12 +23596,14 @@ md_apply_fix (fixS * fixP,
/* MOV accepts both Thumb2 modified immediate (T2 encoding) and /* MOV accepts both Thumb2 modified immediate (T2 encoding) and
UINT16 (T3 encoding), MOVW only accepts UINT16. When UINT16 (T3 encoding), MOVW only accepts UINT16. When
disassembling, MOV is preferred when there is no encoding disassembling, MOV is preferred when there is no encoding
overlap. overlap. */
NOTE: MOV is using ORR opcode under Thumb 2 mode. */
if (((newval >> T2_DATA_OP_SHIFT) & 0xf) == T2_OPCODE_ORR if (((newval >> T2_DATA_OP_SHIFT) & 0xf) == T2_OPCODE_ORR
/* NOTE: MOV uses the ORR opcode in Thumb 2 mode
but with the Rn field [19:16] set to 1111. */
&& (((newval >> 16) & 0xf) == 0xf)
&& ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6t2_v8m) && ARM_CPU_HAS_FEATURE (cpu_variant, arm_ext_v6t2_v8m)
&& !((newval >> T2_SBIT_SHIFT) & 0x1) && !((newval >> T2_SBIT_SHIFT) & 0x1)
&& value >= 0 && value <=0xffff) && value >= 0 && value <= 0xffff)
{ {
/* Toggle bit[25] to change encoding from T2 to T3. */ /* Toggle bit[25] to change encoding from T2 to T3. */
newval ^= 1 << 25; newval ^= 1 << 25;

View File

@ -0,0 +1,2 @@
# name: PR 22773: Invalid immediate constants produce incorrect instruction
# error-output: pr22773.l

View File

@ -0,0 +1,3 @@
[^:]*: Assembler messages:
[^:]*:8: Error: invalid constant \(3201\) after fixup
#pass

View File

@ -0,0 +1,9 @@
.syntax unified
.cpu cortex-m4
.thumb
.section .text
orr r1, #12800 /* This is OK. */
orr r1, #12801 /* This cannot be encoded in Thumb mode. */
/* GAS used to accept it though, and produce a MOV instruction instead. */