2008-04-10  H.J. Lu  <hongjiu.lu@intel.com>

	* NEWS: Mention -msse-check=[none|error|warning].

	* config/tc-i386.c (sse_check): New.
	(OPTION_MSSE_CHECK): Likewise.
	(md_assemble): Check SSE instructions if needed.
	(md_longopts): Add -msse-check.
	(md_parse_option): Handle OPTION_MSSE_CHECK.
	(md_show_usage): Show -msse-check=[none|error|warning].

	* doc/c-i386.texi: Document -msse-check=[none|error|warning].

gas/testsuite/

2008-04-10  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/i386.exp: Run sse-check, sse-check-warn,
	sse-check-error, x86-64-sse-check, x86-64-sse-check-warn and
	x86-64-sse-check-error.

	* gas/i386/sse-check.d: New.
	* gas/i386/sse-check.s: Likewise.
	* gas/i386/sse-check-error.l: Likewise.
	* gas/i386/sse-check-error.s: Likewise.
	* gas/i386/sse-check-warn.d: Likewise.
	* gas/i386/sse-check-warn.e: Likewise.
	* gas/i386/x86-64-sse-check.d: Likewise.
	* gas/i386/x86-64-sse-check-error.l: Likewise.
	* gas/i386/x86-64-sse-check-error.s: Likewise.
	* gas/i386/x86-64-sse-check-warn.d: Likewise.
This commit is contained in:
H.J. Lu
2008-04-10 17:53:40 +00:00
parent 112b7c5071
commit daf50ae75d
16 changed files with 266 additions and 0 deletions

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@ -1,3 +1,16 @@
2008-04-10 H.J. Lu <hongjiu.lu@intel.com>
* NEWS: Mention -msse-check=[none|error|warning].
* config/tc-i386.c (sse_check): New.
(OPTION_MSSE_CHECK): Likewise.
(md_assemble): Check SSE instructions if needed.
(md_longopts): Add -msse-check.
(md_parse_option): Handle OPTION_MSSE_CHECK.
(md_show_usage): Show -msse-check=[none|error|warning].
* doc/c-i386.texi: Document -msse-check=[none|error|warning].
2008-04-10 Santiago Urue<75>a <suruena@gmail.com> 2008-04-10 Santiago Urue<75>a <suruena@gmail.com>
* listing.c: Add -ag listing flag to show general information in * listing.c: Add -ag listing flag to show general information in

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@ -1,4 +1,7 @@
-*- text -*- -*- text -*-
* New command line option, -msse-check=[none|error|warning], for x86
targets.
* New sub-option added to the assembler's -a command line switch to * New sub-option added to the assembler's -a command line switch to
generate a listing output. The 'g' sub-option will insert into the listing generate a listing output. The 'g' sub-option will insert into the listing
various information about the assembly, such as assembler version, the various information about the assembly, such as assembler version, the

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@ -434,6 +434,14 @@ static int allow_naked_reg = 0;
/* 1 if pseudo index register, eiz/riz, is allowed . */ /* 1 if pseudo index register, eiz/riz, is allowed . */
static int allow_index_reg = 0; static int allow_index_reg = 0;
static enum
{
sse_check_none = 0,
sse_check_warning,
sse_check_error
}
sse_check;
/* Register prefix used for error message. */ /* Register prefix used for error message. */
static const char *register_prefix = "%"; static const char *register_prefix = "%";
@ -2661,6 +2669,19 @@ md_assemble (char *line)
if (!match_template ()) if (!match_template ())
return; return;
if (sse_check != sse_check_none
&& (i.tm.cpu_flags.bitfield.cpusse
|| i.tm.cpu_flags.bitfield.cpusse2
|| i.tm.cpu_flags.bitfield.cpusse3
|| i.tm.cpu_flags.bitfield.cpussse3
|| i.tm.cpu_flags.bitfield.cpusse4_1
|| i.tm.cpu_flags.bitfield.cpusse4_2))
{
(sse_check == sse_check_warning
? as_warn
: as_bad) (_("SSE instruction `%s' is used"), i.tm.name);
}
/* Zap movzx and movsx suffix. The suffix has been set from /* Zap movzx and movsx suffix. The suffix has been set from
"word ptr" or "byte ptr" on the source operand in Intel syntax "word ptr" or "byte ptr" on the source operand in Intel syntax
or extracted from mnemonic in AT&T syntax. But we'll use or extracted from mnemonic in AT&T syntax. But we'll use
@ -7798,6 +7819,7 @@ const char *md_shortopts = "qn";
#define OPTION_MNAKED_REG (OPTION_MD_BASE + 8) #define OPTION_MNAKED_REG (OPTION_MD_BASE + 8)
#define OPTION_MOLD_GCC (OPTION_MD_BASE + 9) #define OPTION_MOLD_GCC (OPTION_MD_BASE + 9)
#define OPTION_MSSE2AVX (OPTION_MD_BASE + 10) #define OPTION_MSSE2AVX (OPTION_MD_BASE + 10)
#define OPTION_MSSE_CHECK (OPTION_MD_BASE + 11)
struct option md_longopts[] = struct option md_longopts[] =
{ {
@ -7814,6 +7836,7 @@ struct option md_longopts[] =
{"mnaked-reg", no_argument, NULL, OPTION_MNAKED_REG}, {"mnaked-reg", no_argument, NULL, OPTION_MNAKED_REG},
{"mold-gcc", no_argument, NULL, OPTION_MOLD_GCC}, {"mold-gcc", no_argument, NULL, OPTION_MOLD_GCC},
{"msse2avx", no_argument, NULL, OPTION_MSSE2AVX}, {"msse2avx", no_argument, NULL, OPTION_MSSE2AVX},
{"msse-check", required_argument, NULL, OPTION_MSSE_CHECK},
{NULL, no_argument, NULL, 0} {NULL, no_argument, NULL, 0}
}; };
size_t md_longopts_size = sizeof (md_longopts); size_t md_longopts_size = sizeof (md_longopts);
@ -8007,6 +8030,17 @@ md_parse_option (int c, char *arg)
sse2avx = 1; sse2avx = 1;
break; break;
case OPTION_MSSE_CHECK:
if (strcasecmp (arg, "error") == 0)
sse_check = sse_check_error;
else if (strcasecmp (arg, "warning") == 0)
sse_check = sse_check_warning;
else if (strcasecmp (arg, "none") == 0)
sse_check = sse_check_none;
else
as_fatal (_("Invalid -msse-check= option: `%s'"), arg);
break;
default: default:
return 0; return 0;
} }
@ -8061,6 +8095,9 @@ md_show_usage (stream)
fprintf (stream, _("\ fprintf (stream, _("\
-msse2avx encode SSE instructions with VEX prefix\n")); -msse2avx encode SSE instructions with VEX prefix\n"));
fprintf (stream, _("\ fprintf (stream, _("\
-msse-check=[none|error|warning]\n\
check SSE instructions\n"));
fprintf (stream, _("\
-mmnemonic=[att|intel] use AT&T/Intel mnemonic\n")); -mmnemonic=[att|intel] use AT&T/Intel mnemonic\n"));
fprintf (stream, _("\ fprintf (stream, _("\
-msyntax=[att|intel] use AT&T/Intel syntax\n")); -msyntax=[att|intel] use AT&T/Intel syntax\n"));

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@ -155,6 +155,18 @@ Valid @var{CPU} values are identical to the processor list of
This option specifies that the assembler should encode SSE instructions This option specifies that the assembler should encode SSE instructions
with VEX prefix. with VEX prefix.
@cindex @samp{-msse-check=} option, i386
@cindex @samp{-msse-check=} option, x86-64
@item -msse-check=@var{none}
@item -msse-check=@var{warning}
@item -msse-check=@var{error}
These options control if the assembler should check SSE intructions.
@option{-msse-check=@var{none}} will make the assembler not to check SSE
instructions, which is the default. @option{-msse-check=@var{warning}}
will make the assembler issue a warning for any SSE intruction.
@option{-msse-check=@var{error}} will make the assembler issue an error
for any SSE intruction.
@cindex @samp{-mmnemonic=} option, i386 @cindex @samp{-mmnemonic=} option, i386
@cindex @samp{-mmnemonic=} option, x86-64 @cindex @samp{-mmnemonic=} option, x86-64
@item -mmnemonic=@var{att} @item -mmnemonic=@var{att}

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@ -1,3 +1,20 @@
2008-04-10 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run sse-check, sse-check-warn,
sse-check-error, x86-64-sse-check, x86-64-sse-check-warn and
x86-64-sse-check-error.
* gas/i386/sse-check.d: New.
* gas/i386/sse-check.s: Likewise.
* gas/i386/sse-check-error.l: Likewise.
* gas/i386/sse-check-error.s: Likewise.
* gas/i386/sse-check-warn.d: Likewise.
* gas/i386/sse-check-warn.e: Likewise.
* gas/i386/x86-64-sse-check.d: Likewise.
* gas/i386/x86-64-sse-check-error.l: Likewise.
* gas/i386/x86-64-sse-check-error.s: Likewise.
* gas/i386/x86-64-sse-check-warn.d: Likewise.
2008-04-10 Santiago Urue<75>a <suruena@gmail.com> 2008-04-10 Santiago Urue<75>a <suruena@gmail.com>
* gas/all/gas.exp: Check the performance of the -ag command line * gas/all/gas.exp: Check the performance of the -ag command line

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@ -124,6 +124,9 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "avx-intel" run_dump_test "avx-intel"
run_dump_test "sse2avx" run_dump_test "sse2avx"
run_list_test "inval-avx" "-al" run_list_test "inval-avx" "-al"
run_dump_test "sse-check"
run_dump_test "sse-check-warn"
run_list_test "sse-check-error" "-msse-check=error -I${srcdir}/$subdir -al"
# These tests require support for 8 and 16 bit relocs, # These tests require support for 8 and 16 bit relocs,
# so we only run them for ELF and COFF targets. # so we only run them for ELF and COFF targets.
@ -250,6 +253,9 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_dump_test "x86-64-avx-intel" run_dump_test "x86-64-avx-intel"
run_dump_test "x86-64-sse2avx" run_dump_test "x86-64-sse2avx"
run_list_test "x86-64-inval-avx" "-al" run_list_test "x86-64-inval-avx" "-al"
run_dump_test "x86-64-sse-check"
run_dump_test "x86-64-sse-check-warn"
run_list_test "x86-64-sse-check-error" "-msse-check=error -I${srcdir}/$subdir -al"
if { ![istarget "*-*-aix*"] if { ![istarget "*-*-aix*"]
&& ![istarget "*-*-beos*"] && ![istarget "*-*-beos*"]

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@ -0,0 +1,40 @@
.*: Assembler messages:
.*:7: Error: .*
.*:10: Error: .*
.*:13: Error: .*
.*:16: Error: .*
.*:19: Error: .*
.*:20: Error: .*
GAS LISTING .*
[ ]*1[ ]+\.include "sse-check\.s"
[ ]*1[ ]+\# Check SSE instructions
[ ]*2[ ]+
[ ]*3[ ]+\.text
[ ]*4[ ]+_start:
[ ]*5[ ]+
[ ]*6[ ]+\# SSE instruction
[ ]*7[ ]+\?\?\?\? 0F58CA addps %xmm2,%xmm1
\*\*\*\* Error:SSE instruction `addps' is used
[ ]*8[ ]+
[ ]*9[ ]+\# SSE2 instruction
[ ]*10[ ]+\?\?\?\? 660F58CA addpd %xmm2,%xmm1
\*\*\*\* Error:SSE instruction `addpd' is used
[ ]*11[ ]+
[ ]*12[ ]+\# SSE3 instruction
[ ]*13[ ]+\?\?\?\? 660FD0CA addsubpd %xmm2,%xmm1
\*\*\*\* Error:SSE instruction `addsubpd' is used
[ ]*14[ ]+
[ ]*15[ ]+\# SSSE3 instruction
[ ]*16[ ]+\?\?\?\? 660F3801 phaddw %xmm2,%xmm1
\*\*\*\* Error:SSE instruction `phaddw' is used
[ ]*16[ ]+CA
[ ]*17[ ]+
[ ]*18[ ]+\# SSE4 instructions
[ ]*19[ ]+\?\?\?\? 660F3815 blendvpd %xmm0,%xmm1,%xmm0
\*\*\*\* Error:SSE instruction `blendvpd' is used
[ ]*19[ ]+C1
[ ]*20[ ]+\?\?\?\? 660F3837 pcmpgtq %xmm1,%xmm0
\*\*\*\* Error:SSE instruction `pcmpgtq' is used
[ ]*20[ ]+C1

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@ -0,0 +1 @@
.include "sse-check.s"

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@ -0,0 +1,18 @@
#source: sse-check.s
#as: -msse-check=warning
#stderr: sse-check-warn.e
#objdump: -dw
#name: i386 SSE check (warning)
.*: file format .*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: 0f 58 ca addps %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 58 ca addpd %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f d0 ca addsubpd %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 38 01 ca phaddw %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd %xmm0,%xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
#pass

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@ -0,0 +1,7 @@
.*: Assembler messages:
.*:7: Warning: SSE instruction `addps' is used
.*:10: Warning: SSE instruction `addpd' is used
.*:13: Warning: SSE instruction `addsubpd' is used
.*:16: Warning: SSE instruction `phaddw' is used
.*:19: Warning: SSE instruction `blendvpd' is used
.*:20: Warning: SSE instruction `pcmpgtq' is used

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@ -0,0 +1,16 @@
#as: -msse-check=none
#objdump: -dw
#name: i386 SSE check (none)
.*: file format .*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: 0f 58 ca addps %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 58 ca addpd %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f d0 ca addsubpd %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 38 01 ca phaddw %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd %xmm0,%xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
#pass

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@ -0,0 +1,20 @@
# Check SSE instructions
.text
_start:
# SSE instruction
addps %xmm2,%xmm1
# SSE2 instruction
addpd %xmm2,%xmm1
# SSE3 instruction
addsubpd %xmm2,%xmm1
# SSSE3 instruction
phaddw %xmm2,%xmm1
# SSE4 instructions
blendvpd %xmm0,%xmm1,%xmm0
pcmpgtq %xmm1,%xmm0

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@ -0,0 +1,40 @@
.*: Assembler messages:
.*:7: Error: .*
.*:10: Error: .*
.*:13: Error: .*
.*:16: Error: .*
.*:19: Error: .*
.*:20: Error: .*
GAS LISTING .*
[ ]*1[ ]+\.include "sse-check\.s"
[ ]*1[ ]+\# Check SSE instructions
[ ]*2[ ]+
[ ]*3[ ]+\.text
[ ]*4[ ]+_start:
[ ]*5[ ]+
[ ]*6[ ]+\# SSE instruction
[ ]*7[ ]+\?\?\?\? 0F58CA addps %xmm2,%xmm1
\*\*\*\* Error:SSE instruction `addps' is used
[ ]*8[ ]+
[ ]*9[ ]+\# SSE2 instruction
[ ]*10[ ]+\?\?\?\? 660F58CA addpd %xmm2,%xmm1
\*\*\*\* Error:SSE instruction `addpd' is used
[ ]*11[ ]+
[ ]*12[ ]+\# SSE3 instruction
[ ]*13[ ]+\?\?\?\? 660FD0CA addsubpd %xmm2,%xmm1
\*\*\*\* Error:SSE instruction `addsubpd' is used
[ ]*14[ ]+
[ ]*15[ ]+\# SSSE3 instruction
[ ]*16[ ]+\?\?\?\? 660F3801 phaddw %xmm2,%xmm1
\*\*\*\* Error:SSE instruction `phaddw' is used
[ ]*16[ ]+CA
[ ]*17[ ]+
[ ]*18[ ]+\# SSE4 instructions
[ ]*19[ ]+\?\?\?\? 660F3815 blendvpd %xmm0,%xmm1,%xmm0
\*\*\*\* Error:SSE instruction `blendvpd' is used
[ ]*19[ ]+C1
[ ]*20[ ]+\?\?\?\? 660F3837 pcmpgtq %xmm1,%xmm0
\*\*\*\* Error:SSE instruction `pcmpgtq' is used
[ ]*20[ ]+C1

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@ -0,0 +1 @@
.include "sse-check.s"

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@ -0,0 +1,18 @@
#source: sse-check.s
#as: -msse-check=warning
#stderr: sse-check-warn.e
#objdump: -dw
#name: x86-64 SSE check (warning)
.*: file format .*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: 0f 58 ca addps %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 58 ca addpd %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f d0 ca addsubpd %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 38 01 ca phaddw %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd %xmm0,%xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
#pass

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@ -0,0 +1,17 @@
#source: sse-check.s
#as: -msse-check=none
#objdump: -dw
#name: x86-64 SSE check (none)
.*: file format .*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: 0f 58 ca addps %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 58 ca addpd %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f d0 ca addsubpd %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 38 01 ca phaddw %xmm2,%xmm1
[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd %xmm0,%xmm1,%xmm0
[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
#pass