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gdb/csky complete csky_dwarf_reg_to_regnum

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For csky arch, the correspondence between Dwarf registers and GDB
registers are as follows:
dwarf regnos 0~31 ==> gdb regs r0~r31
dwarf regno  CSKY_HI_REGNUM(36) ==> gdb reg hi
dwarf regno  CSKY_LO_REGNUM(37) ==> gdb reg hi
dwarf regno  CSKY_PC_REGNUM(72) ==> gdb reg pc
dwarf regnos FV_PSEUDO_REGNO_FIRST(74)~FV_PSEUDO_REGNO_LAST(201)
==>
gdb regs s0~s127 (pseudo regs for float and vector regs)

other dwarf regnos have no corresponding gdb regs to them.
This commit is contained in:
Jiangshuai Li
2022-07-12 09:54:58 +08:00
parent 242f3484db
commit d5ffc11fcb
2 changed files with 26 additions and 3 deletions
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25
gdb/csky-tdep.c
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@ -2556,9 +2556,28 @@ csky_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
static int static int
csky_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg) csky_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
{ {
if (dw_reg < 0 || dw_reg >= CSKY_NUM_REGS) /* For GPRs. */
return -1; if (dw_reg >= CSKY_R0_REGNUM && dw_reg <= (CSKY_R0_REGNUM + 31))
return dw_reg; return dw_reg;
/* For Hi, Lo, PC. */
if ((dw_reg == CSKY_HI_REGNUM) || (dw_reg == CSKY_LO_REGNUM)
|| (dw_reg == CSKY_PC_REGNUM))
return dw_reg;
/* For Float and Vector pseudo registers. */
if ((dw_reg >= FV_PSEUDO_REGNO_FIRST) && (dw_reg <= FV_PSEUDO_REGNO_LAST))
{
char name_buf[4];
xsnprintf (name_buf, sizeof (name_buf), "s%d",
dw_reg - FV_PSEUDO_REGNO_FIRST);
return user_reg_map_name_to_regnum (gdbarch, name_buf,
strlen (name_buf));
}
/* Others, unknown. */
return -1;
} }
/* Override interface for command: info register. */ /* Override interface for command: info register. */

4
gdb/csky-tdep.h
View File

@ -108,6 +108,10 @@ enum csky_regnum
/* For fr0~fr15, fr16~fr31, vr0~vr15 check. */ /* For fr0~fr15, fr16~fr31, vr0~vr15 check. */
#define CSKY_FULL16_ONEHOT_VALUE 0xffff #define CSKY_FULL16_ONEHOT_VALUE 0xffff
/* Define for CSKY FV pseudo regs for dwarf regs. */
#define FV_PSEUDO_REGNO_FIRST 74
#define FV_PSEUDO_REGNO_LAST 201
/* Number of processor registers w/o ICE registers. */ /* Number of processor registers w/o ICE registers. */
#define CSKY_NUM_REGS (CSKY_MAX_REGS - CSKY_CRBANK_NUM_REGS) #define CSKY_NUM_REGS (CSKY_MAX_REGS - CSKY_CRBANK_NUM_REGS)