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https://github.com/espressif/binutils-gdb.git
synced 2025-09-11 16:46:14 +08:00
Optimize REP prefix check
gas/ * config/tc-i386.c (_i386_insn): Add rep_prefix. (md_assemble): Check if REP prefix is OK. (parse_insn): Remove expecting_string_instruction. Set i.rep_prefix. gas/testsuite/ * gas/i386/i386.exp: Run inval-rep and x86-64-inval-rep. * gas/i386/inval-rep.l: New file. * gas/i386/inval-rep.s: Likewise. * gas/i386/x86-64-inval-rep.l: Likewise. * gas/i386/x86-64-inval-rep.s: Likewise.
This commit is contained in:
@ -1,3 +1,10 @@
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2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
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* config/tc-i386.c (_i386_insn): Add rep_prefix.
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(md_assemble): Check if REP prefix is OK.
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(parse_insn): Remove expecting_string_instruction. Set
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i.rep_prefix.
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2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
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2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
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* config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
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* config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
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@ -290,6 +290,9 @@ struct _i386_insn
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disp_encoding_32bit
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disp_encoding_32bit
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} disp_encoding;
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} disp_encoding;
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/* REP prefix. */
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const char *rep_prefix;
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/* Have HLE prefix. */
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/* Have HLE prefix. */
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unsigned int have_hle;
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unsigned int have_hle;
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@ -3211,6 +3214,14 @@ md_assemble (char *line)
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if (!add_prefix (FWAIT_OPCODE))
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if (!add_prefix (FWAIT_OPCODE))
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return;
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return;
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/* Check if REP prefix is OK. */
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if (i.rep_prefix && !i.tm.opcode_modifier.repprefixok)
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{
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as_bad (_("invalid instruction `%s' after `%s'"),
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i.tm.name, i.rep_prefix);
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return;
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}
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/* Check for lock without a lockable instruction. Destination operand
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/* Check for lock without a lockable instruction. Destination operand
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must be memory unless it is xchg (0x86). */
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must be memory unless it is xchg (0x86). */
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if (i.prefix[LOCK_PREFIX]
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if (i.prefix[LOCK_PREFIX]
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@ -3359,9 +3370,6 @@ parse_insn (char *line, char *mnemonic)
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const insn_template *t;
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const insn_template *t;
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char *dot_p = NULL;
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char *dot_p = NULL;
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/* Non-zero if we found a prefix only acceptable with string insns. */
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const char *expecting_string_instruction = NULL;
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while (1)
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while (1)
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{
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{
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mnem_p = mnemonic;
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mnem_p = mnemonic;
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@ -3433,7 +3441,7 @@ parse_insn (char *line, char *mnemonic)
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if (current_templates->start->cpu_flags.bitfield.cpuhle)
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if (current_templates->start->cpu_flags.bitfield.cpuhle)
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i.have_hle = 1;
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i.have_hle = 1;
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else
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else
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expecting_string_instruction = current_templates->start->name;
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i.rep_prefix = current_templates->start->name;
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break;
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break;
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default:
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default:
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break;
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break;
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@ -3582,27 +3590,6 @@ skip:
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as_warn (_("use .code16 to ensure correct addressing mode"));
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as_warn (_("use .code16 to ensure correct addressing mode"));
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}
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}
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/* Check for rep/repne without a string (or other allowed) instruction. */
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if (expecting_string_instruction)
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{
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static templates override;
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for (t = current_templates->start; t < current_templates->end; ++t)
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if (t->opcode_modifier.repprefixok)
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break;
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if (t >= current_templates->end)
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{
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as_bad (_("expecting string instruction after `%s'"),
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expecting_string_instruction);
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return NULL;
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}
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for (override.start = t; t < current_templates->end; ++t)
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if (!t->opcode_modifier.repprefixok)
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break;
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override.end = t;
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current_templates = &override;
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}
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return l;
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return l;
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}
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}
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@ -1,3 +1,12 @@
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2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
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* gas/i386/i386.exp: Run inval-rep and x86-64-inval-rep.
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* gas/i386/inval-rep.l: New file.
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* gas/i386/inval-rep.s: Likewise.
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* gas/i386/x86-64-inval-rep.l: Likewise.
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* gas/i386/x86-64-inval-rep.s: Likewise.
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2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
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2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
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* gas/aarch64/crc32.s: New test.
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* gas/aarch64/crc32.s: New test.
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@ -85,6 +85,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
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run_dump_test "ssse3"
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run_dump_test "ssse3"
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run_dump_test "rep"
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run_dump_test "rep"
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run_dump_test "rep-suffix"
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run_dump_test "rep-suffix"
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run_list_test "inval-rep" "-al"
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run_dump_test "lock-1"
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run_dump_test "lock-1"
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run_dump_test "lock-1-intel"
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run_dump_test "lock-1-intel"
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run_list_test "lockbad-1" "-al"
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run_list_test "lockbad-1" "-al"
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@ -366,6 +367,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
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run_dump_test "x86-64-ssse3"
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run_dump_test "x86-64-ssse3"
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run_dump_test "x86-64-rep"
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run_dump_test "x86-64-rep"
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run_dump_test "x86-64-rep-suffix"
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run_dump_test "x86-64-rep-suffix"
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run_list_test "x86-64-inval-rep" "-al"
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run_dump_test "x86-64-lock-1"
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run_dump_test "x86-64-lock-1"
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run_dump_test "x86-64-lock-1-intel"
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run_dump_test "x86-64-lock-1-intel"
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run_list_test "x86-64-lockbad-1" "-al"
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run_list_test "x86-64-lockbad-1" "-al"
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15
gas/testsuite/gas/i386/inval-rep.l
Normal file
15
gas/testsuite/gas/i386/inval-rep.l
Normal file
@ -0,0 +1,15 @@
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.*: Assembler messages:
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.*:2: Error: .*
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.*:3: Error: .*
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.*:4: Error: .*
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.*:5: Error: .*
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.*:6: Error: .*
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GAS LISTING .*
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[ ]*1[ ]+\.text
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[ ]*2[ ]+rep add %ebx, %eax
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[ ]*3[ ]+repe add %ebx, %eax
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[ ]*4[ ]+repz add %ebx, %eax
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[ ]*5[ ]+repne add %ebx, %eax
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[ ]*6[ ]+repnz add %ebx, %eax
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6
gas/testsuite/gas/i386/inval-rep.s
Normal file
6
gas/testsuite/gas/i386/inval-rep.s
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@ -0,0 +1,6 @@
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.text
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rep add %ebx, %eax
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repe add %ebx, %eax
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repz add %ebx, %eax
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repne add %ebx, %eax
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repnz add %ebx, %eax
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15
gas/testsuite/gas/i386/x86-64-inval-rep.l
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15
gas/testsuite/gas/i386/x86-64-inval-rep.l
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@ -0,0 +1,15 @@
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.*: Assembler messages:
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.*:2: Error: .*
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.*:3: Error: .*
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.*:4: Error: .*
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.*:5: Error: .*
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.*:6: Error: .*
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GAS LISTING .*
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[ ]*1[ ]+\.text
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[ ]*2[ ]+rep add %rbx, %rax
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[ ]*3[ ]+repe add %rbx, %rax
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[ ]*4[ ]+repz add %rbx, %rax
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[ ]*5[ ]+repne add %rbx, %rax
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[ ]*6[ ]+repnz add %rbx, %rax
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6
gas/testsuite/gas/i386/x86-64-inval-rep.s
Normal file
6
gas/testsuite/gas/i386/x86-64-inval-rep.s
Normal file
@ -0,0 +1,6 @@
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.text
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rep add %rbx, %rax
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repe add %rbx, %rax
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repz add %rbx, %rax
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repne add %rbx, %rax
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repnz add %rbx, %rax
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