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https://github.com/espressif/binutils-gdb.git
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* sparc-dis.c (opcodes_initialized): Move inside print_insn_sparc.
(current_arch_mask): New static global. (compute_arch_mask): New static function. (print_insn_sparc): Delete sparc_v9_p. New static local current_mach. Resort opcode table if current_mach changes. Generalize "insn not supported" test. (compare_opcodes): Prefer supported opcodes to nonsupported ones. Delete test for v9/!v9. * sparc-opc.c (MASK_*): Use SPARC_OPCODE_ARCH_MASK. (v6notlet): Define. (brfc): Split into CBR and FBR for coprocessor/fp branches. (brfcx): Renamed to FBRX. (condfc): Renamed to CONDFC. Pass v6notlet to CBR (standard coprocessor mnemonics are not supported on the sparclet). (condf): Renamed to CONDF. (SLCBCC2): Delete F_ALIAS flag.
This commit is contained in:
David Edelsohn
@ -29,18 +29,21 @@ Boston, MA 02111-1307, USA. */
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#include "opcode/sparc.h"
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/* Some defines to make life easy. */
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#define MASK_V6 (1 << SPARC_OPCODE_ARCH_V6)
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#define MASK_V7 (1 << SPARC_OPCODE_ARCH_V7)
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#define MASK_V8 (1 << SPARC_OPCODE_ARCH_V8)
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#define MASK_SPARCLET (1 << SPARC_OPCODE_ARCH_SPARCLET)
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#define MASK_SPARCLITE (1 << SPARC_OPCODE_ARCH_SPARCLITE)
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#define MASK_V9 (1 << SPARC_OPCODE_ARCH_V9)
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#define MASK_V9A (1 << SPARC_OPCODE_ARCH_V9A)
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#define MASK_V6 SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V6)
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#define MASK_V7 SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V7)
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#define MASK_V8 SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V8)
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#define MASK_SPARCLET SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_SPARCLET)
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#define MASK_SPARCLITE SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_SPARCLITE)
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#define MASK_V9 SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9)
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#define MASK_V9A SPARC_OPCODE_ARCH_MASK (SPARC_OPCODE_ARCH_V9A)
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/* Bit masks of architectures supporting the insn. */
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#define v6 (MASK_V6 | MASK_V7 | MASK_V8 | MASK_SPARCLET \
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| MASK_SPARCLITE | MASK_V9 | MASK_V9A)
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/* v6 insns not supported on the sparclet */
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#define v6notlet (MASK_V6 | MASK_V7 | MASK_V8 \
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| MASK_SPARCLITE | MASK_V9 | MASK_V9A)
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#define v7 (MASK_V7 | MASK_V8 | MASK_SPARCLET \
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| MASK_SPARCLITE | MASK_V9 | MASK_V9A)
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/* Although not all insns are implemented in hardware, sparclite is defined
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@ -59,7 +62,9 @@ Boston, MA 02111-1307, USA. */
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| MASK_SPARCLET | MASK_SPARCLITE)
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/* Table of opcode architectures.
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The order is defined in opcode/sparc.h. */
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The order is defined in opcode/sparc.h.
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The names must match the arguments to gas' -A<arch> option in tc-sparc.c.
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*/
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const struct sparc_opcode_arch sparc_opcode_archs[] = {
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{ "v6", MASK_V6 },
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{ "v7", MASK_V6 | MASK_V7 },
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@ -67,6 +72,7 @@ const struct sparc_opcode_arch sparc_opcode_archs[] = {
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{ "sparclet", MASK_V6 | MASK_V7 | MASK_V8 | MASK_SPARCLET },
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{ "sparclite", MASK_V6 | MASK_V7 | MASK_V8 | MASK_SPARCLITE },
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/* ??? Don't some v8 priviledged insns conflict with v9? */
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/* ??? Will we want v8plus{,a} entries? */
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{ "v9", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 },
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/* v9 with ultrasparc additions */
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{ "v9a", MASK_V6 | MASK_V7 | MASK_V8 | MASK_V9 | MASK_V9A },
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@ -979,12 +985,12 @@ cond ("bcc", "tcc", CONDCC, F_CONDBR),
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cond ("bcs", "tcs", CONDCS, F_CONDBR),
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cond ("be", "te", CONDE, F_CONDBR),
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cond ("bg", "tg", CONDG, F_CONDBR),
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cond ("bgt", "tgt", CONDG, F_CONDBR|F_ALIAS),
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cond ("bgt", "tgt", CONDG, F_CONDBR|F_ALIAS),
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cond ("bge", "tge", CONDGE, F_CONDBR),
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cond ("bgeu", "tgeu", CONDGEU, F_CONDBR|F_ALIAS), /* for cc */
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cond ("bgu", "tgu", CONDGU, F_CONDBR),
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cond ("bl", "tl", CONDL, F_CONDBR),
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cond ("blt", "tlt", CONDL, F_CONDBR|F_ALIAS),
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cond ("blt", "tlt", CONDL, F_CONDBR|F_ALIAS),
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cond ("ble", "tle", CONDLE, F_CONDBR),
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cond ("bleu", "tleu", CONDLEU, F_CONDBR),
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cond ("blu", "tlu", CONDLU, F_CONDBR|F_ALIAS), /* for cs */
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@ -1249,11 +1255,18 @@ cond ("bz", "tz", CONDZ, F_CONDBR|F_ALIAS), /* for e */
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#undef FM_QF /* v9 */
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#undef FM_SF /* v9 */
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#define brfc(opcode, mask, lose, flags) \
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/* Coprocessor branches. */
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#define CBR(opcode, mask, lose, flags, arch) \
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{ opcode, (mask), ANNUL|(lose), "l", flags|F_DELAYED, arch }, \
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{ opcode, (mask)|ANNUL, (lose), ",a l", flags|F_DELAYED, arch }
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/* Floating point branches. */
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#define FBR(opcode, mask, lose, flags) \
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{ opcode, (mask), ANNUL|(lose), "l", flags|F_DELAYED, v6 }, \
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{ opcode, (mask)|ANNUL, (lose), ",a l", flags|F_DELAYED, v6 }
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#define brfcx(opcode, mask, lose, flags) /* v9 */ \
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/* V9 extended floating point branches. */
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#define FBRX(opcode, mask, lose, flags) /* v9 */ \
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{ opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), "6,G", flags|F_DELAYED, v9 }, \
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{ opcode, FBFCC(0)|(mask)|BPRED, ANNUL|FBFCC(~0)|(lose), ",T 6,G", flags|F_DELAYED, v9 }, \
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{ opcode, FBFCC(0)|(mask)|BPRED|ANNUL, FBFCC(~0)|(lose), ",a 6,G", flags|F_DELAYED, v9 }, \
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@ -1279,43 +1292,51 @@ cond ("bz", "tz", CONDZ, F_CONDBR|F_ALIAS), /* for e */
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{ opcode, FBFCC(3)|(mask), ANNUL|BPRED|FBFCC(~3)|(lose), ",N 9,G", flags|F_DELAYED, v9 }, \
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{ opcode, FBFCC(3)|(mask)|ANNUL, BPRED|FBFCC(~3)|(lose), ",a,N 9,G", flags|F_DELAYED, v9 }
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/* v9: We must put `brfcx' before `brfc', to ensure that we never match
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/* v9: We must put `FBRX' before `FBR', to ensure that we never match
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v9: something against an expression unless it is an expression. Otherwise,
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v9: we end up with undefined symbol tables entries, because they get added,
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v9: but are not deleted if the pattern fails to match. */
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#define condfc(fop, cop, mask, flags) \
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brfcx(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
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brfc(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
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brfc(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags)
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#define CONDFC(fop, cop, mask, flags) \
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FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
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FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
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CBR(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags, v6notlet)
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#define condf(fop, mask, flags) \
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brfcx(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
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brfc(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags)
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#define CONDFCL(fop, cop, mask, flags) \
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FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
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FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags), \
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CBR(cop, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)), flags, v6)
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condfc("fb", "cb", 0x8, 0),
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condfc("fba", "cba", 0x8, F_ALIAS),
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condfc("fbe", "cb0", 0x9, 0),
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condf("fbz", 0x9, F_ALIAS),
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condfc("fbg", "cb2", 0x6, 0),
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condfc("fbge", "cb02", 0xb, 0),
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condfc("fbl", "cb1", 0x4, 0),
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condfc("fble", "cb01", 0xd, 0),
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condfc("fblg", "cb12", 0x2, 0),
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condfc("fbn", "cbn", 0x0, 0),
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condfc("fbne", "cb123", 0x1, 0),
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condf("fbnz", 0x1, F_ALIAS),
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condfc("fbo", "cb012", 0xf, 0),
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condfc("fbu", "cb3", 0x7, 0),
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condfc("fbue", "cb03", 0xa, 0),
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condfc("fbug", "cb23", 0x5, 0),
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condfc("fbuge", "cb023", 0xc, 0),
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condfc("fbul", "cb13", 0x3, 0),
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condfc("fbule", "cb013", 0xe, 0),
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#define CONDF(fop, mask, flags) \
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FBRX(fop, F2(0, 5)|COND(mask), F2(~0, ~5)|COND(~(mask)), flags), /* v9 */ \
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FBR(fop, F2(0, 6)|COND(mask), F2(~0, ~6)|COND(~(mask)), flags)
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#undef condfc
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#undef brfc
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#undef brfcx /* v9 */
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CONDFC ("fb", "cb", 0x8, 0),
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CONDFCL ("fba", "cba", 0x8, F_ALIAS),
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CONDFC ("fbe", "cb0", 0x9, 0),
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CONDF ("fbz", 0x9, F_ALIAS),
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CONDFC ("fbg", "cb2", 0x6, 0),
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CONDFC ("fbge", "cb02", 0xb, 0),
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CONDFC ("fbl", "cb1", 0x4, 0),
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CONDFC ("fble", "cb01", 0xd, 0),
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CONDFC ("fblg", "cb12", 0x2, 0),
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CONDFCL ("fbn", "cbn", 0x0, 0),
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CONDFC ("fbne", "cb123", 0x1, 0),
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CONDF ("fbnz", 0x1, F_ALIAS),
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CONDFC ("fbo", "cb012", 0xf, 0),
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CONDFC ("fbu", "cb3", 0x7, 0),
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CONDFC ("fbue", "cb03", 0xa, 0),
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CONDFC ("fbug", "cb23", 0x5, 0),
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CONDFC ("fbuge", "cb023", 0xc, 0),
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CONDFC ("fbul", "cb13", 0x3, 0),
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CONDFC ("fbule", "cb013", 0xe, 0),
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#undef CONDFC
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#undef CONDFCL
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#undef CONDF
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#undef CBR
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#undef FBR
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#undef FBRX /* v9 */
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{ "jmp", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0|ASI(~0), "1+2", F_UNBR|F_DELAYED, v6 }, /* jmpl rs1+rs2,%g0 */
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{ "jmp", F3(2, 0x38, 0), F3(~2, ~0x38, ~0)|RD_G0|ASI_RS2(~0), "1", F_UNBR|F_DELAYED, v6 }, /* jmpl rs1+%g0,%g0 */
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@ -1516,14 +1537,14 @@ COMMUTEOP ("smuld", 0x0d, sparclet),
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{ "cpull", F3(2, 0x36, 0)|ASI(2), F3(~2, ~0x36, ~0)|ASI(~2)|RS1(~0)|RS2(~0), "d", 0, sparclet },
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/* sparclet coprocessor branch insns */
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/* FIXME: We have to mark these as aliases until we can sort opcodes based
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on selected cpu. */
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#define SLCBCC2(opcode, mask, lose) \
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{ opcode, (mask), ANNUL|(lose), "l", F_DELAYED|F_CONDBR|F_ALIAS, sparclet }, \
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{ opcode, (mask)|ANNUL, (lose), ",a l", F_DELAYED|F_CONDBR|F_ALIAS, sparclet }
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{ opcode, (mask), ANNUL|(lose), "l", F_DELAYED|F_CONDBR, sparclet }, \
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{ opcode, (mask)|ANNUL, (lose), ",a l", F_DELAYED|F_CONDBR, sparclet }
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#define SLCBCC(opcode, mask) \
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SLCBCC2(opcode, F2(0, 7)|COND(mask), F2(~0, ~7)|COND(~(mask)))
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/* cbn,cba can't be defined here because they're defined elsewhere and GAS
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requires all mnemonics of the same name to be consecutive. */
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/*SLCBCC("cbn", 0), - already defined */
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SLCBCC("cbe", 1),
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SLCBCC("cbf", 2),
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