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sim: aarch64: fix 64-bit immediate shifts
Trying to shift immediates 63 bits fails on 32-bit systems since UL is only 32-bits, not 64-bits. Switch to ULL to guarantee at least 64-bits here.
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@ -1,3 +1,7 @@
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2021-05-01 Mike Frysinger <vapier@gentoo.org>
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* simulator.c (do_fcvtzu): Change UL to ULL.
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2021-04-26 Mike Frysinger <vapier@gentoo.org>
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2021-04-26 Mike Frysinger <vapier@gentoo.org>
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* aclocal.m4, config.in, configure: Regenerate.
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* aclocal.m4, config.in, configure: Regenerate.
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@ -8420,7 +8420,7 @@ do_fcvtzu (sim_cpu *cpu)
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uint64_t value = (uint64_t) d;
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uint64_t value = (uint64_t) d;
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/* Do not raise an exception if we have reached ULONG_MAX. */
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/* Do not raise an exception if we have reached ULONG_MAX. */
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if (value != (1UL << 63))
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if (value != (1ULL << 63))
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RAISE_EXCEPTIONS (d, value, DOUBLE, ULONG);
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RAISE_EXCEPTIONS (d, value, DOUBLE, ULONG);
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aarch64_set_reg_u64 (cpu, rd, NO_SP, value);
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aarch64_set_reg_u64 (cpu, rd, NO_SP, value);
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@ -8431,7 +8431,7 @@ do_fcvtzu (sim_cpu *cpu)
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uint64_t value = (uint64_t) f;
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uint64_t value = (uint64_t) f;
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/* Do not raise an exception if we have reached ULONG_MAX. */
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/* Do not raise an exception if we have reached ULONG_MAX. */
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if (value != (1UL << 63))
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if (value != (1ULL << 63))
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RAISE_EXCEPTIONS (f, value, FLOAT, ULONG);
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RAISE_EXCEPTIONS (f, value, FLOAT, ULONG);
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aarch64_set_reg_u64 (cpu, rd, NO_SP, value);
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aarch64_set_reg_u64 (cpu, rd, NO_SP, value);
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