mirror of
https://github.com/espressif/binutils-gdb.git
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bfd/
* elf32-spu.c (build_stub): Always build "compact" sofware i-cache stubs. ld/ * emultempl/spuelf.em (PARSE_AND_LIST_ARGS_CASES): Always use compact stubs with software i-cache. ld/testsuite/ * ld-spu/icache1.d: Update for compact stubs.
This commit is contained in:
Ulrich Weigand
@ -1,3 +1,8 @@
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2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
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* elf32-spu.c (build_stub): Always build "compact" sofware
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i-cache stubs.
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2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
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* elf32-spu.c (struct spu_link_hash_table): Add fromelem_size_log2.
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@ -1271,7 +1271,8 @@ build_stub (struct bfd_link_info *info,
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bfd_put_32 (sec->owner, (dest & 0x3ffff) | (dest_ovl << 18),
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sec->contents + sec->size + 4);
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}
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else if (htab->params->ovly_flavour == ovly_soft_icache)
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else if (htab->params->ovly_flavour == ovly_soft_icache
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&& htab->params->compact_stub)
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{
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lrlive = 0;
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if (stub_type == nonovl_stub)
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@ -1357,61 +1358,32 @@ build_stub (struct bfd_link_info *info,
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+ htab->ovly_entry[1]->root.u.def.section->output_offset
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+ htab->ovly_entry[1]->root.u.def.section->output_section->vma);
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if (!htab->params->compact_stub)
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/* The branch that uses this stub goes to stub_addr + 4. We'll
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set up an xor pattern that can be used by the icache manager
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to modify this branch to go directly to its destination. */
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g->stub_addr += 4;
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br_dest = g->stub_addr;
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if (irela == NULL)
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{
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/* The branch that uses this stub goes to stub_addr + 12. We'll
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set up an xor pattern that can be used by the icache manager
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to modify this branch to go directly to its destination. */
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g->stub_addr += 12;
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br_dest = g->stub_addr;
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if (irela == NULL)
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{
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/* Except in the case of _SPUEAR_ stubs, the branch in
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question is the one in the stub itself. */
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BFD_ASSERT (stub_type == nonovl_stub);
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g->br_addr = g->stub_addr;
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br_dest = to;
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}
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bfd_put_32 (sec->owner, dest_ovl - 1,
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sec->contents + sec->size + 0);
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set_id = ((dest_ovl - 1) >> htab->num_lines_log2) + 1;
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bfd_put_32 (sec->owner, (set_id << 18) | (dest & 0x3ffff),
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sec->contents + sec->size + 4);
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bfd_put_32 (sec->owner, (lrlive << 29) | (g->br_addr & 0x3ffff),
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sec->contents + sec->size + 8);
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bfd_put_32 (sec->owner, BRASL + ((to << 5) & 0x007fff80) + 75,
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sec->contents + sec->size + 12);
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patt = dest ^ br_dest;
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if (irela != NULL && ELF32_R_TYPE (irela->r_info) == R_SPU_REL16)
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patt = (dest - g->br_addr) ^ (br_dest - g->br_addr);
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bfd_put_32 (sec->owner, (patt << 5) & 0x007fff80,
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sec->contents + sec->size + 16 + (g->br_addr & 0xf));
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/* Except in the case of _SPUEAR_ stubs, the branch in
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question is the one in the stub itself. */
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BFD_ASSERT (stub_type == nonovl_stub);
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g->br_addr = g->stub_addr;
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br_dest = to;
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}
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else
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{
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g->stub_addr += 4;
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br_dest = g->stub_addr;
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if (irela == NULL)
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{
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BFD_ASSERT (stub_type == nonovl_stub);
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g->br_addr = g->stub_addr;
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br_dest = to;
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}
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set_id = ((dest_ovl - 1) >> htab->num_lines_log2) + 1;
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bfd_put_32 (sec->owner, (set_id << 18) | (dest & 0x3ffff),
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sec->contents + sec->size);
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bfd_put_32 (sec->owner, BRASL + ((to << 5) & 0x007fff80) + 75,
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sec->contents + sec->size + 4);
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bfd_put_32 (sec->owner, (lrlive << 29) | (g->br_addr & 0x3ffff),
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sec->contents + sec->size + 8);
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patt = dest ^ br_dest;
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if (irela != NULL && ELF32_R_TYPE (irela->r_info) == R_SPU_REL16)
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patt = (dest - g->br_addr) ^ (br_dest - g->br_addr);
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bfd_put_32 (sec->owner, (patt << 5) & 0x007fff80,
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sec->contents + sec->size + 12);
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}
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set_id = ((dest_ovl - 1) >> htab->num_lines_log2) + 1;
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bfd_put_32 (sec->owner, (set_id << 18) | (dest & 0x3ffff),
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sec->contents + sec->size);
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bfd_put_32 (sec->owner, BRASL + ((to << 5) & 0x007fff80) + 75,
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sec->contents + sec->size + 4);
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bfd_put_32 (sec->owner, (lrlive << 29) | (g->br_addr & 0x3ffff),
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sec->contents + sec->size + 8);
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patt = dest ^ br_dest;
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if (irela != NULL && ELF32_R_TYPE (irela->r_info) == R_SPU_REL16)
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patt = (dest - g->br_addr) ^ (br_dest - g->br_addr);
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bfd_put_32 (sec->owner, (patt << 5) & 0x007fff80,
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sec->contents + sec->size + 12);
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if (ovl == 0)
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/* Extra space for linked list entries. */
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@ -1,3 +1,8 @@
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2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
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* emultempl/spuelf.em (PARSE_AND_LIST_ARGS_CASES): Always use
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compact stubs with software i-cache.
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2009-05-14 Alan Modra <amodra@bigpond.net.au>
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* emultempl/spuelf.em (spu_before_allocation): Call
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@ -719,6 +719,8 @@ PARSE_AND_LIST_ARGS_CASES='
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case OPTION_SPU_SOFT_ICACHE:
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params.ovly_flavour = ovly_soft_icache;
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/* Software i-cache stubs are always "compact". */
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params.compact_stub = 1;
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if (!num_lines_set)
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params.num_lines = 32;
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else if ((params.num_lines & -params.num_lines) != params.num_lines)
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@ -1,3 +1,7 @@
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2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
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* ld-spu/icache1.d: Update for compact stubs.
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2009-05-14 Ulrich Weigand <uweigand@de.ibm.com>
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* ld-spu/icache1.d: Update all addresses to accomodate icache
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@ -26,30 +26,23 @@ Disassembly of section \.ovly2:
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.* 24 00 40 80 stqd \$0,16\(\$1\)
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.* 1c f0 00 81 ai \$1,\$1,-64
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.* 24 00 00 81 stqd \$1,0\(\$1\)
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.* 33 00 73 80 brsl \$0,7ac .*
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.* 33 00 77 00 brsl \$0,7cc .*
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.* 33 00 78 80 brsl \$0,7d4 .*
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.* 33 00 7a 00 brsl \$0,7e4 .*
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\.\.\.
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.* 32 00 16 80 br 7ec .*
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.* 32 00 17 80 br 7f4 .*
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\.\.\.
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7a0: 00 00 00 02.*
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7a4: 00 04 09 04.*
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7a8: a0 00 04 10.*
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7ac: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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7b0: 00 00 ed 00.*
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\.\.\.
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7c0: 00 00 00 02.*
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7c4: 00 04 08 00.*
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7c8: a0 00 04 14.*
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7cc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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7d0: 00 00 00 00.*
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7d4: 00 00 0a 80.*
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\.\.\.
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7e4: 00 04 00 00.*
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7e8: 20 00 07 38.*
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7ec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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\.\.\.
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7f8: 00 7f 0f 80.*
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7fc: 00 00 00 00.*
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7d0: 00 04 09 04.*
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7d4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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7d8: a0 00 04 10.*
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7dc: 00 00 e6 00.*
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7e0: 00 04 08 00.*
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7e4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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7e8: a0 00 04 14.*
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7ec: 00 00 07 80.*
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7f0: 00 04 00 00.*
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7f4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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7f8: 20 00 07 38.*
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7fc: 00 7f 0e 80.*
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Disassembly of section \.ovly3:
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@ -86,43 +79,33 @@ Disassembly of section \.ovly5:
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.* 42 01 00 03 ila \$3,200 .*
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.* 18 00 c0 81 a \$1,\$1,\$3
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.* 34 00 40 80 lqd \$0,16\(\$1\)
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.* 30 00 7d 80 bra 3ec .*
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.* 30 00 7e 80 bra 3f4 .*
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\.\.\.
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3e0: 00 00 00 03.*
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3e4: 00 04 0c 00.*
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3e8: a0 00 03 2c.*
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3ec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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\.\.\.
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3fc: 00 01 fd 80.*
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3f0: 00 04 0c 00.*
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3f4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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3f8: a0 00 03 2c.*
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3fc: 00 01 fe 80.*
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Disassembly of section \.ovly6:
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00000400 <\.ovly6>:
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.* 31 00 f5 80 brasl \$0,7ac .*
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.* 33 00 79 00 brsl \$0,7cc .*
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.* 31 00 fa 80 brasl \$0,7d4 .*
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.* 33 00 7c 00 brsl \$0,7e4 .*
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\.\.\.
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.* 32 00 18 80 br 7ec .*
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.* 32 00 19 80 br 7f4 .*
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\.\.\.
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7a0: 00 00 00 07.*
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7a4: 00 08 0c 00.*
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7a8: a0 00 04 00.*
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7ac: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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7b0: 00 01 75 80.*
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\.\.\.
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7c0: 00 00 00 07.*
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7c4: 00 08 0c 00.*
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7c8: a0 00 04 04.*
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7cc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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7d0: 00 00 00 00.*
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7d4: 00 00 86 80.*
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\.\.\.
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7e0: 00 00 00 04.*
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7e4: 00 08 00 00.*
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7e8: 20 00 07 28.*
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7ec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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\.\.\.
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7f8: 00 7f 03 80.*
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7fc: 00 00 00 00.*
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7d0: 00 08 0c 00.*
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7d4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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7d8: a0 00 04 00.*
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7dc: 00 01 7a 80.*
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7e0: 00 08 0c 00.*
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7e4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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7e8: a0 00 04 04.*
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7ec: 00 00 83 80.*
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7f0: 00 08 00 00.*
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7f4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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7f8: 20 00 07 28.*
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7fc: 00 7f 02 80.*
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Disassembly of section \.ovly7:
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@ -133,32 +116,24 @@ Disassembly of section \.ovly7:
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.* 00 20 00 00 lnop
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.* 04 00 02 01 ori \$1,\$4,0
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.* 24 00 02 04 stqd \$4,0\(\$4\)
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.* 33 00 72 80 brsl \$0,bac .*
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.* 33 00 76 00 brsl \$0,bcc .*
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.* 33 00 77 80 brsl \$0,bd4 .*
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.* 33 00 79 00 brsl \$0,be4 .*
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.* 34 00 00 81 lqd \$1,0\(\$1\)
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\.\.\.
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.* 32 00 15 00 br bec .*
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\.\.\.
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ba0: 00 00 00 03.*
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ba4: 00 04 0c 00.*
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ba8: a0 00 08 18.*
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bac: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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\.\.\.
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bb8: 00 00 0f 80.*
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bbc: 00 00 00 00.*
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bc0: 00 00 00 07.*
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bc4: 00 08 0c 00.*
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bc8: a0 00 08 1c.*
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bcc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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.* 32 00 16 00 br bf4 .*
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\.\.\.
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bd0: 00 04 0c 00.*
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bd4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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bd8: a0 00 08 18.*
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bdc: 00 00 0a 80.*
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be0: 00 00 00 05.*
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be4: 00 08 04 00.*
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be8: 20 00 0b 44.*
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bec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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bf0: 00 00 00 00.*
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bf4: 00 7f 02 80.*
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\.\.\.
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be0: 00 08 0c 00.*
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be4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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be8: a0 00 08 1c.*
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bec: 00 00 05 80.*
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bf0: 00 08 04 00.*
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bf4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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bf8: 20 00 0b 44.*
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bfc: 00 7f 01 80.*
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Disassembly of section \.ovly8:
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@ -166,39 +141,32 @@ Disassembly of section \.ovly8:
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.* 24 00 40 80 stqd \$0,16\(\$1\)
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.* 24 f8 00 81 stqd \$1,-512\(\$1\)
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.* 1c 80 00 81 ai \$1,\$1,-512
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.* 31 01 f9 80 brasl \$0,fcc .*
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.* 31 01 fc 80 brasl \$0,fe4 .*
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\.\.\.
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.* 32 00 17 80 br fec .*
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\.\.\.
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fc0: 00 00 00 02.*
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fc4: 00 04 09 04.*
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fc8: a0 00 0c 0c.*
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fcc: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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\.\.\.
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fdc: 00 00 d9 00.*
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fe0: 00 00 00 06.*
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fe4: 00 08 08 00.*
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fe8: 20 00 0f 30.*
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fec: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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ff0: 00 7f 0d 80.*
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.* 32 00 18 80 br ff4 .*
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\.\.\.
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fe0: 00 04 09 04.*
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fe4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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fe8: a0 00 0c 0c.*
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fec: 00 00 dc 00.*
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ff0: 00 08 08 00.*
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ff4: 31 02 01 cb brasl \$75,100c <__icache_br_handler>
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ff8: 20 00 0f 30.*
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ffc: 00 7f 02 80.*
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Disassembly of section \.text:
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00001000 <_start>:
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.* 41 00 02 03 ilhu \$3,4
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.* 60 86 00 03 iohl \$3,3072 # c00
|
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.* 32 00 04 80 br 102c.*
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.* 32 00 03 80 br 1024.*
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0000100c <__icache_br_handler>:
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100c: 00 00 00 00 stop
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00001010 <__icache_call_handler>:
|
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\.\.\.
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1020: 00 00 00 01.*
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1024: 00 04 04 00.*
|
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1020: 00 04 04 00.*
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1024: 31 02 02 4b brasl \$75,1010 <__icache_call_handler>
|
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1028: a0 00 10 08.*
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102c: 31 02 02 4b brasl \$75,1010 <__icache_call_handler>
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\.\.\.
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1038: 00 7e 7b 80.*
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\.\.\.
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102c: 00 7e 7c 80.*
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#pass
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Block a user