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x86: fix 3-operand insn reverse-matching
The middle operand would have gone entirely unchecked, allowing e.g. vmovss %xmm0, %esp, %xmm2 to assemble successfully, or e.g. vmovss %xmm0, $4, %xmm2 causing an internal error. Alongside dealing with this also drop a related comment, which hasn't been applicable anymore since the introduction of 3-operand patterns with D set (and which perhaps never had been logical to be there, as reverse-matched insns don't make it there in the first place).
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@ -6724,8 +6724,12 @@ match_template (char mnem_suffix)
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/* Try reversing direction of operands. */
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overlap0 = operand_type_and (i.types[0], operand_types[i.operands - 1]);
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overlap1 = operand_type_and (i.types[i.operands - 1], operand_types[0]);
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overlap2 = operand_type_and (i.types[1], operand_types[1]);
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gas_assert (t->operands != 3 || !check_register);
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if (!operand_type_match (overlap0, i.types[0])
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|| !operand_type_match (overlap1, i.types[i.operands - 1])
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|| (t->operands == 3
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&& !operand_type_match (overlap2, i.types[1]))
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|| (check_register
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&& !operand_type_register_match (i.types[0],
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operand_types[i.operands - 1],
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@ -6797,8 +6801,6 @@ match_template (char mnem_suffix)
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continue;
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/* Fall through. */
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case 3:
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/* Here we make use of the fact that there are no
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reverse match 3 operand instructions. */
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if (!operand_type_match (overlap2, i.types[2])
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|| ((check_register & 5) == 5
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&& !operand_type_register_match (i.types[0],
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@ -2,20 +2,13 @@
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.*:4: Error: .*
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.*:5: Error: .*
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.*:6: Error: .*
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.*:9: Error:.* ambiguous .* `vcvtpd2dq'
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.*:10: Error:.* ambiguous .* `vcvtpd2ps'
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.*:11: Error:.* ambiguous .* `vcvttpd2dq'
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.*:8: Error: .*
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.*:9: Error: .*
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.*:10: Error: .*
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.*:11: Error: .*
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.*:12: Error: .*
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.*:15: Error:.* ambiguous .* `vcvtpd2dq'
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.*:16: Error:.* ambiguous .* `vcvtpd2ps'
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.*:17: Error:.* ambiguous .* `vcvttpd2dq'
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GAS LISTING .*
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[ ]*1[ ]+\# Check illegal AVX instructions
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[ ]*2[ ]+\.text
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[ ]*3[ ]+_start:
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[ ]*4[ ]+vcvtpd2dq \(%ecx\),%xmm2
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[ ]*5[ ]+vcvtpd2ps \(%ecx\),%xmm2
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[ ]*6[ ]+vcvttpd2dq \(%ecx\),%xmm2
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[ ]*7[ ]+
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[ ]*8[ ]+\.intel_syntax noprefix
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[ ]*9[ ]+vcvtpd2dq xmm2,\[ecx\]
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[ ]*10[ ]+vcvtpd2ps xmm2,\[ecx\]
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[ ]*11[ ]+vcvttpd2dq xmm2,\[ecx\]
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#pass
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@ -5,6 +5,12 @@ _start:
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vcvtpd2ps (%ecx),%xmm2
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vcvttpd2dq (%ecx),%xmm2
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vmovss %xmm0, (%esp), %xmm2
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vmovss %xmm0, $4, %xmm2
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vmovss %xmm0, %cr0, %xmm2
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vmovss %xmm0, %ymm4, %xmm2
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vmovss %xmm0, %mm4, %xmm2
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.intel_syntax noprefix
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vcvtpd2dq xmm2,[ecx]
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vcvtpd2ps xmm2,[ecx]
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