[AARCH64] Remove Load/Store register (unscaled immediate) alias.

opcodes/ChangeLog:

2015-03-10  Renlin Li  <renlin.li@arm.com>

	* aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
         stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
         related alias.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Likewise.
	* aarch64-opc-2.c: Likewise.

gas/testsuite/ChangeLog:

2015-03-10  Renlin Li  <renlin.li@arm.com>

	* gas/aarch64/ldst-reg-uns-imm.d: Adjust expected output.
	* gas/aarch64/ldst-reg-unscaled-imm.d: Likewise.
	* gas/aarch64/reloc-insn.d: Likewise.
This commit is contained in:
Jiong Wang
2015-03-10 11:27:56 +00:00
parent a578ef7ed4
commit c8f89a3423
9 changed files with 643 additions and 690 deletions

View File

@ -1,4 +1,8 @@
2015-03-10 Matthew Wahab <matthew.wahab@arm.com> 2015-03-10 Renlin Li <renlin.li@arm.com>
* gas/aarch64/ldst-reg-uns-imm.d: Adjust expected output.
* gas/aarch64/ldst-reg-unscaled-imm.d: Likewise.
* gas/aarch64/reloc-insn.d: Likewise.2015-03-10 Matthew Wahab <matthew.wahab@arm.com>
* gas/aarch64/codealign.d: Add test for code section alignment. * gas/aarch64/codealign.d: Add test for code section alignment.
* gas/aarch64/codealign.s: New file. * gas/aarch64/codealign.s: New file.

View File

@ -5,8 +5,8 @@
Disassembly of section \.text: Disassembly of section \.text:
0000000000000000 <.*>: 0000000000000000 <.*>:
0: 3c1003e7 str b7, \[sp,#-256\] 0: 3c1003e7 stur b7, \[sp,#-256\]
4: 3c1553e7 str b7, \[sp,#-171\] 4: 3c1553e7 stur b7, \[sp,#-171\]
8: 3d0003e7 str b7, \[sp\] 8: 3d0003e7 str b7, \[sp\]
c: 3d0003e7 str b7, \[sp\] c: 3d0003e7 str b7, \[sp\]
10: 3d000be7 str b7, \[sp,#2\] 10: 3d000be7 str b7, \[sp,#2\]
@ -16,52 +16,52 @@ Disassembly of section \.text:
20: 3d0157e7 str b7, \[sp,#85\] 20: 3d0157e7 str b7, \[sp,#85\]
24: 3d03ffe7 str b7, \[sp,#255\] 24: 3d03ffe7 str b7, \[sp,#255\]
28: 3d3fffe7 str b7, \[sp,#4095\] 28: 3d3fffe7 str b7, \[sp,#4095\]
2c: 7c1003e7 str h7, \[sp,#-256\] 2c: 7c1003e7 stur h7, \[sp,#-256\]
30: 7c1553e7 str h7, \[sp,#-171\] 30: 7c1553e7 stur h7, \[sp,#-171\]
34: 7d0003e7 str h7, \[sp\] 34: 7d0003e7 str h7, \[sp\]
38: 7d0003e7 str h7, \[sp\] 38: 7d0003e7 str h7, \[sp\]
3c: 7d0007e7 str h7, \[sp,#2\] 3c: 7d0007e7 str h7, \[sp,#2\]
40: 7d000be7 str h7, \[sp,#4\] 40: 7d000be7 str h7, \[sp,#4\]
44: 7d0013e7 str h7, \[sp,#8\] 44: 7d0013e7 str h7, \[sp,#8\]
48: 7d0023e7 str h7, \[sp,#16\] 48: 7d0023e7 str h7, \[sp,#16\]
4c: 7c0553e7 str h7, \[sp,#85\] 4c: 7c0553e7 stur h7, \[sp,#85\]
50: 7c0ff3e7 str h7, \[sp,#255\] 50: 7c0ff3e7 stur h7, \[sp,#255\]
54: 7d3fffe7 str h7, \[sp,#8190\] 54: 7d3fffe7 str h7, \[sp,#8190\]
58: bc1003e7 str s7, \[sp,#-256\] 58: bc1003e7 stur s7, \[sp,#-256\]
5c: bc1553e7 str s7, \[sp,#-171\] 5c: bc1553e7 stur s7, \[sp,#-171\]
60: bd0003e7 str s7, \[sp\] 60: bd0003e7 str s7, \[sp\]
64: bd0003e7 str s7, \[sp\] 64: bd0003e7 str s7, \[sp\]
68: bc0023e7 str s7, \[sp,#2\] 68: bc0023e7 stur s7, \[sp,#2\]
6c: bd0007e7 str s7, \[sp,#4\] 6c: bd0007e7 str s7, \[sp,#4\]
70: bd000be7 str s7, \[sp,#8\] 70: bd000be7 str s7, \[sp,#8\]
74: bd0013e7 str s7, \[sp,#16\] 74: bd0013e7 str s7, \[sp,#16\]
78: bc0553e7 str s7, \[sp,#85\] 78: bc0553e7 stur s7, \[sp,#85\]
7c: bc0ff3e7 str s7, \[sp,#255\] 7c: bc0ff3e7 stur s7, \[sp,#255\]
80: bd3fffe7 str s7, \[sp,#16380\] 80: bd3fffe7 str s7, \[sp,#16380\]
84: fc1003e7 str d7, \[sp,#-256\] 84: fc1003e7 stur d7, \[sp,#-256\]
88: fc1553e7 str d7, \[sp,#-171\] 88: fc1553e7 stur d7, \[sp,#-171\]
8c: fd0003e7 str d7, \[sp\] 8c: fd0003e7 str d7, \[sp\]
90: fd0003e7 str d7, \[sp\] 90: fd0003e7 str d7, \[sp\]
94: fc0023e7 str d7, \[sp,#2\] 94: fc0023e7 stur d7, \[sp,#2\]
98: fc0043e7 str d7, \[sp,#4\] 98: fc0043e7 stur d7, \[sp,#4\]
9c: fd0007e7 str d7, \[sp,#8\] 9c: fd0007e7 str d7, \[sp,#8\]
a0: fd000be7 str d7, \[sp,#16\] a0: fd000be7 str d7, \[sp,#16\]
a4: fc0553e7 str d7, \[sp,#85\] a4: fc0553e7 stur d7, \[sp,#85\]
a8: fc0ff3e7 str d7, \[sp,#255\] a8: fc0ff3e7 stur d7, \[sp,#255\]
ac: fd3fffe7 str d7, \[sp,#32760\] ac: fd3fffe7 str d7, \[sp,#32760\]
b0: 3c9003e7 str q7, \[sp,#-256\] b0: 3c9003e7 stur q7, \[sp,#-256\]
b4: 3c9553e7 str q7, \[sp,#-171\] b4: 3c9553e7 stur q7, \[sp,#-171\]
b8: 3d8003e7 str q7, \[sp\] b8: 3d8003e7 str q7, \[sp\]
bc: 3d8003e7 str q7, \[sp\] bc: 3d8003e7 str q7, \[sp\]
c0: 3c8023e7 str q7, \[sp,#2\] c0: 3c8023e7 stur q7, \[sp,#2\]
c4: 3c8043e7 str q7, \[sp,#4\] c4: 3c8043e7 stur q7, \[sp,#4\]
c8: 3c8083e7 str q7, \[sp,#8\] c8: 3c8083e7 stur q7, \[sp,#8\]
cc: 3d8007e7 str q7, \[sp,#16\] cc: 3d8007e7 str q7, \[sp,#16\]
d0: 3c8553e7 str q7, \[sp,#85\] d0: 3c8553e7 stur q7, \[sp,#85\]
d4: 3c8ff3e7 str q7, \[sp,#255\] d4: 3c8ff3e7 stur q7, \[sp,#255\]
d8: 3dbfffe7 str q7, \[sp,#65520\] d8: 3dbfffe7 str q7, \[sp,#65520\]
dc: 3c5003e7 ldr b7, \[sp,#-256\] dc: 3c5003e7 ldur b7, \[sp,#-256\]
e0: 3c5553e7 ldr b7, \[sp,#-171\] e0: 3c5553e7 ldur b7, \[sp,#-171\]
e4: 3d4003e7 ldr b7, \[sp\] e4: 3d4003e7 ldr b7, \[sp\]
e8: 3d4003e7 ldr b7, \[sp\] e8: 3d4003e7 ldr b7, \[sp\]
ec: 3d400be7 ldr b7, \[sp,#2\] ec: 3d400be7 ldr b7, \[sp,#2\]
@ -71,52 +71,52 @@ Disassembly of section \.text:
fc: 3d4157e7 ldr b7, \[sp,#85\] fc: 3d4157e7 ldr b7, \[sp,#85\]
100: 3d43ffe7 ldr b7, \[sp,#255\] 100: 3d43ffe7 ldr b7, \[sp,#255\]
104: 3d7fffe7 ldr b7, \[sp,#4095\] 104: 3d7fffe7 ldr b7, \[sp,#4095\]
108: 7c5003e7 ldr h7, \[sp,#-256\] 108: 7c5003e7 ldur h7, \[sp,#-256\]
10c: 7c5553e7 ldr h7, \[sp,#-171\] 10c: 7c5553e7 ldur h7, \[sp,#-171\]
110: 7d4003e7 ldr h7, \[sp\] 110: 7d4003e7 ldr h7, \[sp\]
114: 7d4003e7 ldr h7, \[sp\] 114: 7d4003e7 ldr h7, \[sp\]
118: 7d4007e7 ldr h7, \[sp,#2\] 118: 7d4007e7 ldr h7, \[sp,#2\]
11c: 7d400be7 ldr h7, \[sp,#4\] 11c: 7d400be7 ldr h7, \[sp,#4\]
120: 7d4013e7 ldr h7, \[sp,#8\] 120: 7d4013e7 ldr h7, \[sp,#8\]
124: 7d4023e7 ldr h7, \[sp,#16\] 124: 7d4023e7 ldr h7, \[sp,#16\]
128: 7c4553e7 ldr h7, \[sp,#85\] 128: 7c4553e7 ldur h7, \[sp,#85\]
12c: 7c4ff3e7 ldr h7, \[sp,#255\] 12c: 7c4ff3e7 ldur h7, \[sp,#255\]
130: 7d7fffe7 ldr h7, \[sp,#8190\] 130: 7d7fffe7 ldr h7, \[sp,#8190\]
134: bc5003e7 ldr s7, \[sp,#-256\] 134: bc5003e7 ldur s7, \[sp,#-256\]
138: bc5553e7 ldr s7, \[sp,#-171\] 138: bc5553e7 ldur s7, \[sp,#-171\]
13c: bd4003e7 ldr s7, \[sp\] 13c: bd4003e7 ldr s7, \[sp\]
140: bd4003e7 ldr s7, \[sp\] 140: bd4003e7 ldr s7, \[sp\]
144: bc4023e7 ldr s7, \[sp,#2\] 144: bc4023e7 ldur s7, \[sp,#2\]
148: bd4007e7 ldr s7, \[sp,#4\] 148: bd4007e7 ldr s7, \[sp,#4\]
14c: bd400be7 ldr s7, \[sp,#8\] 14c: bd400be7 ldr s7, \[sp,#8\]
150: bd4013e7 ldr s7, \[sp,#16\] 150: bd4013e7 ldr s7, \[sp,#16\]
154: bc4553e7 ldr s7, \[sp,#85\] 154: bc4553e7 ldur s7, \[sp,#85\]
158: bc4ff3e7 ldr s7, \[sp,#255\] 158: bc4ff3e7 ldur s7, \[sp,#255\]
15c: bd7fffe7 ldr s7, \[sp,#16380\] 15c: bd7fffe7 ldr s7, \[sp,#16380\]
160: fc5003e7 ldr d7, \[sp,#-256\] 160: fc5003e7 ldur d7, \[sp,#-256\]
164: fc5553e7 ldr d7, \[sp,#-171\] 164: fc5553e7 ldur d7, \[sp,#-171\]
168: fd4003e7 ldr d7, \[sp\] 168: fd4003e7 ldr d7, \[sp\]
16c: fd4003e7 ldr d7, \[sp\] 16c: fd4003e7 ldr d7, \[sp\]
170: fc4023e7 ldr d7, \[sp,#2\] 170: fc4023e7 ldur d7, \[sp,#2\]
174: fc4043e7 ldr d7, \[sp,#4\] 174: fc4043e7 ldur d7, \[sp,#4\]
178: fd4007e7 ldr d7, \[sp,#8\] 178: fd4007e7 ldr d7, \[sp,#8\]
17c: fd400be7 ldr d7, \[sp,#16\] 17c: fd400be7 ldr d7, \[sp,#16\]
180: fc4553e7 ldr d7, \[sp,#85\] 180: fc4553e7 ldur d7, \[sp,#85\]
184: fc4ff3e7 ldr d7, \[sp,#255\] 184: fc4ff3e7 ldur d7, \[sp,#255\]
188: fd7fffe7 ldr d7, \[sp,#32760\] 188: fd7fffe7 ldr d7, \[sp,#32760\]
18c: 3cd003e7 ldr q7, \[sp,#-256\] 18c: 3cd003e7 ldur q7, \[sp,#-256\]
190: 3cd553e7 ldr q7, \[sp,#-171\] 190: 3cd553e7 ldur q7, \[sp,#-171\]
194: 3dc003e7 ldr q7, \[sp\] 194: 3dc003e7 ldr q7, \[sp\]
198: 3dc003e7 ldr q7, \[sp\] 198: 3dc003e7 ldr q7, \[sp\]
19c: 3cc023e7 ldr q7, \[sp,#2\] 19c: 3cc023e7 ldur q7, \[sp,#2\]
1a0: 3cc043e7 ldr q7, \[sp,#4\] 1a0: 3cc043e7 ldur q7, \[sp,#4\]
1a4: 3cc083e7 ldr q7, \[sp,#8\] 1a4: 3cc083e7 ldur q7, \[sp,#8\]
1a8: 3dc007e7 ldr q7, \[sp,#16\] 1a8: 3dc007e7 ldr q7, \[sp,#16\]
1ac: 3cc553e7 ldr q7, \[sp,#85\] 1ac: 3cc553e7 ldur q7, \[sp,#85\]
1b0: 3ccff3e7 ldr q7, \[sp,#255\] 1b0: 3ccff3e7 ldur q7, \[sp,#255\]
1b4: 3dffffe7 ldr q7, \[sp,#65520\] 1b4: 3dffffe7 ldr q7, \[sp,#65520\]
1b8: 381003e7 strb w7, \[sp,#-256\] 1b8: 381003e7 sturb w7, \[sp,#-256\]
1bc: 381553e7 strb w7, \[sp,#-171\] 1bc: 381553e7 sturb w7, \[sp,#-171\]
1c0: 390003e7 strb w7, \[sp\] 1c0: 390003e7 strb w7, \[sp\]
1c4: 390003e7 strb w7, \[sp\] 1c4: 390003e7 strb w7, \[sp\]
1c8: 39000be7 strb w7, \[sp,#2\] 1c8: 39000be7 strb w7, \[sp,#2\]
@ -126,41 +126,41 @@ Disassembly of section \.text:
1d8: 390157e7 strb w7, \[sp,#85\] 1d8: 390157e7 strb w7, \[sp,#85\]
1dc: 3903ffe7 strb w7, \[sp,#255\] 1dc: 3903ffe7 strb w7, \[sp,#255\]
1e0: 393fffe7 strb w7, \[sp,#4095\] 1e0: 393fffe7 strb w7, \[sp,#4095\]
1e4: 781003e7 strh w7, \[sp,#-256\] 1e4: 781003e7 sturh w7, \[sp,#-256\]
1e8: 781553e7 strh w7, \[sp,#-171\] 1e8: 781553e7 sturh w7, \[sp,#-171\]
1ec: 790003e7 strh w7, \[sp\] 1ec: 790003e7 strh w7, \[sp\]
1f0: 790003e7 strh w7, \[sp\] 1f0: 790003e7 strh w7, \[sp\]
1f4: 790007e7 strh w7, \[sp,#2\] 1f4: 790007e7 strh w7, \[sp,#2\]
1f8: 79000be7 strh w7, \[sp,#4\] 1f8: 79000be7 strh w7, \[sp,#4\]
1fc: 790013e7 strh w7, \[sp,#8\] 1fc: 790013e7 strh w7, \[sp,#8\]
200: 790023e7 strh w7, \[sp,#16\] 200: 790023e7 strh w7, \[sp,#16\]
204: 780553e7 strh w7, \[sp,#85\] 204: 780553e7 sturh w7, \[sp,#85\]
208: 780ff3e7 strh w7, \[sp,#255\] 208: 780ff3e7 sturh w7, \[sp,#255\]
20c: 793fffe7 strh w7, \[sp,#8190\] 20c: 793fffe7 strh w7, \[sp,#8190\]
210: b81003e7 str w7, \[sp,#-256\] 210: b81003e7 stur w7, \[sp,#-256\]
214: b81553e7 str w7, \[sp,#-171\] 214: b81553e7 stur w7, \[sp,#-171\]
218: b90003e7 str w7, \[sp\] 218: b90003e7 str w7, \[sp\]
21c: b90003e7 str w7, \[sp\] 21c: b90003e7 str w7, \[sp\]
220: b80023e7 str w7, \[sp,#2\] 220: b80023e7 stur w7, \[sp,#2\]
224: b90007e7 str w7, \[sp,#4\] 224: b90007e7 str w7, \[sp,#4\]
228: b9000be7 str w7, \[sp,#8\] 228: b9000be7 str w7, \[sp,#8\]
22c: b90013e7 str w7, \[sp,#16\] 22c: b90013e7 str w7, \[sp,#16\]
230: b80553e7 str w7, \[sp,#85\] 230: b80553e7 stur w7, \[sp,#85\]
234: b80ff3e7 str w7, \[sp,#255\] 234: b80ff3e7 stur w7, \[sp,#255\]
238: b93fffe7 str w7, \[sp,#16380\] 238: b93fffe7 str w7, \[sp,#16380\]
23c: f81003e7 str x7, \[sp,#-256\] 23c: f81003e7 stur x7, \[sp,#-256\]
240: f81553e7 str x7, \[sp,#-171\] 240: f81553e7 stur x7, \[sp,#-171\]
244: f90003e7 str x7, \[sp\] 244: f90003e7 str x7, \[sp\]
248: f90003e7 str x7, \[sp\] 248: f90003e7 str x7, \[sp\]
24c: f80023e7 str x7, \[sp,#2\] 24c: f80023e7 stur x7, \[sp,#2\]
250: f80043e7 str x7, \[sp,#4\] 250: f80043e7 stur x7, \[sp,#4\]
254: f90007e7 str x7, \[sp,#8\] 254: f90007e7 str x7, \[sp,#8\]
258: f9000be7 str x7, \[sp,#16\] 258: f9000be7 str x7, \[sp,#16\]
25c: f80553e7 str x7, \[sp,#85\] 25c: f80553e7 stur x7, \[sp,#85\]
260: f80ff3e7 str x7, \[sp,#255\] 260: f80ff3e7 stur x7, \[sp,#255\]
264: f93fffe7 str x7, \[sp,#32760\] 264: f93fffe7 str x7, \[sp,#32760\]
268: 385003e7 ldrb w7, \[sp,#-256\] 268: 385003e7 ldurb w7, \[sp,#-256\]
26c: 385553e7 ldrb w7, \[sp,#-171\] 26c: 385553e7 ldurb w7, \[sp,#-171\]
270: 394003e7 ldrb w7, \[sp\] 270: 394003e7 ldrb w7, \[sp\]
274: 394003e7 ldrb w7, \[sp\] 274: 394003e7 ldrb w7, \[sp\]
278: 39400be7 ldrb w7, \[sp,#2\] 278: 39400be7 ldrb w7, \[sp,#2\]
@ -170,41 +170,41 @@ Disassembly of section \.text:
288: 394157e7 ldrb w7, \[sp,#85\] 288: 394157e7 ldrb w7, \[sp,#85\]
28c: 3943ffe7 ldrb w7, \[sp,#255\] 28c: 3943ffe7 ldrb w7, \[sp,#255\]
290: 397fffe7 ldrb w7, \[sp,#4095\] 290: 397fffe7 ldrb w7, \[sp,#4095\]
294: 785003e7 ldrh w7, \[sp,#-256\] 294: 785003e7 ldurh w7, \[sp,#-256\]
298: 785553e7 ldrh w7, \[sp,#-171\] 298: 785553e7 ldurh w7, \[sp,#-171\]
29c: 794003e7 ldrh w7, \[sp\] 29c: 794003e7 ldrh w7, \[sp\]
2a0: 794003e7 ldrh w7, \[sp\] 2a0: 794003e7 ldrh w7, \[sp\]
2a4: 794007e7 ldrh w7, \[sp,#2\] 2a4: 794007e7 ldrh w7, \[sp,#2\]
2a8: 79400be7 ldrh w7, \[sp,#4\] 2a8: 79400be7 ldrh w7, \[sp,#4\]
2ac: 794013e7 ldrh w7, \[sp,#8\] 2ac: 794013e7 ldrh w7, \[sp,#8\]
2b0: 794023e7 ldrh w7, \[sp,#16\] 2b0: 794023e7 ldrh w7, \[sp,#16\]
2b4: 784553e7 ldrh w7, \[sp,#85\] 2b4: 784553e7 ldurh w7, \[sp,#85\]
2b8: 784ff3e7 ldrh w7, \[sp,#255\] 2b8: 784ff3e7 ldurh w7, \[sp,#255\]
2bc: 797fffe7 ldrh w7, \[sp,#8190\] 2bc: 797fffe7 ldrh w7, \[sp,#8190\]
2c0: b85003e7 ldr w7, \[sp,#-256\] 2c0: b85003e7 ldur w7, \[sp,#-256\]
2c4: b85553e7 ldr w7, \[sp,#-171\] 2c4: b85553e7 ldur w7, \[sp,#-171\]
2c8: b94003e7 ldr w7, \[sp\] 2c8: b94003e7 ldr w7, \[sp\]
2cc: b94003e7 ldr w7, \[sp\] 2cc: b94003e7 ldr w7, \[sp\]
2d0: b84023e7 ldr w7, \[sp,#2\] 2d0: b84023e7 ldur w7, \[sp,#2\]
2d4: b94007e7 ldr w7, \[sp,#4\] 2d4: b94007e7 ldr w7, \[sp,#4\]
2d8: b9400be7 ldr w7, \[sp,#8\] 2d8: b9400be7 ldr w7, \[sp,#8\]
2dc: b94013e7 ldr w7, \[sp,#16\] 2dc: b94013e7 ldr w7, \[sp,#16\]
2e0: b84553e7 ldr w7, \[sp,#85\] 2e0: b84553e7 ldur w7, \[sp,#85\]
2e4: b84ff3e7 ldr w7, \[sp,#255\] 2e4: b84ff3e7 ldur w7, \[sp,#255\]
2e8: b97fffe7 ldr w7, \[sp,#16380\] 2e8: b97fffe7 ldr w7, \[sp,#16380\]
2ec: f85003e7 ldr x7, \[sp,#-256\] 2ec: f85003e7 ldur x7, \[sp,#-256\]
2f0: f85553e7 ldr x7, \[sp,#-171\] 2f0: f85553e7 ldur x7, \[sp,#-171\]
2f4: f94003e7 ldr x7, \[sp\] 2f4: f94003e7 ldr x7, \[sp\]
2f8: f94003e7 ldr x7, \[sp\] 2f8: f94003e7 ldr x7, \[sp\]
2fc: f84023e7 ldr x7, \[sp,#2\] 2fc: f84023e7 ldur x7, \[sp,#2\]
300: f84043e7 ldr x7, \[sp,#4\] 300: f84043e7 ldur x7, \[sp,#4\]
304: f94007e7 ldr x7, \[sp,#8\] 304: f94007e7 ldr x7, \[sp,#8\]
308: f9400be7 ldr x7, \[sp,#16\] 308: f9400be7 ldr x7, \[sp,#16\]
30c: f84553e7 ldr x7, \[sp,#85\] 30c: f84553e7 ldur x7, \[sp,#85\]
310: f84ff3e7 ldr x7, \[sp,#255\] 310: f84ff3e7 ldur x7, \[sp,#255\]
314: f97fffe7 ldr x7, \[sp,#32760\] 314: f97fffe7 ldr x7, \[sp,#32760\]
318: 389003e7 ldrsb x7, \[sp,#-256\] 318: 389003e7 ldursb x7, \[sp,#-256\]
31c: 389553e7 ldrsb x7, \[sp,#-171\] 31c: 389553e7 ldursb x7, \[sp,#-171\]
320: 398003e7 ldrsb x7, \[sp\] 320: 398003e7 ldrsb x7, \[sp\]
324: 398003e7 ldrsb x7, \[sp\] 324: 398003e7 ldrsb x7, \[sp\]
328: 39800be7 ldrsb x7, \[sp,#2\] 328: 39800be7 ldrsb x7, \[sp,#2\]
@ -214,30 +214,30 @@ Disassembly of section \.text:
338: 398157e7 ldrsb x7, \[sp,#85\] 338: 398157e7 ldrsb x7, \[sp,#85\]
33c: 3983ffe7 ldrsb x7, \[sp,#255\] 33c: 3983ffe7 ldrsb x7, \[sp,#255\]
340: 39bfffe7 ldrsb x7, \[sp,#4095\] 340: 39bfffe7 ldrsb x7, \[sp,#4095\]
344: 789003e7 ldrsh x7, \[sp,#-256\] 344: 789003e7 ldursh x7, \[sp,#-256\]
348: 789553e7 ldrsh x7, \[sp,#-171\] 348: 789553e7 ldursh x7, \[sp,#-171\]
34c: 798003e7 ldrsh x7, \[sp\] 34c: 798003e7 ldrsh x7, \[sp\]
350: 798003e7 ldrsh x7, \[sp\] 350: 798003e7 ldrsh x7, \[sp\]
354: 798007e7 ldrsh x7, \[sp,#2\] 354: 798007e7 ldrsh x7, \[sp,#2\]
358: 79800be7 ldrsh x7, \[sp,#4\] 358: 79800be7 ldrsh x7, \[sp,#4\]
35c: 798013e7 ldrsh x7, \[sp,#8\] 35c: 798013e7 ldrsh x7, \[sp,#8\]
360: 798023e7 ldrsh x7, \[sp,#16\] 360: 798023e7 ldrsh x7, \[sp,#16\]
364: 788553e7 ldrsh x7, \[sp,#85\] 364: 788553e7 ldursh x7, \[sp,#85\]
368: 788ff3e7 ldrsh x7, \[sp,#255\] 368: 788ff3e7 ldursh x7, \[sp,#255\]
36c: 79bfffe7 ldrsh x7, \[sp,#8190\] 36c: 79bfffe7 ldrsh x7, \[sp,#8190\]
370: b89003e7 ldrsw x7, \[sp,#-256\] 370: b89003e7 ldursw x7, \[sp,#-256\]
374: b89553e7 ldrsw x7, \[sp,#-171\] 374: b89553e7 ldursw x7, \[sp,#-171\]
378: b98003e7 ldrsw x7, \[sp\] 378: b98003e7 ldrsw x7, \[sp\]
37c: b98003e7 ldrsw x7, \[sp\] 37c: b98003e7 ldrsw x7, \[sp\]
380: b88023e7 ldrsw x7, \[sp,#2\] 380: b88023e7 ldursw x7, \[sp,#2\]
384: b98007e7 ldrsw x7, \[sp,#4\] 384: b98007e7 ldrsw x7, \[sp,#4\]
388: b9800be7 ldrsw x7, \[sp,#8\] 388: b9800be7 ldrsw x7, \[sp,#8\]
38c: b98013e7 ldrsw x7, \[sp,#16\] 38c: b98013e7 ldrsw x7, \[sp,#16\]
390: b88553e7 ldrsw x7, \[sp,#85\] 390: b88553e7 ldursw x7, \[sp,#85\]
394: b88ff3e7 ldrsw x7, \[sp,#255\] 394: b88ff3e7 ldursw x7, \[sp,#255\]
398: b9bfffe7 ldrsw x7, \[sp,#16380\] 398: b9bfffe7 ldrsw x7, \[sp,#16380\]
39c: 38d003e7 ldrsb w7, \[sp,#-256\] 39c: 38d003e7 ldursb w7, \[sp,#-256\]
3a0: 38d553e7 ldrsb w7, \[sp,#-171\] 3a0: 38d553e7 ldursb w7, \[sp,#-171\]
3a4: 39c003e7 ldrsb w7, \[sp\] 3a4: 39c003e7 ldrsb w7, \[sp\]
3a8: 39c003e7 ldrsb w7, \[sp\] 3a8: 39c003e7 ldrsb w7, \[sp\]
3ac: 39c00be7 ldrsb w7, \[sp,#2\] 3ac: 39c00be7 ldrsb w7, \[sp,#2\]
@ -247,14 +247,14 @@ Disassembly of section \.text:
3bc: 39c157e7 ldrsb w7, \[sp,#85\] 3bc: 39c157e7 ldrsb w7, \[sp,#85\]
3c0: 39c3ffe7 ldrsb w7, \[sp,#255\] 3c0: 39c3ffe7 ldrsb w7, \[sp,#255\]
3c4: 39ffffe7 ldrsb w7, \[sp,#4095\] 3c4: 39ffffe7 ldrsb w7, \[sp,#4095\]
3c8: 78d003e7 ldrsh w7, \[sp,#-256\] 3c8: 78d003e7 ldursh w7, \[sp,#-256\]
3cc: 78d553e7 ldrsh w7, \[sp,#-171\] 3cc: 78d553e7 ldursh w7, \[sp,#-171\]
3d0: 79c003e7 ldrsh w7, \[sp\] 3d0: 79c003e7 ldrsh w7, \[sp\]
3d4: 79c003e7 ldrsh w7, \[sp\] 3d4: 79c003e7 ldrsh w7, \[sp\]
3d8: 79c007e7 ldrsh w7, \[sp,#2\] 3d8: 79c007e7 ldrsh w7, \[sp,#2\]
3dc: 79c00be7 ldrsh w7, \[sp,#4\] 3dc: 79c00be7 ldrsh w7, \[sp,#4\]
3e0: 79c013e7 ldrsh w7, \[sp,#8\] 3e0: 79c013e7 ldrsh w7, \[sp,#8\]
3e4: 79c023e7 ldrsh w7, \[sp,#16\] 3e4: 79c023e7 ldrsh w7, \[sp,#16\]
3e8: 78c553e7 ldrsh w7, \[sp,#85\] 3e8: 78c553e7 ldursh w7, \[sp,#85\]
3ec: 78cff3e7 ldrsh w7, \[sp,#255\] 3ec: 78cff3e7 ldursh w7, \[sp,#255\]
3f0: 79ffffe7 ldrsh w7, \[sp,#8190\] 3f0: 79ffffe7 ldrsh w7, \[sp,#8190\]

View File

@ -5,8 +5,8 @@
Disassembly of section \.text: Disassembly of section \.text:
0000000000000000 <.*>: 0000000000000000 <.*>:
0: 3c1003e7 str b7, \[sp,#-256\] 0: 3c1003e7 stur b7, \[sp,#-256\]
4: 3c1553e7 str b7, \[sp,#-171\] 4: 3c1553e7 stur b7, \[sp,#-171\]
8: 3c0003e7 stur b7, \[sp\] 8: 3c0003e7 stur b7, \[sp\]
c: 3c0003e7 stur b7, \[sp\] c: 3c0003e7 stur b7, \[sp\]
10: 3c0023e7 stur b7, \[sp,#2\] 10: 3c0023e7 stur b7, \[sp,#2\]
@ -15,48 +15,48 @@ Disassembly of section \.text:
1c: 3c0103e7 stur b7, \[sp,#16\] 1c: 3c0103e7 stur b7, \[sp,#16\]
20: 3c0553e7 stur b7, \[sp,#85\] 20: 3c0553e7 stur b7, \[sp,#85\]
24: 3c0ff3e7 stur b7, \[sp,#255\] 24: 3c0ff3e7 stur b7, \[sp,#255\]
28: 7c1003e7 str h7, \[sp,#-256\] 28: 7c1003e7 stur h7, \[sp,#-256\]
2c: 7c1553e7 str h7, \[sp,#-171\] 2c: 7c1553e7 stur h7, \[sp,#-171\]
30: 7c0003e7 stur h7, \[sp\] 30: 7c0003e7 stur h7, \[sp\]
34: 7c0003e7 stur h7, \[sp\] 34: 7c0003e7 stur h7, \[sp\]
38: 7c0023e7 stur h7, \[sp,#2\] 38: 7c0023e7 stur h7, \[sp,#2\]
3c: 7c0043e7 stur h7, \[sp,#4\] 3c: 7c0043e7 stur h7, \[sp,#4\]
40: 7c0083e7 stur h7, \[sp,#8\] 40: 7c0083e7 stur h7, \[sp,#8\]
44: 7c0103e7 stur h7, \[sp,#16\] 44: 7c0103e7 stur h7, \[sp,#16\]
48: 7c0553e7 str h7, \[sp,#85\] 48: 7c0553e7 stur h7, \[sp,#85\]
4c: 7c0ff3e7 str h7, \[sp,#255\] 4c: 7c0ff3e7 stur h7, \[sp,#255\]
50: bc1003e7 str s7, \[sp,#-256\] 50: bc1003e7 stur s7, \[sp,#-256\]
54: bc1553e7 str s7, \[sp,#-171\] 54: bc1553e7 stur s7, \[sp,#-171\]
58: bc0003e7 stur s7, \[sp\] 58: bc0003e7 stur s7, \[sp\]
5c: bc0003e7 stur s7, \[sp\] 5c: bc0003e7 stur s7, \[sp\]
60: bc0023e7 str s7, \[sp,#2\] 60: bc0023e7 stur s7, \[sp,#2\]
64: bc0043e7 stur s7, \[sp,#4\] 64: bc0043e7 stur s7, \[sp,#4\]
68: bc0083e7 stur s7, \[sp,#8\] 68: bc0083e7 stur s7, \[sp,#8\]
6c: bc0103e7 stur s7, \[sp,#16\] 6c: bc0103e7 stur s7, \[sp,#16\]
70: bc0553e7 str s7, \[sp,#85\] 70: bc0553e7 stur s7, \[sp,#85\]
74: bc0ff3e7 str s7, \[sp,#255\] 74: bc0ff3e7 stur s7, \[sp,#255\]
78: fc1003e7 str d7, \[sp,#-256\] 78: fc1003e7 stur d7, \[sp,#-256\]
7c: fc1553e7 str d7, \[sp,#-171\] 7c: fc1553e7 stur d7, \[sp,#-171\]
80: fc0003e7 stur d7, \[sp\] 80: fc0003e7 stur d7, \[sp\]
84: fc0003e7 stur d7, \[sp\] 84: fc0003e7 stur d7, \[sp\]
88: fc0023e7 str d7, \[sp,#2\] 88: fc0023e7 stur d7, \[sp,#2\]
8c: fc0043e7 str d7, \[sp,#4\] 8c: fc0043e7 stur d7, \[sp,#4\]
90: fc0083e7 stur d7, \[sp,#8\] 90: fc0083e7 stur d7, \[sp,#8\]
94: fc0103e7 stur d7, \[sp,#16\] 94: fc0103e7 stur d7, \[sp,#16\]
98: fc0553e7 str d7, \[sp,#85\] 98: fc0553e7 stur d7, \[sp,#85\]
9c: fc0ff3e7 str d7, \[sp,#255\] 9c: fc0ff3e7 stur d7, \[sp,#255\]
a0: 3c9003e7 str q7, \[sp,#-256\] a0: 3c9003e7 stur q7, \[sp,#-256\]
a4: 3c9553e7 str q7, \[sp,#-171\] a4: 3c9553e7 stur q7, \[sp,#-171\]
a8: 3c8003e7 stur q7, \[sp\] a8: 3c8003e7 stur q7, \[sp\]
ac: 3c8003e7 stur q7, \[sp\] ac: 3c8003e7 stur q7, \[sp\]
b0: 3c8023e7 str q7, \[sp,#2\] b0: 3c8023e7 stur q7, \[sp,#2\]
b4: 3c8043e7 str q7, \[sp,#4\] b4: 3c8043e7 stur q7, \[sp,#4\]
b8: 3c8083e7 str q7, \[sp,#8\] b8: 3c8083e7 stur q7, \[sp,#8\]
bc: 3c8103e7 stur q7, \[sp,#16\] bc: 3c8103e7 stur q7, \[sp,#16\]
c0: 3c8553e7 str q7, \[sp,#85\] c0: 3c8553e7 stur q7, \[sp,#85\]
c4: 3c8ff3e7 str q7, \[sp,#255\] c4: 3c8ff3e7 stur q7, \[sp,#255\]
c8: 3c5003e7 ldr b7, \[sp,#-256\] c8: 3c5003e7 ldur b7, \[sp,#-256\]
cc: 3c5553e7 ldr b7, \[sp,#-171\] cc: 3c5553e7 ldur b7, \[sp,#-171\]
d0: 3c4003e7 ldur b7, \[sp\] d0: 3c4003e7 ldur b7, \[sp\]
d4: 3c4003e7 ldur b7, \[sp\] d4: 3c4003e7 ldur b7, \[sp\]
d8: 3c4023e7 ldur b7, \[sp,#2\] d8: 3c4023e7 ldur b7, \[sp,#2\]
@ -65,48 +65,48 @@ Disassembly of section \.text:
e4: 3c4103e7 ldur b7, \[sp,#16\] e4: 3c4103e7 ldur b7, \[sp,#16\]
e8: 3c4553e7 ldur b7, \[sp,#85\] e8: 3c4553e7 ldur b7, \[sp,#85\]
ec: 3c4ff3e7 ldur b7, \[sp,#255\] ec: 3c4ff3e7 ldur b7, \[sp,#255\]
f0: 7c5003e7 ldr h7, \[sp,#-256\] f0: 7c5003e7 ldur h7, \[sp,#-256\]
f4: 7c5553e7 ldr h7, \[sp,#-171\] f4: 7c5553e7 ldur h7, \[sp,#-171\]
f8: 7c4003e7 ldur h7, \[sp\] f8: 7c4003e7 ldur h7, \[sp\]
fc: 7c4003e7 ldur h7, \[sp\] fc: 7c4003e7 ldur h7, \[sp\]
100: 7c4023e7 ldur h7, \[sp,#2\] 100: 7c4023e7 ldur h7, \[sp,#2\]
104: 7c4043e7 ldur h7, \[sp,#4\] 104: 7c4043e7 ldur h7, \[sp,#4\]
108: 7c4083e7 ldur h7, \[sp,#8\] 108: 7c4083e7 ldur h7, \[sp,#8\]
10c: 7c4103e7 ldur h7, \[sp,#16\] 10c: 7c4103e7 ldur h7, \[sp,#16\]
110: 7c4553e7 ldr h7, \[sp,#85\] 110: 7c4553e7 ldur h7, \[sp,#85\]
114: 7c4ff3e7 ldr h7, \[sp,#255\] 114: 7c4ff3e7 ldur h7, \[sp,#255\]
118: bc5003e7 ldr s7, \[sp,#-256\] 118: bc5003e7 ldur s7, \[sp,#-256\]
11c: bc5553e7 ldr s7, \[sp,#-171\] 11c: bc5553e7 ldur s7, \[sp,#-171\]
120: bc4003e7 ldur s7, \[sp\] 120: bc4003e7 ldur s7, \[sp\]
124: bc4003e7 ldur s7, \[sp\] 124: bc4003e7 ldur s7, \[sp\]
128: bc4023e7 ldr s7, \[sp,#2\] 128: bc4023e7 ldur s7, \[sp,#2\]
12c: bc4043e7 ldur s7, \[sp,#4\] 12c: bc4043e7 ldur s7, \[sp,#4\]
130: bc4083e7 ldur s7, \[sp,#8\] 130: bc4083e7 ldur s7, \[sp,#8\]
134: bc4103e7 ldur s7, \[sp,#16\] 134: bc4103e7 ldur s7, \[sp,#16\]
138: bc4553e7 ldr s7, \[sp,#85\] 138: bc4553e7 ldur s7, \[sp,#85\]
13c: bc4ff3e7 ldr s7, \[sp,#255\] 13c: bc4ff3e7 ldur s7, \[sp,#255\]
140: fc5003e7 ldr d7, \[sp,#-256\] 140: fc5003e7 ldur d7, \[sp,#-256\]
144: fc5553e7 ldr d7, \[sp,#-171\] 144: fc5553e7 ldur d7, \[sp,#-171\]
148: fc4003e7 ldur d7, \[sp\] 148: fc4003e7 ldur d7, \[sp\]
14c: fc4003e7 ldur d7, \[sp\] 14c: fc4003e7 ldur d7, \[sp\]
150: fc4023e7 ldr d7, \[sp,#2\] 150: fc4023e7 ldur d7, \[sp,#2\]
154: fc4043e7 ldr d7, \[sp,#4\] 154: fc4043e7 ldur d7, \[sp,#4\]
158: fc4083e7 ldur d7, \[sp,#8\] 158: fc4083e7 ldur d7, \[sp,#8\]
15c: fc4103e7 ldur d7, \[sp,#16\] 15c: fc4103e7 ldur d7, \[sp,#16\]
160: fc4553e7 ldr d7, \[sp,#85\] 160: fc4553e7 ldur d7, \[sp,#85\]
164: fc4ff3e7 ldr d7, \[sp,#255\] 164: fc4ff3e7 ldur d7, \[sp,#255\]
168: 3cd003e7 ldr q7, \[sp,#-256\] 168: 3cd003e7 ldur q7, \[sp,#-256\]
16c: 3cd553e7 ldr q7, \[sp,#-171\] 16c: 3cd553e7 ldur q7, \[sp,#-171\]
170: 3cc003e7 ldur q7, \[sp\] 170: 3cc003e7 ldur q7, \[sp\]
174: 3cc003e7 ldur q7, \[sp\] 174: 3cc003e7 ldur q7, \[sp\]
178: 3cc023e7 ldr q7, \[sp,#2\] 178: 3cc023e7 ldur q7, \[sp,#2\]
17c: 3cc043e7 ldr q7, \[sp,#4\] 17c: 3cc043e7 ldur q7, \[sp,#4\]
180: 3cc083e7 ldr q7, \[sp,#8\] 180: 3cc083e7 ldur q7, \[sp,#8\]
184: 3cc103e7 ldur q7, \[sp,#16\] 184: 3cc103e7 ldur q7, \[sp,#16\]
188: 3cc553e7 ldr q7, \[sp,#85\] 188: 3cc553e7 ldur q7, \[sp,#85\]
18c: 3ccff3e7 ldr q7, \[sp,#255\] 18c: 3ccff3e7 ldur q7, \[sp,#255\]
190: 381003e7 strb w7, \[sp,#-256\] 190: 381003e7 sturb w7, \[sp,#-256\]
194: 381553e7 strb w7, \[sp,#-171\] 194: 381553e7 sturb w7, \[sp,#-171\]
198: 380003e7 sturb w7, \[sp\] 198: 380003e7 sturb w7, \[sp\]
19c: 380003e7 sturb w7, \[sp\] 19c: 380003e7 sturb w7, \[sp\]
1a0: 380023e7 sturb w7, \[sp,#2\] 1a0: 380023e7 sturb w7, \[sp,#2\]
@ -115,38 +115,38 @@ Disassembly of section \.text:
1ac: 380103e7 sturb w7, \[sp,#16\] 1ac: 380103e7 sturb w7, \[sp,#16\]
1b0: 380553e7 sturb w7, \[sp,#85\] 1b0: 380553e7 sturb w7, \[sp,#85\]
1b4: 380ff3e7 sturb w7, \[sp,#255\] 1b4: 380ff3e7 sturb w7, \[sp,#255\]
1b8: 781003e7 strh w7, \[sp,#-256\] 1b8: 781003e7 sturh w7, \[sp,#-256\]
1bc: 781553e7 strh w7, \[sp,#-171\] 1bc: 781553e7 sturh w7, \[sp,#-171\]
1c0: 780003e7 sturh w7, \[sp\] 1c0: 780003e7 sturh w7, \[sp\]
1c4: 780003e7 sturh w7, \[sp\] 1c4: 780003e7 sturh w7, \[sp\]
1c8: 780023e7 sturh w7, \[sp,#2\] 1c8: 780023e7 sturh w7, \[sp,#2\]
1cc: 780043e7 sturh w7, \[sp,#4\] 1cc: 780043e7 sturh w7, \[sp,#4\]
1d0: 780083e7 sturh w7, \[sp,#8\] 1d0: 780083e7 sturh w7, \[sp,#8\]
1d4: 780103e7 sturh w7, \[sp,#16\] 1d4: 780103e7 sturh w7, \[sp,#16\]
1d8: 780553e7 strh w7, \[sp,#85\] 1d8: 780553e7 sturh w7, \[sp,#85\]
1dc: 780ff3e7 strh w7, \[sp,#255\] 1dc: 780ff3e7 sturh w7, \[sp,#255\]
1e0: b81003e7 str w7, \[sp,#-256\] 1e0: b81003e7 stur w7, \[sp,#-256\]
1e4: b81553e7 str w7, \[sp,#-171\] 1e4: b81553e7 stur w7, \[sp,#-171\]
1e8: b80003e7 stur w7, \[sp\] 1e8: b80003e7 stur w7, \[sp\]
1ec: b80003e7 stur w7, \[sp\] 1ec: b80003e7 stur w7, \[sp\]
1f0: b80023e7 str w7, \[sp,#2\] 1f0: b80023e7 stur w7, \[sp,#2\]
1f4: b80043e7 stur w7, \[sp,#4\] 1f4: b80043e7 stur w7, \[sp,#4\]
1f8: b80083e7 stur w7, \[sp,#8\] 1f8: b80083e7 stur w7, \[sp,#8\]
1fc: b80103e7 stur w7, \[sp,#16\] 1fc: b80103e7 stur w7, \[sp,#16\]
200: b80553e7 str w7, \[sp,#85\] 200: b80553e7 stur w7, \[sp,#85\]
204: b80ff3e7 str w7, \[sp,#255\] 204: b80ff3e7 stur w7, \[sp,#255\]
208: f81003e7 str x7, \[sp,#-256\] 208: f81003e7 stur x7, \[sp,#-256\]
20c: f81553e7 str x7, \[sp,#-171\] 20c: f81553e7 stur x7, \[sp,#-171\]
210: f80003e7 stur x7, \[sp\] 210: f80003e7 stur x7, \[sp\]
214: f80003e7 stur x7, \[sp\] 214: f80003e7 stur x7, \[sp\]
218: f80023e7 str x7, \[sp,#2\] 218: f80023e7 stur x7, \[sp,#2\]
21c: f80043e7 str x7, \[sp,#4\] 21c: f80043e7 stur x7, \[sp,#4\]
220: f80083e7 stur x7, \[sp,#8\] 220: f80083e7 stur x7, \[sp,#8\]
224: f80103e7 stur x7, \[sp,#16\] 224: f80103e7 stur x7, \[sp,#16\]
228: f80553e7 str x7, \[sp,#85\] 228: f80553e7 stur x7, \[sp,#85\]
22c: f80ff3e7 str x7, \[sp,#255\] 22c: f80ff3e7 stur x7, \[sp,#255\]
230: 385003e7 ldrb w7, \[sp,#-256\] 230: 385003e7 ldurb w7, \[sp,#-256\]
234: 385553e7 ldrb w7, \[sp,#-171\] 234: 385553e7 ldurb w7, \[sp,#-171\]
238: 384003e7 ldurb w7, \[sp\] 238: 384003e7 ldurb w7, \[sp\]
23c: 384003e7 ldurb w7, \[sp\] 23c: 384003e7 ldurb w7, \[sp\]
240: 384023e7 ldurb w7, \[sp,#2\] 240: 384023e7 ldurb w7, \[sp,#2\]
@ -155,38 +155,38 @@ Disassembly of section \.text:
24c: 384103e7 ldurb w7, \[sp,#16\] 24c: 384103e7 ldurb w7, \[sp,#16\]
250: 384553e7 ldurb w7, \[sp,#85\] 250: 384553e7 ldurb w7, \[sp,#85\]
254: 384ff3e7 ldurb w7, \[sp,#255\] 254: 384ff3e7 ldurb w7, \[sp,#255\]
258: 785003e7 ldrh w7, \[sp,#-256\] 258: 785003e7 ldurh w7, \[sp,#-256\]
25c: 785553e7 ldrh w7, \[sp,#-171\] 25c: 785553e7 ldurh w7, \[sp,#-171\]
260: 784003e7 ldurh w7, \[sp\] 260: 784003e7 ldurh w7, \[sp\]
264: 784003e7 ldurh w7, \[sp\] 264: 784003e7 ldurh w7, \[sp\]
268: 784023e7 ldurh w7, \[sp,#2\] 268: 784023e7 ldurh w7, \[sp,#2\]
26c: 784043e7 ldurh w7, \[sp,#4\] 26c: 784043e7 ldurh w7, \[sp,#4\]
270: 784083e7 ldurh w7, \[sp,#8\] 270: 784083e7 ldurh w7, \[sp,#8\]
274: 784103e7 ldurh w7, \[sp,#16\] 274: 784103e7 ldurh w7, \[sp,#16\]
278: 784553e7 ldrh w7, \[sp,#85\] 278: 784553e7 ldurh w7, \[sp,#85\]
27c: 784ff3e7 ldrh w7, \[sp,#255\] 27c: 784ff3e7 ldurh w7, \[sp,#255\]
280: b85003e7 ldr w7, \[sp,#-256\] 280: b85003e7 ldur w7, \[sp,#-256\]
284: b85553e7 ldr w7, \[sp,#-171\] 284: b85553e7 ldur w7, \[sp,#-171\]
288: b84003e7 ldur w7, \[sp\] 288: b84003e7 ldur w7, \[sp\]
28c: b84003e7 ldur w7, \[sp\] 28c: b84003e7 ldur w7, \[sp\]
290: b84023e7 ldr w7, \[sp,#2\] 290: b84023e7 ldur w7, \[sp,#2\]
294: b84043e7 ldur w7, \[sp,#4\] 294: b84043e7 ldur w7, \[sp,#4\]
298: b84083e7 ldur w7, \[sp,#8\] 298: b84083e7 ldur w7, \[sp,#8\]
29c: b84103e7 ldur w7, \[sp,#16\] 29c: b84103e7 ldur w7, \[sp,#16\]
2a0: b84553e7 ldr w7, \[sp,#85\] 2a0: b84553e7 ldur w7, \[sp,#85\]
2a4: b84ff3e7 ldr w7, \[sp,#255\] 2a4: b84ff3e7 ldur w7, \[sp,#255\]
2a8: f85003e7 ldr x7, \[sp,#-256\] 2a8: f85003e7 ldur x7, \[sp,#-256\]
2ac: f85553e7 ldr x7, \[sp,#-171\] 2ac: f85553e7 ldur x7, \[sp,#-171\]
2b0: f84003e7 ldur x7, \[sp\] 2b0: f84003e7 ldur x7, \[sp\]
2b4: f84003e7 ldur x7, \[sp\] 2b4: f84003e7 ldur x7, \[sp\]
2b8: f84023e7 ldr x7, \[sp,#2\] 2b8: f84023e7 ldur x7, \[sp,#2\]
2bc: f84043e7 ldr x7, \[sp,#4\] 2bc: f84043e7 ldur x7, \[sp,#4\]
2c0: f84083e7 ldur x7, \[sp,#8\] 2c0: f84083e7 ldur x7, \[sp,#8\]
2c4: f84103e7 ldur x7, \[sp,#16\] 2c4: f84103e7 ldur x7, \[sp,#16\]
2c8: f84553e7 ldr x7, \[sp,#85\] 2c8: f84553e7 ldur x7, \[sp,#85\]
2cc: f84ff3e7 ldr x7, \[sp,#255\] 2cc: f84ff3e7 ldur x7, \[sp,#255\]
2d0: 389003e7 ldrsb x7, \[sp,#-256\] 2d0: 389003e7 ldursb x7, \[sp,#-256\]
2d4: 389553e7 ldrsb x7, \[sp,#-171\] 2d4: 389553e7 ldursb x7, \[sp,#-171\]
2d8: 388003e7 ldursb x7, \[sp\] 2d8: 388003e7 ldursb x7, \[sp\]
2dc: 388003e7 ldursb x7, \[sp\] 2dc: 388003e7 ldursb x7, \[sp\]
2e0: 388023e7 ldursb x7, \[sp,#2\] 2e0: 388023e7 ldursb x7, \[sp,#2\]
@ -195,28 +195,28 @@ Disassembly of section \.text:
2ec: 388103e7 ldursb x7, \[sp,#16\] 2ec: 388103e7 ldursb x7, \[sp,#16\]
2f0: 388553e7 ldursb x7, \[sp,#85\] 2f0: 388553e7 ldursb x7, \[sp,#85\]
2f4: 388ff3e7 ldursb x7, \[sp,#255\] 2f4: 388ff3e7 ldursb x7, \[sp,#255\]
2f8: 789003e7 ldrsh x7, \[sp,#-256\] 2f8: 789003e7 ldursh x7, \[sp,#-256\]
2fc: 789553e7 ldrsh x7, \[sp,#-171\] 2fc: 789553e7 ldursh x7, \[sp,#-171\]
300: 788003e7 ldursh x7, \[sp\] 300: 788003e7 ldursh x7, \[sp\]
304: 788003e7 ldursh x7, \[sp\] 304: 788003e7 ldursh x7, \[sp\]
308: 788023e7 ldursh x7, \[sp,#2\] 308: 788023e7 ldursh x7, \[sp,#2\]
30c: 788043e7 ldursh x7, \[sp,#4\] 30c: 788043e7 ldursh x7, \[sp,#4\]
310: 788083e7 ldursh x7, \[sp,#8\] 310: 788083e7 ldursh x7, \[sp,#8\]
314: 788103e7 ldursh x7, \[sp,#16\] 314: 788103e7 ldursh x7, \[sp,#16\]
318: 788553e7 ldrsh x7, \[sp,#85\] 318: 788553e7 ldursh x7, \[sp,#85\]
31c: 788ff3e7 ldrsh x7, \[sp,#255\] 31c: 788ff3e7 ldursh x7, \[sp,#255\]
320: b89003e7 ldrsw x7, \[sp,#-256\] 320: b89003e7 ldursw x7, \[sp,#-256\]
324: b89553e7 ldrsw x7, \[sp,#-171\] 324: b89553e7 ldursw x7, \[sp,#-171\]
328: b88003e7 ldursw x7, \[sp\] 328: b88003e7 ldursw x7, \[sp\]
32c: b88003e7 ldursw x7, \[sp\] 32c: b88003e7 ldursw x7, \[sp\]
330: b88023e7 ldrsw x7, \[sp,#2\] 330: b88023e7 ldursw x7, \[sp,#2\]
334: b88043e7 ldursw x7, \[sp,#4\] 334: b88043e7 ldursw x7, \[sp,#4\]
338: b88083e7 ldursw x7, \[sp,#8\] 338: b88083e7 ldursw x7, \[sp,#8\]
33c: b88103e7 ldursw x7, \[sp,#16\] 33c: b88103e7 ldursw x7, \[sp,#16\]
340: b88553e7 ldrsw x7, \[sp,#85\] 340: b88553e7 ldursw x7, \[sp,#85\]
344: b88ff3e7 ldrsw x7, \[sp,#255\] 344: b88ff3e7 ldursw x7, \[sp,#255\]
348: 38d003e7 ldrsb w7, \[sp,#-256\] 348: 38d003e7 ldursb w7, \[sp,#-256\]
34c: 38d553e7 ldrsb w7, \[sp,#-171\] 34c: 38d553e7 ldursb w7, \[sp,#-171\]
350: 38c003e7 ldursb w7, \[sp\] 350: 38c003e7 ldursb w7, \[sp\]
354: 38c003e7 ldursb w7, \[sp\] 354: 38c003e7 ldursb w7, \[sp\]
358: 38c023e7 ldursb w7, \[sp,#2\] 358: 38c023e7 ldursb w7, \[sp,#2\]
@ -225,13 +225,13 @@ Disassembly of section \.text:
364: 38c103e7 ldursb w7, \[sp,#16\] 364: 38c103e7 ldursb w7, \[sp,#16\]
368: 38c553e7 ldursb w7, \[sp,#85\] 368: 38c553e7 ldursb w7, \[sp,#85\]
36c: 38cff3e7 ldursb w7, \[sp,#255\] 36c: 38cff3e7 ldursb w7, \[sp,#255\]
370: 78d003e7 ldrsh w7, \[sp,#-256\] 370: 78d003e7 ldursh w7, \[sp,#-256\]
374: 78d553e7 ldrsh w7, \[sp,#-171\] 374: 78d553e7 ldursh w7, \[sp,#-171\]
378: 78c003e7 ldursh w7, \[sp\] 378: 78c003e7 ldursh w7, \[sp\]
37c: 78c003e7 ldursh w7, \[sp\] 37c: 78c003e7 ldursh w7, \[sp\]
380: 78c023e7 ldursh w7, \[sp,#2\] 380: 78c023e7 ldursh w7, \[sp,#2\]
384: 78c043e7 ldursh w7, \[sp,#4\] 384: 78c043e7 ldursh w7, \[sp,#4\]
388: 78c083e7 ldursh w7, \[sp,#8\] 388: 78c083e7 ldursh w7, \[sp,#8\]
38c: 78c103e7 ldursh w7, \[sp,#16\] 38c: 78c103e7 ldursh w7, \[sp,#16\]
390: 78c553e7 ldrsh w7, \[sp,#85\] 390: 78c553e7 ldursh w7, \[sp,#85\]
394: 78cff3e7 ldrsh w7, \[sp,#255\] 394: 78cff3e7 ldursh w7, \[sp,#255\]

View File

@ -139,7 +139,7 @@ Disassembly of section \.text:
160: d41fffe1 svc #0xffff 160: d41fffe1 svc #0xffff
164: f8500420 ldr x0, \[x1\],#-256 164: f8500420 ldr x0, \[x1\],#-256
168: f8500c20 ldr x0, \[x1,#-256\]! 168: f8500c20 ldr x0, \[x1,#-256\]!
16c: f8500020 ldr x0, \[x1,#-256\] 16c: f8500020 ldur x0, \[x1,#-256\]
170: f97ffc20 ldr x0, \[x1,#32760\] 170: f97ffc20 ldr x0, \[x1,#32760\]
174: 79400000 ldrh w0, \[x0\] 174: 79400000 ldrh w0, \[x0\]
174: R_AARCH64_LDST16_ABS_LO12_NC \.text\+0x194 174: R_AARCH64_LDST16_ABS_LO12_NC \.text\+0x194

View File

@ -1,3 +1,12 @@
2015-03-10 Renlin Li <renlin.li@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
related alias.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Likewise.
* aarch64-opc-2.c: Likewise.
2015-03-03 Jiong Wang <jiong.wang@arm.com> 2015-03-03 Jiong Wang <jiong.wang@arm.com>
* arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols. * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.

View File

@ -155,224 +155,188 @@ aarch64_find_real_opcode (const aarch64_opcode *opcode)
case 595: /* ror */ case 595: /* ror */
value = 594; /* --> extr. */ value = 594; /* --> extr. */
break; break;
case 695: /* strb */ case 746: /* bic */
value = 693; /* --> sturb. */ value = 745; /* --> and. */
break; break;
case 696: /* ldrb */ case 748: /* mov */
value = 694; /* --> ldurb. */ value = 747; /* --> orr. */
break; break;
case 698: /* ldrsb */ case 751: /* tst */
value = 697; /* --> ldursb. */ value = 750; /* --> ands. */
break; break;
case 701: /* str */ case 756: /* uxtw */
value = 699; /* --> stur. */ case 755: /* mov */
value = 754; /* --> orr. */
break; break;
case 702: /* ldr */ case 758: /* mvn */
value = 700; /* --> ldur. */ value = 757; /* --> orn. */
break; break;
case 705: /* strh */ case 762: /* tst */
value = 703; /* --> sturh. */ value = 761; /* --> ands. */
break; break;
case 706: /* ldrh */ case 888: /* staddb */
value = 704; /* --> ldurh. */ value = 792; /* --> ldaddb. */
break; break;
case 708: /* ldrsh */ case 889: /* staddh */
value = 707; /* --> ldursh. */ value = 793; /* --> ldaddh. */
break; break;
case 711: /* str */ case 890: /* stadd */
value = 709; /* --> stur. */ value = 794; /* --> ldadd. */
break; break;
case 712: /* ldr */ case 891: /* staddlb */
value = 710; /* --> ldur. */ value = 796; /* --> ldaddlb. */
break; break;
case 714: /* ldrsw */ case 892: /* staddlh */
value = 713; /* --> ldursw. */ value = 799; /* --> ldaddlh. */
break; break;
case 716: /* prfm */ case 893: /* staddl */
value = 715; /* --> prfum. */ value = 802; /* --> ldaddl. */
break; break;
case 758: /* bic */ case 894: /* stclrb */
value = 757; /* --> and. */ value = 804; /* --> ldclrb. */
break; break;
case 760: /* mov */ case 895: /* stclrh */
value = 759; /* --> orr. */ value = 805; /* --> ldclrh. */
break; break;
case 763: /* tst */ case 896: /* stclr */
value = 762; /* --> ands. */ value = 806; /* --> ldclr. */
break; break;
case 768: /* uxtw */ case 897: /* stclrlb */
case 767: /* mov */ value = 808; /* --> ldclrlb. */
value = 766; /* --> orr. */
break; break;
case 770: /* mvn */ case 898: /* stclrlh */
value = 769; /* --> orn. */ value = 811; /* --> ldclrlh. */
break; break;
case 774: /* tst */ case 899: /* stclrl */
value = 773; /* --> ands. */ value = 814; /* --> ldclrl. */
break; break;
case 900: /* staddb */ case 900: /* steorb */
value = 804; /* --> ldaddb. */ value = 816; /* --> ldeorb. */
break; break;
case 901: /* staddh */ case 901: /* steorh */
value = 805; /* --> ldaddh. */ value = 817; /* --> ldeorh. */
break; break;
case 902: /* stadd */ case 902: /* steor */
value = 806; /* --> ldadd. */ value = 818; /* --> ldeor. */
break; break;
case 903: /* staddlb */ case 903: /* steorlb */
value = 808; /* --> ldaddlb. */ value = 820; /* --> ldeorlb. */
break; break;
case 904: /* staddlh */ case 904: /* steorlh */
value = 811; /* --> ldaddlh. */ value = 823; /* --> ldeorlh. */
break; break;
case 905: /* staddl */ case 905: /* steorl */
value = 814; /* --> ldaddl. */ value = 826; /* --> ldeorl. */
break; break;
case 906: /* stclrb */ case 906: /* stsetb */
value = 816; /* --> ldclrb. */ value = 828; /* --> ldsetb. */
break; break;
case 907: /* stclrh */ case 907: /* stseth */
value = 817; /* --> ldclrh. */ value = 829; /* --> ldseth. */
break; break;
case 908: /* stclr */ case 908: /* stset */
value = 818; /* --> ldclr. */ value = 830; /* --> ldset. */
break; break;
case 909: /* stclrlb */ case 909: /* stsetlb */
value = 820; /* --> ldclrlb. */ value = 832; /* --> ldsetlb. */
break; break;
case 910: /* stclrlh */ case 910: /* stsetlh */
value = 823; /* --> ldclrlh. */ value = 835; /* --> ldsetlh. */
break; break;
case 911: /* stclrl */ case 911: /* stsetl */
value = 826; /* --> ldclrl. */ value = 838; /* --> ldsetl. */
break; break;
case 912: /* steorb */ case 912: /* stsmaxb */
value = 828; /* --> ldeorb. */ value = 840; /* --> ldsmaxb. */
break; break;
case 913: /* steorh */ case 913: /* stsmaxh */
value = 829; /* --> ldeorh. */ value = 841; /* --> ldsmaxh. */
break; break;
case 914: /* steor */ case 914: /* stsmax */
value = 830; /* --> ldeor. */ value = 842; /* --> ldsmax. */
break; break;
case 915: /* steorlb */ case 915: /* stsmaxlb */
value = 832; /* --> ldeorlb. */ value = 844; /* --> ldsmaxlb. */
break; break;
case 916: /* steorlh */ case 916: /* stsmaxlh */
value = 835; /* --> ldeorlh. */ value = 847; /* --> ldsmaxlh. */
break; break;
case 917: /* steorl */ case 917: /* stsmaxl */
value = 838; /* --> ldeorl. */ value = 850; /* --> ldsmaxl. */
break; break;
case 918: /* stsetb */ case 918: /* stsminb */
value = 840; /* --> ldsetb. */ value = 852; /* --> ldsminb. */
break; break;
case 919: /* stseth */ case 919: /* stsminh */
value = 841; /* --> ldseth. */ value = 853; /* --> ldsminh. */
break; break;
case 920: /* stset */ case 920: /* stsmin */
value = 842; /* --> ldset. */ value = 854; /* --> ldsmin. */
break; break;
case 921: /* stsetlb */ case 921: /* stsminlb */
value = 844; /* --> ldsetlb. */ value = 856; /* --> ldsminlb. */
break; break;
case 922: /* stsetlh */ case 922: /* stsminlh */
value = 847; /* --> ldsetlh. */ value = 859; /* --> ldsminlh. */
break; break;
case 923: /* stsetl */ case 923: /* stsminl */
value = 850; /* --> ldsetl. */ value = 862; /* --> ldsminl. */
break; break;
case 924: /* stsmaxb */ case 924: /* stumaxb */
value = 852; /* --> ldsmaxb. */ value = 864; /* --> ldumaxb. */
break; break;
case 925: /* stsmaxh */ case 925: /* stumaxh */
value = 853; /* --> ldsmaxh. */ value = 865; /* --> ldumaxh. */
break; break;
case 926: /* stsmax */ case 926: /* stumax */
value = 854; /* --> ldsmax. */ value = 866; /* --> ldumax. */
break; break;
case 927: /* stsmaxlb */ case 927: /* stumaxlb */
value = 856; /* --> ldsmaxlb. */ value = 868; /* --> ldumaxlb. */
break; break;
case 928: /* stsmaxlh */ case 928: /* stumaxlh */
value = 859; /* --> ldsmaxlh. */ value = 871; /* --> ldumaxlh. */
break; break;
case 929: /* stsmaxl */ case 929: /* stumaxl */
value = 862; /* --> ldsmaxl. */ value = 874; /* --> ldumaxl. */
break; break;
case 930: /* stsminb */ case 930: /* stuminb */
value = 864; /* --> ldsminb. */ value = 876; /* --> lduminb. */
break; break;
case 931: /* stsminh */ case 931: /* stuminh */
value = 865; /* --> ldsminh. */ value = 877; /* --> lduminh. */
break; break;
case 932: /* stsmin */ case 932: /* stumin */
value = 866; /* --> ldsmin. */ value = 878; /* --> ldumin. */
break; break;
case 933: /* stsminlb */ case 933: /* stuminlb */
value = 868; /* --> ldsminlb. */ value = 880; /* --> lduminlb. */
break; break;
case 934: /* stsminlh */ case 934: /* stuminlh */
value = 871; /* --> ldsminlh. */ value = 883; /* --> lduminlh. */
break; break;
case 935: /* stsminl */ case 935: /* stuminl */
value = 874; /* --> ldsminl. */ value = 886; /* --> lduminl. */
break; break;
case 936: /* stumaxb */ case 937: /* mov */
value = 876; /* --> ldumaxb. */ value = 936; /* --> movn. */
break; break;
case 937: /* stumaxh */ case 939: /* mov */
value = 877; /* --> ldumaxh. */ value = 938; /* --> movz. */
break; break;
case 938: /* stumax */ case 950: /* sevl */
value = 878; /* --> ldumax. */ case 949: /* sev */
case 948: /* wfi */
case 947: /* wfe */
case 946: /* yield */
case 945: /* nop */
value = 944; /* --> hint. */
break; break;
case 939: /* stumaxlb */ case 959: /* tlbi */
value = 880; /* --> ldumaxlb. */ case 958: /* ic */
break; case 957: /* dc */
case 940: /* stumaxlh */ case 956: /* at */
value = 883; /* --> ldumaxlh. */ value = 955; /* --> sys. */
break;
case 941: /* stumaxl */
value = 886; /* --> ldumaxl. */
break;
case 942: /* stuminb */
value = 888; /* --> lduminb. */
break;
case 943: /* stuminh */
value = 889; /* --> lduminh. */
break;
case 944: /* stumin */
value = 890; /* --> ldumin. */
break;
case 945: /* stuminlb */
value = 892; /* --> lduminlb. */
break;
case 946: /* stuminlh */
value = 895; /* --> lduminlh. */
break;
case 947: /* stuminl */
value = 898; /* --> lduminl. */
break;
case 949: /* mov */
value = 948; /* --> movn. */
break;
case 951: /* mov */
value = 950; /* --> movz. */
break;
case 962: /* sevl */
case 961: /* sev */
case 960: /* wfi */
case 959: /* wfe */
case 958: /* yield */
case 957: /* nop */
value = 956; /* --> hint. */
break;
case 971: /* tlbi */
case 970: /* ic */
case 969: /* dc */
case 968: /* at */
value = 967; /* --> sys. */
break; break;
default: return NULL; default: return NULL;
} }

File diff suppressed because it is too large Load Diff

View File

@ -135,34 +135,34 @@ static const unsigned op_enum_table [] =
671, 671,
693, 693,
694, 694,
695,
698,
699,
700,
701,
702,
696,
697, 697,
703, 703,
704, 704,
707, 741,
709, 742,
710, 743,
699, 744,
700,
713,
715,
753,
754,
755,
756,
12, 12,
510, 510,
511, 511,
948, 936,
950, 938,
952, 940,
760, 748,
951, 939,
949, 937,
259, 259,
499, 499,
509, 509,
508, 508,
758, 746,
505, 505,
502, 502,
495, 495,
@ -171,7 +171,7 @@ static const unsigned op_enum_table [] =
504, 504,
506, 506,
507, 507,
768, 756,
526, 526,
529, 529,
532, 532,

View File

@ -1982,30 +1982,18 @@ struct aarch64_opcode aarch64_opcode_table[] =
{"ldtr", 0xb8400800, 0xbfe00c00, ldst_unpriv, 0, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R, F_GPRSIZE_IN_Q}, {"ldtr", 0xb8400800, 0xbfe00c00, ldst_unpriv, 0, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R, F_GPRSIZE_IN_Q},
{"ldtrsw", 0xb8800800, 0xffe00c00, ldst_unpriv, 0, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_X32, 0}, {"ldtrsw", 0xb8800800, 0xffe00c00, ldst_unpriv, 0, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_X32, 0},
/* Load/store register (unscaled immediate). */ /* Load/store register (unscaled immediate). */
{"sturb", 0x38000000, 0xffe00c00, ldst_unscaled, OP_STURB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, F_HAS_ALIAS}, {"sturb", 0x38000000, 0xffe00c00, ldst_unscaled, OP_STURB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, 0},
{"ldurb", 0x38400000, 0xffe00c00, ldst_unscaled, OP_LDURB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, F_HAS_ALIAS}, {"ldurb", 0x38400000, 0xffe00c00, ldst_unscaled, OP_LDURB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W8, 0},
{"strb", 0x38000000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_W8, F_ALIAS}, {"ldursb", 0x38800000, 0xffa00c00, ldst_unscaled, OP_LDURSB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R8, F_LDS_SIZE},
{"ldrb", 0x38400000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_W8, F_ALIAS}, {"stur", 0x3c000000, 0x3f600c00, ldst_unscaled, OP_STURV, CORE, OP2 (Ft, ADDR_SIMM9), QL_LDST_FP, 0},
{"ldursb", 0x38800000, 0xffa00c00, ldst_unscaled, OP_LDURSB, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R8, F_HAS_ALIAS | F_LDS_SIZE}, {"ldur", 0x3c400000, 0x3f600c00, ldst_unscaled, OP_LDURV, CORE, OP2 (Ft, ADDR_SIMM9), QL_LDST_FP, 0},
{"ldrsb", 0x38800000, 0xffa00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_R8, F_ALIAS | F_LDS_SIZE}, {"sturh", 0x78000000, 0xffe00c00, ldst_unscaled, OP_STURH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W16, 0},
{"stur", 0x3c000000, 0x3f600c00, ldst_unscaled, OP_STURV, CORE, OP2 (Ft, ADDR_SIMM9), QL_LDST_FP, F_HAS_ALIAS}, {"ldurh", 0x78400000, 0xffe00c00, ldst_unscaled, OP_LDURH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W16, 0},
{"ldur", 0x3c400000, 0x3f600c00, ldst_unscaled, OP_LDURV, CORE, OP2 (Ft, ADDR_SIMM9), QL_LDST_FP, F_HAS_ALIAS}, {"ldursh", 0x78800000, 0xffa00c00, ldst_unscaled, OP_LDURSH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R16, F_LDS_SIZE},
{"str", 0x3c000000, 0x3f600c00, ldst_unscaled, 0, CORE, OP2 (Ft, ADDR_SIMM9_2), QL_LDST_FP, F_ALIAS}, {"stur", 0xb8000000, 0xbfe00c00, ldst_unscaled, OP_STUR, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R, F_GPRSIZE_IN_Q},
{"ldr", 0x3c400000, 0x3f600c00, ldst_unscaled, 0, CORE, OP2 (Ft, ADDR_SIMM9_2), QL_LDST_FP, F_ALIAS}, {"ldur", 0xb8400000, 0xbfe00c00, ldst_unscaled, OP_LDUR, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R, F_GPRSIZE_IN_Q},
{"sturh", 0x78000000, 0xffe00c00, ldst_unscaled, OP_STURH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W16, F_HAS_ALIAS}, {"ldursw", 0xb8800000, 0xffe00c00, ldst_unscaled, OP_LDURSW, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_X32, 0},
{"ldurh", 0x78400000, 0xffe00c00, ldst_unscaled, OP_LDURH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_W16, F_HAS_ALIAS}, {"prfum", 0xf8800000, 0xffe00c00, ldst_unscaled, OP_PRFUM, CORE, OP2 (PRFOP, ADDR_SIMM9), QL_LDST_PRFM, 0},
{"strh", 0x78000000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_W16, F_ALIAS},
{"ldrh", 0x78400000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_W16, F_ALIAS},
{"ldursh", 0x78800000, 0xffa00c00, ldst_unscaled, OP_LDURSH, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R16, F_HAS_ALIAS | F_LDS_SIZE},
{"ldrsh", 0x78800000, 0xffa00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_R16, F_ALIAS | F_LDS_SIZE},
{"stur", 0xb8000000, 0xbfe00c00, ldst_unscaled, OP_STUR, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R, F_HAS_ALIAS | F_GPRSIZE_IN_Q},
{"ldur", 0xb8400000, 0xbfe00c00, ldst_unscaled, OP_LDUR, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_R, F_HAS_ALIAS | F_GPRSIZE_IN_Q},
{"str", 0xb8000000, 0xbfe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_R, F_ALIAS | F_GPRSIZE_IN_Q},
{"ldr", 0xb8400000, 0xbfe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_R, F_ALIAS | F_GPRSIZE_IN_Q},
{"ldursw", 0xb8800000, 0xffe00c00, ldst_unscaled, OP_LDURSW, CORE, OP2 (Rt, ADDR_SIMM9), QL_LDST_X32, F_HAS_ALIAS},
{"ldrsw", 0xb8800000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (Rt, ADDR_SIMM9_2), QL_LDST_X32, F_ALIAS},
{"prfum", 0xf8800000, 0xffe00c00, ldst_unscaled, OP_PRFUM, CORE, OP2 (PRFOP, ADDR_SIMM9), QL_LDST_PRFM, F_HAS_ALIAS},
{"prfm", 0xf8800000, 0xffe00c00, ldst_unscaled, 0, CORE, OP2 (PRFOP, ADDR_SIMM9_2), QL_LDST_PRFM, F_ALIAS},
/* Load/store exclusive. */ /* Load/store exclusive. */
{"stxrb", 0x8007c00, 0xffe08000, ldstexcl, 0, CORE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0}, {"stxrb", 0x8007c00, 0xffe08000, ldstexcl, 0, CORE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},
{"stlxrb", 0x800fc00, 0xffe08000, ldstexcl, 0, CORE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0}, {"stlxrb", 0x800fc00, 0xffe08000, ldstexcl, 0, CORE, OP3 (Rs, Rt, ADDR_SIMPLE), QL_W2_LDST_EXC, 0},