espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-10-12 02:17:45 +08:00
Code Issues Packages Projects Releases Wiki Activity

sim: fix “alligned” typos

Browse Source 
Change-Id: Ifd574e38524dd4f1cf0fc003e0c5c7499abc84a0
This commit is contained in:
Reuben Thomas
2022-03-24 12:05:21 +00:00
committed by Simon Marchi
parent f1a4558586
commit c41524681b
3 changed files with 4 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
sim/common/sim-core.h
View File

@ -248,7 +248,7 @@ extern void *sim_core_trans_addr
order (including xor endian). Should the transfer fail, the order (including xor endian). Should the transfer fail, the
operation shall abort (no return). operation shall abort (no return).
ALIGNED assumes yhat the specified ADDRESS is correctly alligned ALIGNED assumes that the specified ADDRESS is correctly aligned
for an N byte transfer (no alignment checks are made). Passing an for an N byte transfer (no alignment checks are made). Passing an
incorrectly aligned ADDRESS is erroneous. incorrectly aligned ADDRESS is erroneous.
@ -256,7 +256,7 @@ extern void *sim_core_trans_addr
of an N byte transfer. Action, as defined by WITH_ALIGNMENT, being of an N byte transfer. Action, as defined by WITH_ALIGNMENT, being
taken should the check fail. taken should the check fail.
MISSALIGNED transfers the data regardless. MISALIGNED transfers the data regardless.
Misaligned xor-endian accesses are broken into a sequence of Misaligned xor-endian accesses are broken into a sequence of
transfers each <= WITH_XOR_ENDIAN bytes */ transfers each <= WITH_XOR_ENDIAN bytes */

2
sim/ppc/hw_init.c
View File

@ -576,7 +576,7 @@ create_ppc_elf_stack_frame(device *me,
const unsigned sizeof_argv = sizeof_arguments(argv); const unsigned sizeof_argv = sizeof_arguments(argv);
const unsigned_word start_argv = start_envp - sizeof_argv; const unsigned_word start_argv = start_envp - sizeof_argv;
/* link register save address - alligned to a 16byte boundary */ /* link register save address - aligned to a 16byte boundary */
const unsigned_word top_of_stack = ((start_argv const unsigned_word top_of_stack = ((start_argv
- 2 * sizeof(unsigned_word)) - 2 * sizeof(unsigned_word))
& ~0xf); & ~0xf);

2
sim/ppc/std-config.h
View File

@ -183,7 +183,7 @@ extern int current_environment;
This model. Instead allows both little and big endian modes to This model. Instead allows both little and big endian modes to
either take exceptions or handle miss aligned transfers. either take exceptions or handle miss aligned transfers.
If 0 is specified then for big-endian mode miss alligned accesses If 0 is specified then for big-endian mode miss aligned accesses
are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the are permitted (NONSTRICT_ALIGNMENT) while in little-endian mode the
processor will fault on them (STRICT_ALIGNMENT). */ processor will fault on them (STRICT_ALIGNMENT). */