mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-06-19 09:14:14 +08:00
import gdb-1999-12-06 snapshot
This commit is contained in:
Jason Molenda
@ -1,3 +1,9 @@
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1999-11-18 Ben Elliston <bje@cygnus.com>
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||||
* configure.in: Require autoconf 2.13 and remove obsolete
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||||
invocation of AC_C_CROSS.
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* configure: Regenerate.
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1999-09-29 Doug Evans <devans@casey.cygnus.com>
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* configure.in: Configure the testsuite directory for thumb.
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||||
@ -1,3 +1,10 @@
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1999-11-22 Nick Clifton <nickc@cygnus.com>
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* armos.c (SWIread): Generate an error message if a huge read is
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performed.
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(SWIwrite): Generate an error message if a huge write is
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performed.
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1999-10-27 Nick Clifton <nickc@cygnus.com>
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* thumbemu.c (ARMul_ThumbDecode): Accept 0xbebe as a thumb
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@ -878,7 +878,6 @@ mainswitch:
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break ;
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case 0x10 : /* TST reg and MRS CPSR and SWP word */
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#ifdef MODET
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if (BITS(4,11) == 0xB) {
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/* STRH register offset, no write-back, down, pre indexed */
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@ -2410,13 +2409,13 @@ mainswitch:
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* Co-Processor Data Transfers *
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\***************************************************************************/
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case 0xc0 :
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case 0xc4 : /* Store , No WriteBack , Post Dec */
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case 0xc4 :
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case 0xc0 : /* Store , No WriteBack , Post Dec */
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ARMul_STC(state,instr,LHS) ;
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break ;
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case 0xc1 :
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case 0xc5 : /* Load , No WriteBack , Post Dec */
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case 0xc5 :
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case 0xc1 : /* Load , No WriteBack , Post Dec */
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ARMul_LDC(state,instr,LHS) ;
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break ;
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@ -2511,7 +2510,8 @@ mainswitch:
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* Co-Processor Register Transfers (MCR) and Data Ops *
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\***************************************************************************/
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case 0xe0 : case 0xe2 : case 0xe4 : case 0xe6 :
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case 0xe2 :
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case 0xe0 : case 0xe4 : case 0xe6 :
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case 0xe8 : case 0xea : case 0xec : case 0xee :
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if (BIT(4)) { /* MCR */
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if (DESTReg == 15) {
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@ -308,6 +308,12 @@ SWIread (ARMul_State *state, ARMword f, ARMword ptr, ARMword len)
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int i;
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char *local = malloc (len);
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if (local == NULL)
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{
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fprintf (stderr, "sim: Unable to read 0x%x bytes - out of memory\n", len);
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return;
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}
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res = read (f, local, len);
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if (res > 0)
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for (i = 0; i < res; i++)
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@ -325,10 +331,15 @@ SWIwrite (ARMul_State *state, ARMword f, ARMword ptr, ARMword len)
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int i;
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char *local = malloc (len);
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for (i = 0; i < len; i++)
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if (local == NULL)
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{
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local[i] = ARMul_ReadByte (state, ptr + i);
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fprintf (stderr, "sim: Unable to write 0x%x bytes - out of memory\n", len);
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return;
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}
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for (i = 0; i < len; i++)
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local[i] = ARMul_ReadByte (state, ptr + i);
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res = write (f, local, len);
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state->Reg[0] = res == -1 ? -1 : len - res;
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free (local);
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@ -1,3 +1,34 @@
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1999-12-01 Dave Brolley <brolley@cygnus.com>
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* cgen-accfp.c (subsf): Check status code.
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(mulsf): Ditto.
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(negsf): Ditto.
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(abssf): Ditto.
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(sqrtsf): Ditto.
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(invsf): Ditto.
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(minsf): Ditto.
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(maxsf): Ditto.
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(subdf): Ditto.
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(muldf): Ditto.
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(divdf): Ditto.
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(negdf): Ditto.
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(absdf): Ditto.
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(sqrtdf): Ditto.
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(invdf): Ditto.
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||||
(mindf): Ditto.
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||||
(maxdf): Ditto.
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||||
1999-11-26 Dave Brolley <brolley@cygnus.com>
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||||
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* cgen-par.h (fn_df_write): Mode of data is DF.
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(sim_queue_fn_df_write): Mode of data is DF.
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* cgen-par.c (sim_queue_fn_df_write): Mode of data is DF.
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1999-11-22 Dave Brolley <brolley@cygnus.com>
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* cgen-trace.c (SIZE_TRACE_BUF): Inxrease size of trace buffer.
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* cgen-par.h (CGEN_WRITE_QUEUE_SIZE): Increase size of queue.
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1999-11-04 Dave Brolley <brolley@cygnus.com>
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* cgen-par.h (cgen_write_queue_kind): Add CGEN_FN_XI_WRITE and
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@ -42,10 +42,13 @@ subsf (CGEN_FPU* fpu, SF x, SF y)
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sim_fpu op2;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_status status;
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sim_fpu_32to (&op1, x);
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sim_fpu_32to (&op2, y);
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sim_fpu_sub (&ans, &op1, &op2);
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status = sim_fpu_sub (&ans, &op1, &op2);
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if (status != 0)
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(*fpu->ops->error) (fpu, status);
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sim_fpu_to32 (&res, &ans);
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return res;
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@ -58,10 +61,13 @@ mulsf (CGEN_FPU* fpu, SF x, SF y)
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sim_fpu op2;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_status status;
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sim_fpu_32to (&op1, x);
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sim_fpu_32to (&op2, y);
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sim_fpu_mul (&ans, &op1, &op2);
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status = sim_fpu_mul (&ans, &op1, &op2);
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if (status != 0)
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(*fpu->ops->error) (fpu, status);
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sim_fpu_to32 (&res, &ans);
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return res;
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@ -92,9 +98,12 @@ negsf (CGEN_FPU* fpu, SF x)
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sim_fpu op1;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_status status;
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sim_fpu_32to (&op1, x);
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sim_fpu_neg (&ans, &op1);
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status = sim_fpu_neg (&ans, &op1);
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if (status != 0)
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(*fpu->ops->error) (fpu, status);
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sim_fpu_to32 (&res, &ans);
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return res;
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||||
@ -106,9 +115,12 @@ abssf (CGEN_FPU* fpu, SF x)
|
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sim_fpu op1;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_status status;
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sim_fpu_32to (&op1, x);
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sim_fpu_abs (&ans, &op1);
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status = sim_fpu_abs (&ans, &op1);
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if (status != 0)
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(*fpu->ops->error) (fpu, status);
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sim_fpu_to32 (&res, &ans);
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return res;
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@ -120,9 +132,12 @@ sqrtsf (CGEN_FPU* fpu, SF x)
|
||||
sim_fpu op1;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_status status;
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sim_fpu_32to (&op1, x);
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sim_fpu_sqrt (&ans, &op1);
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status = sim_fpu_sqrt (&ans, &op1);
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if (status != 0)
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(*fpu->ops->error) (fpu, status);
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||||
sim_fpu_to32 (&res, &ans);
|
||||
|
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return res;
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@ -134,9 +149,12 @@ invsf (CGEN_FPU* fpu, SF x)
|
||||
sim_fpu op1;
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||||
sim_fpu ans;
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||||
unsigned32 res;
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sim_fpu_status status;
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||||
sim_fpu_32to (&op1, x);
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||||
sim_fpu_inv (&ans, &op1);
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status = sim_fpu_inv (&ans, &op1);
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if (status != 0)
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(*fpu->ops->error) (fpu, status);
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sim_fpu_to32 (&res, &ans);
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|
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return res;
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@ -149,10 +167,13 @@ minsf (CGEN_FPU* fpu, SF x, SF y)
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sim_fpu op2;
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sim_fpu ans;
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unsigned32 res;
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sim_fpu_status status;
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|
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sim_fpu_32to (&op1, x);
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sim_fpu_32to (&op2, y);
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sim_fpu_min (&ans, &op1, &op2);
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status = sim_fpu_min (&ans, &op1, &op2);
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if (status != 0)
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(*fpu->ops->error) (fpu, status);
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sim_fpu_to32 (&res, &ans);
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|
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return res;
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@ -165,10 +186,13 @@ maxsf (CGEN_FPU* fpu, SF x, SF y)
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sim_fpu op2;
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sim_fpu ans;
|
||||
unsigned32 res;
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sim_fpu_status status;
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|
||||
sim_fpu_32to (&op1, x);
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sim_fpu_32to (&op2, y);
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sim_fpu_max (&ans, &op1, &op2);
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status = sim_fpu_max (&ans, &op1, &op2);
|
||||
if (status != 0)
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(*fpu->ops->error) (fpu, status);
|
||||
sim_fpu_to32 (&res, &ans);
|
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return res;
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@ -354,10 +378,13 @@ subdf (CGEN_FPU* fpu, DF x, DF y)
|
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sim_fpu op2;
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sim_fpu ans;
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unsigned64 res;
|
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sim_fpu_status status;
|
||||
|
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sim_fpu_64to (&op1, x);
|
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sim_fpu_64to (&op2, y);
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||||
sim_fpu_sub (&ans, &op1, &op2);
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status = sim_fpu_sub (&ans, &op1, &op2);
|
||||
if (status != 0)
|
||||
(*fpu->ops->error) (fpu, status);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
|
||||
return res;
|
||||
@ -370,10 +397,13 @@ muldf (CGEN_FPU* fpu, DF x, DF y)
|
||||
sim_fpu op2;
|
||||
sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_status status;
|
||||
|
||||
sim_fpu_64to (&op1, x);
|
||||
sim_fpu_64to (&op2, y);
|
||||
sim_fpu_mul (&ans, &op1, &op2);
|
||||
status = sim_fpu_mul (&ans, &op1, &op2);
|
||||
if (status != 0)
|
||||
(*fpu->ops->error) (fpu, status);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
|
||||
return res;
|
||||
@ -386,10 +416,13 @@ divdf (CGEN_FPU* fpu, DF x, DF y)
|
||||
sim_fpu op2;
|
||||
sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_status status;
|
||||
|
||||
sim_fpu_64to (&op1, x);
|
||||
sim_fpu_64to (&op2, y);
|
||||
sim_fpu_div (&ans, &op1, &op2);
|
||||
status = sim_fpu_div (&ans, &op1, &op2);
|
||||
if (status != 0)
|
||||
(*fpu->ops->error) (fpu, status);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
|
||||
return res;
|
||||
@ -401,9 +434,12 @@ negdf (CGEN_FPU* fpu, DF x)
|
||||
sim_fpu op1;
|
||||
sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_status status;
|
||||
|
||||
sim_fpu_64to (&op1, x);
|
||||
sim_fpu_neg (&ans, &op1);
|
||||
status = sim_fpu_neg (&ans, &op1);
|
||||
if (status != 0)
|
||||
(*fpu->ops->error) (fpu, status);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
|
||||
return res;
|
||||
@ -415,9 +451,12 @@ absdf (CGEN_FPU* fpu, DF x)
|
||||
sim_fpu op1;
|
||||
sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_status status;
|
||||
|
||||
sim_fpu_64to (&op1, x);
|
||||
sim_fpu_abs (&ans, &op1);
|
||||
status = sim_fpu_abs (&ans, &op1);
|
||||
if (status != 0)
|
||||
(*fpu->ops->error) (fpu, status);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
|
||||
return res;
|
||||
@ -429,9 +468,12 @@ sqrtdf (CGEN_FPU* fpu, DF x)
|
||||
sim_fpu op1;
|
||||
sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_status status;
|
||||
|
||||
sim_fpu_64to (&op1, x);
|
||||
sim_fpu_sqrt (&ans, &op1);
|
||||
status = sim_fpu_sqrt (&ans, &op1);
|
||||
if (status != 0)
|
||||
(*fpu->ops->error) (fpu, status);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
|
||||
return res;
|
||||
@ -443,9 +485,12 @@ invdf (CGEN_FPU* fpu, DF x)
|
||||
sim_fpu op1;
|
||||
sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_status status;
|
||||
|
||||
sim_fpu_64to (&op1, x);
|
||||
sim_fpu_inv (&ans, &op1);
|
||||
status = sim_fpu_inv (&ans, &op1);
|
||||
if (status != 0)
|
||||
(*fpu->ops->error) (fpu, status);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
|
||||
return res;
|
||||
@ -458,10 +503,13 @@ mindf (CGEN_FPU* fpu, DF x, DF y)
|
||||
sim_fpu op2;
|
||||
sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_status status;
|
||||
|
||||
sim_fpu_64to (&op1, x);
|
||||
sim_fpu_64to (&op2, y);
|
||||
sim_fpu_min (&ans, &op1, &op2);
|
||||
status = sim_fpu_min (&ans, &op1, &op2);
|
||||
if (status != 0)
|
||||
(*fpu->ops->error) (fpu, status);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
|
||||
return res;
|
||||
@ -474,10 +522,13 @@ maxdf (CGEN_FPU* fpu, DF x, DF y)
|
||||
sim_fpu op2;
|
||||
sim_fpu ans;
|
||||
unsigned64 res;
|
||||
sim_fpu_status status;
|
||||
|
||||
sim_fpu_64to (&op1, x);
|
||||
sim_fpu_64to (&op2, y);
|
||||
sim_fpu_max (&ans, &op1, &op2);
|
||||
status = sim_fpu_max (&ans, &op1, &op2);
|
||||
if (status != 0)
|
||||
(*fpu->ops->error) (fpu, status);
|
||||
sim_fpu_to64 (&res, &ans);
|
||||
|
||||
return res;
|
||||
|
||||
@ -142,7 +142,7 @@ void sim_queue_fn_xi_write (
|
||||
|
||||
void sim_queue_fn_df_write (
|
||||
SIM_CPU *cpu,
|
||||
void (*write_function)(SIM_CPU *cpu, UINT, DI),
|
||||
void (*write_function)(SIM_CPU *cpu, UINT, DF),
|
||||
UINT regno,
|
||||
DF value
|
||||
)
|
||||
|
||||
@ -73,8 +73,8 @@ typedef struct {
|
||||
} fn_di_write;
|
||||
struct {
|
||||
UINT regno;
|
||||
DI value;
|
||||
void (*function)(SIM_CPU *, UINT, DI);
|
||||
DF value;
|
||||
void (*function)(SIM_CPU *, UINT, DF);
|
||||
} fn_df_write;
|
||||
struct {
|
||||
UINT regno;
|
||||
@ -121,7 +121,7 @@ extern void cgen_write_queue_element_execute (
|
||||
|
||||
/* Instance of the queue for parallel write-after support. */
|
||||
/* FIXME: Should be dynamic? */
|
||||
#define CGEN_WRITE_QUEUE_SIZE (4 * 4) /* 4 writes x 4 insns -- for now. */
|
||||
#define CGEN_WRITE_QUEUE_SIZE (64 * 4) /* 64 writes x 4 insns -- for now. */
|
||||
|
||||
typedef struct {
|
||||
int index;
|
||||
@ -151,7 +151,7 @@ extern void sim_queue_pc_write (SIM_CPU *, USI);
|
||||
extern void sim_queue_fn_hi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, UHI), UINT, UHI);
|
||||
extern void sim_queue_fn_si_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, USI), UINT, SI);
|
||||
extern void sim_queue_fn_di_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DI), UINT, DI);
|
||||
extern void sim_queue_fn_df_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DI), UINT, DF);
|
||||
extern void sim_queue_fn_df_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, DF), UINT, DF);
|
||||
extern void sim_queue_fn_xi_write (SIM_CPU *, void (*)(SIM_CPU *, UINT, SI *), UINT, SI *);
|
||||
extern void sim_queue_fn_pc_write (SIM_CPU *, void (*)(SIM_CPU *, USI), USI);
|
||||
|
||||
|
||||
@ -51,7 +51,7 @@ with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
#endif
|
||||
|
||||
#ifndef SIZE_TRACE_BUF
|
||||
#define SIZE_TRACE_BUF 256
|
||||
#define SIZE_TRACE_BUF 1024
|
||||
#endif
|
||||
|
||||
static void
|
||||
|
||||
82
sim/configure
vendored
82
sim/configure
vendored
@ -30,7 +30,6 @@ program_suffix=NONE
|
||||
program_transform_name=s,x,x,
|
||||
silent=
|
||||
site=
|
||||
sitefile=
|
||||
srcdir=
|
||||
target=NONE
|
||||
verbose=
|
||||
@ -145,7 +144,6 @@ Configuration:
|
||||
--help print this message
|
||||
--no-create do not create output files
|
||||
--quiet, --silent do not print \`checking...' messages
|
||||
--site-file=FILE use FILE as the site file
|
||||
--version print the version of autoconf that created configure
|
||||
Directory and file names:
|
||||
--prefix=PREFIX install architecture-independent files in PREFIX
|
||||
@ -316,11 +314,6 @@ EOF
|
||||
-site=* | --site=* | --sit=*)
|
||||
site="$ac_optarg" ;;
|
||||
|
||||
-site-file | --site-file | --site-fil | --site-fi | --site-f)
|
||||
ac_prev=sitefile ;;
|
||||
-site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*)
|
||||
sitefile="$ac_optarg" ;;
|
||||
|
||||
-srcdir | --srcdir | --srcdi | --srcd | --src | --sr)
|
||||
ac_prev=srcdir ;;
|
||||
-srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*)
|
||||
@ -486,16 +479,12 @@ fi
|
||||
srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'`
|
||||
|
||||
# Prefer explicitly selected file to automatically selected ones.
|
||||
if test -z "$sitefile"; then
|
||||
if test -z "$CONFIG_SITE"; then
|
||||
if test "x$prefix" != xNONE; then
|
||||
CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
|
||||
else
|
||||
CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
|
||||
fi
|
||||
if test -z "$CONFIG_SITE"; then
|
||||
if test "x$prefix" != xNONE; then
|
||||
CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site"
|
||||
else
|
||||
CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site"
|
||||
fi
|
||||
else
|
||||
CONFIG_SITE="$sitefile"
|
||||
fi
|
||||
for ac_site_file in $CONFIG_SITE; do
|
||||
if test -r "$ac_site_file"; then
|
||||
@ -538,7 +527,7 @@ fi
|
||||
# Extract the first word of "gcc", so it can be a program name with args.
|
||||
set dummy gcc; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:542: checking for $ac_word" >&5
|
||||
echo "configure:531: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -568,7 +557,7 @@ if test -z "$CC"; then
|
||||
# Extract the first word of "cc", so it can be a program name with args.
|
||||
set dummy cc; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:572: checking for $ac_word" >&5
|
||||
echo "configure:561: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -619,7 +608,7 @@ fi
|
||||
# Extract the first word of "cl", so it can be a program name with args.
|
||||
set dummy cl; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:623: checking for $ac_word" >&5
|
||||
echo "configure:612: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -651,7 +640,7 @@ fi
|
||||
fi
|
||||
|
||||
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
|
||||
echo "configure:655: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
|
||||
echo "configure:644: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
|
||||
|
||||
ac_ext=c
|
||||
# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
|
||||
@ -662,12 +651,12 @@ cross_compiling=$ac_cv_prog_cc_cross
|
||||
|
||||
cat > conftest.$ac_ext << EOF
|
||||
|
||||
#line 666 "configure"
|
||||
#line 655 "configure"
|
||||
#include "confdefs.h"
|
||||
|
||||
main(){return(0);}
|
||||
EOF
|
||||
if { (eval echo configure:671: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
if { (eval echo configure:660: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
ac_cv_prog_cc_works=yes
|
||||
# If we can't run a trivial program, we are probably using a cross compiler.
|
||||
if (./conftest; exit) 2>/dev/null; then
|
||||
@ -693,12 +682,12 @@ if test $ac_cv_prog_cc_works = no; then
|
||||
{ echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
|
||||
fi
|
||||
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
|
||||
echo "configure:697: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
|
||||
echo "configure:686: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
|
||||
echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
|
||||
cross_compiling=$ac_cv_prog_cc_cross
|
||||
|
||||
echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
|
||||
echo "configure:702: checking whether we are using GNU C" >&5
|
||||
echo "configure:691: checking whether we are using GNU C" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -707,7 +696,7 @@ else
|
||||
yes;
|
||||
#endif
|
||||
EOF
|
||||
if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:711: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
|
||||
if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:700: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
|
||||
ac_cv_prog_gcc=yes
|
||||
else
|
||||
ac_cv_prog_gcc=no
|
||||
@ -726,7 +715,7 @@ ac_test_CFLAGS="${CFLAGS+set}"
|
||||
ac_save_CFLAGS="$CFLAGS"
|
||||
CFLAGS=
|
||||
echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
|
||||
echo "configure:730: checking whether ${CC-cc} accepts -g" >&5
|
||||
echo "configure:719: checking whether ${CC-cc} accepts -g" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -788,7 +777,7 @@ ac_configure=$ac_aux_dir/configure # This should be Cygnus configure.
|
||||
# SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff"
|
||||
# ./install, which can be erroneously created by make from ./install.sh.
|
||||
echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6
|
||||
echo "configure:792: checking for a BSD compatible install" >&5
|
||||
echo "configure:781: checking for a BSD compatible install" >&5
|
||||
if test -z "$INSTALL"; then
|
||||
if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
@ -847,7 +836,7 @@ else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
|
||||
fi
|
||||
|
||||
echo $ac_n "checking host system type""... $ac_c" 1>&6
|
||||
echo "configure:851: checking host system type" >&5
|
||||
echo "configure:840: checking host system type" >&5
|
||||
|
||||
host_alias=$host
|
||||
case "$host_alias" in
|
||||
@ -868,7 +857,7 @@ host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
|
||||
echo "$ac_t""$host" 1>&6
|
||||
|
||||
echo $ac_n "checking build system type""... $ac_c" 1>&6
|
||||
echo "configure:872: checking build system type" >&5
|
||||
echo "configure:861: checking build system type" >&5
|
||||
|
||||
build_alias=$build
|
||||
case "$build_alias" in
|
||||
@ -894,7 +883,7 @@ fi
|
||||
# Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args.
|
||||
set dummy ${ac_tool_prefix}ar; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:898: checking for $ac_word" >&5
|
||||
echo "configure:887: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -926,7 +915,7 @@ fi
|
||||
# Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args.
|
||||
set dummy ${ac_tool_prefix}ranlib; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:930: checking for $ac_word" >&5
|
||||
echo "configure:919: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -958,7 +947,7 @@ if test -n "$ac_tool_prefix"; then
|
||||
# Extract the first word of "ranlib", so it can be a program name with args.
|
||||
set dummy ranlib; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:962: checking for $ac_word" >&5
|
||||
echo "configure:951: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -1038,7 +1027,7 @@ else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; }
|
||||
fi
|
||||
|
||||
echo $ac_n "checking host system type""... $ac_c" 1>&6
|
||||
echo "configure:1042: checking host system type" >&5
|
||||
echo "configure:1031: checking host system type" >&5
|
||||
|
||||
host_alias=$host
|
||||
case "$host_alias" in
|
||||
@ -1059,7 +1048,7 @@ host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
|
||||
echo "$ac_t""$host" 1>&6
|
||||
|
||||
echo $ac_n "checking target system type""... $ac_c" 1>&6
|
||||
echo "configure:1063: checking target system type" >&5
|
||||
echo "configure:1052: checking target system type" >&5
|
||||
|
||||
target_alias=$target
|
||||
case "$target_alias" in
|
||||
@ -1077,7 +1066,7 @@ target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'`
|
||||
echo "$ac_t""$target" 1>&6
|
||||
|
||||
echo $ac_n "checking build system type""... $ac_c" 1>&6
|
||||
echo "configure:1081: checking build system type" >&5
|
||||
echo "configure:1070: checking build system type" >&5
|
||||
|
||||
build_alias=$build
|
||||
case "$build_alias" in
|
||||
@ -1121,7 +1110,7 @@ test "$program_transform_name" = "" && program_transform_name="s,x,x,"
|
||||
# Extract the first word of "gcc", so it can be a program name with args.
|
||||
set dummy gcc; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:1125: checking for $ac_word" >&5
|
||||
echo "configure:1114: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -1151,7 +1140,7 @@ if test -z "$CC"; then
|
||||
# Extract the first word of "cc", so it can be a program name with args.
|
||||
set dummy cc; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:1155: checking for $ac_word" >&5
|
||||
echo "configure:1144: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -1202,7 +1191,7 @@ fi
|
||||
# Extract the first word of "cl", so it can be a program name with args.
|
||||
set dummy cl; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:1206: checking for $ac_word" >&5
|
||||
echo "configure:1195: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -1234,7 +1223,7 @@ fi
|
||||
fi
|
||||
|
||||
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6
|
||||
echo "configure:1238: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
|
||||
echo "configure:1227: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5
|
||||
|
||||
ac_ext=c
|
||||
# CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options.
|
||||
@ -1245,12 +1234,12 @@ cross_compiling=$ac_cv_prog_cc_cross
|
||||
|
||||
cat > conftest.$ac_ext << EOF
|
||||
|
||||
#line 1249 "configure"
|
||||
#line 1238 "configure"
|
||||
#include "confdefs.h"
|
||||
|
||||
main(){return(0);}
|
||||
EOF
|
||||
if { (eval echo configure:1254: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
if { (eval echo configure:1243: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then
|
||||
ac_cv_prog_cc_works=yes
|
||||
# If we can't run a trivial program, we are probably using a cross compiler.
|
||||
if (./conftest; exit) 2>/dev/null; then
|
||||
@ -1276,12 +1265,12 @@ if test $ac_cv_prog_cc_works = no; then
|
||||
{ echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; }
|
||||
fi
|
||||
echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6
|
||||
echo "configure:1280: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
|
||||
echo "configure:1269: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5
|
||||
echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6
|
||||
cross_compiling=$ac_cv_prog_cc_cross
|
||||
|
||||
echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6
|
||||
echo "configure:1285: checking whether we are using GNU C" >&5
|
||||
echo "configure:1274: checking whether we are using GNU C" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -1290,7 +1279,7 @@ else
|
||||
yes;
|
||||
#endif
|
||||
EOF
|
||||
if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1294: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
|
||||
if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1283: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then
|
||||
ac_cv_prog_gcc=yes
|
||||
else
|
||||
ac_cv_prog_gcc=no
|
||||
@ -1309,7 +1298,7 @@ ac_test_CFLAGS="${CFLAGS+set}"
|
||||
ac_save_CFLAGS="$CFLAGS"
|
||||
CFLAGS=
|
||||
echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6
|
||||
echo "configure:1313: checking whether ${CC-cc} accepts -g" >&5
|
||||
echo "configure:1302: checking whether ${CC-cc} accepts -g" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -1347,7 +1336,7 @@ AR=${AR-ar}
|
||||
# Extract the first word of "ranlib", so it can be a program name with args.
|
||||
set dummy ranlib; ac_word=$2
|
||||
echo $ac_n "checking for $ac_word""... $ac_c" 1>&6
|
||||
echo "configure:1351: checking for $ac_word" >&5
|
||||
echo "configure:1340: checking for $ac_word" >&5
|
||||
if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then
|
||||
echo $ac_n "(cached) $ac_c" 1>&6
|
||||
else
|
||||
@ -1376,7 +1365,6 @@ fi
|
||||
|
||||
|
||||
# Put a plausible default for CC_FOR_BUILD in Makefile.
|
||||
|
||||
if test "x$cross_compiling" = "xno"; then
|
||||
CC_FOR_BUILD='$(CC)'
|
||||
else
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
dnl Process this file with autoconf to produce a configure script.
|
||||
AC_PREREQ(2.12.1)dnl
|
||||
AC_PREREQ(2.13)dnl
|
||||
AC_INIT(Makefile.in)
|
||||
|
||||
AC_PROG_CC
|
||||
@ -18,7 +18,6 @@ AC_SUBST(AR)
|
||||
AC_PROG_RANLIB
|
||||
|
||||
# Put a plausible default for CC_FOR_BUILD in Makefile.
|
||||
AC_C_CROSS
|
||||
if test "x$cross_compiling" = "xno"; then
|
||||
CC_FOR_BUILD='$(CC)'
|
||||
else
|
||||
|
||||
@ -1,3 +1,8 @@
|
||||
1999-11-25 Nick Clifton <nickc@cygnus.com>
|
||||
|
||||
* simops.c (OP_4E0F): New function: Simulate new bit pattern for
|
||||
cpfg instruction.
|
||||
|
||||
Fri Oct 29 18:34:28 1999 Andrew Cagney <cagney@b1.cygnus.com>
|
||||
|
||||
* simops.c (move_to_cr): Don't allow user to set PSW.DM in either
|
||||
|
||||
@ -1087,6 +1087,28 @@ OP_4E09 ()
|
||||
trace_output_flag ();
|
||||
}
|
||||
|
||||
/* cpfg */
|
||||
void
|
||||
OP_4E0F ()
|
||||
{
|
||||
uint8 val;
|
||||
|
||||
trace_input ("cpfg", OP_FLAG_OUTPUT, OP_FLAG, OP_VOID);
|
||||
|
||||
if (OP[1] == 0)
|
||||
val = PSW_F0;
|
||||
else if (OP[1] == 1)
|
||||
val = PSW_F1;
|
||||
else
|
||||
val = PSW_C;
|
||||
if (OP[0] == 0)
|
||||
SET_PSW_F0 (val);
|
||||
else
|
||||
SET_PSW_F1 (val);
|
||||
|
||||
trace_output_flag ();
|
||||
}
|
||||
|
||||
/* dbt */
|
||||
void
|
||||
OP_5F20 ()
|
||||
|
||||
@ -1,3 +1,11 @@
|
||||
1999-11-29 Mark Salter <msalter@cygnus.com>
|
||||
|
||||
* dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
|
||||
to clear status bits in sdisr register. This is how the hardware works.
|
||||
|
||||
* interp.c (sim_open): Added more memory aliases for jmr3904 hardware
|
||||
being used by cygmon.
|
||||
|
||||
1999-11-11 Andrew Haley <aph@cygnus.com>
|
||||
|
||||
* interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
|
||||
|
||||
@ -1,6 +1,6 @@
|
||||
/* This file is part of the program GDB, the GNU debugger.
|
||||
|
||||
Copyright (C) 1998 Free Software Foundation, Inc.
|
||||
Copyright (C) 1998, 1999 Free Software Foundation, Inc.
|
||||
Contributed by Cygnus Solutions.
|
||||
|
||||
This program is free software; you can redistribute it and/or modify
|
||||
@ -167,6 +167,7 @@ struct tx3904sio
|
||||
unsigned_4 sdisr;
|
||||
#define SDISR_WR_MASK 0x00070000U
|
||||
#define SDISR_SET_BYTE(c,o,b) ((c)->sdisr = SDISR_WR_MASK & (((c)->sdisr & ~LSMASK32((o)*8+7,(o)*8)) | ((b)<< (o)*8)))
|
||||
#define SDISR_CLEAR_FLAG_BYTE(c,o,b) ((c)->sdisr = SDISR_WR_MASK & (((c)->sdisr & ~LSMASK32((o)*8+7,(o)*8)) & ((b)<< (o)*8)))
|
||||
#define SDISR_GET_TDIS(c) ((c)->sdisr & 0x00020000)
|
||||
#define SDISR_SET_TDIS(c) ((c)->sdisr |= 0x00020000)
|
||||
#define SDISR_GET_RDIS(c) ((c)->sdisr & 0x00010000)
|
||||
@ -419,7 +420,7 @@ tx3904sio_io_write_buffer (struct hw *me,
|
||||
last_int = controller->sdisr & controller->sdicr;
|
||||
/* HW_TRACE ((me, "sdisr - sdisr %08x sdicr %08x",
|
||||
controller->sdisr, controller->sdicr)); */
|
||||
SDISR_SET_BYTE(controller, reg_offset, write_byte);
|
||||
SDISR_CLEAR_FLAG_BYTE(controller, reg_offset, write_byte);
|
||||
/* HW_TRACE ((me, "sdisr + sdisr %08x sdicr %08x",
|
||||
controller->sdisr, controller->sdicr)); */
|
||||
next_int = controller->sdisr & controller->sdicr;
|
||||
|
||||
@ -462,8 +462,9 @@ sim_open (kind, cb, abfd, argv)
|
||||
sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xFFFF9000, 0x200); /* EBIF */
|
||||
sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xFFFFF500, 0x300); /* PIO */
|
||||
sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xFFFF8000, 0x804); /* DRAMC */
|
||||
sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB2100000, 0x004); /* ISA ctl */
|
||||
sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB1000000, 0x400); /* ISA I/O */
|
||||
sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB2100000, 0x004); /* ISA ctl */
|
||||
sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB2500000, 0x004); /* LED/switch */
|
||||
sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB2700000, 0x004); /* RTC */
|
||||
sim_do_commandf (sd, "memory alias 0x%lx@1,0x%lx", 0xB3C00000, 0x004); /* RTC */
|
||||
|
||||
|
||||
@ -3235,6 +3235,7 @@
|
||||
|
||||
|
||||
// MOVF
|
||||
// MOVT
|
||||
000000,5.RS,3.CC,0,1.TF,5.RD,00000000001:SPECIAL:32::MOVtf
|
||||
"mov%s<TF> r<RD>, r<RS>, <CC>"
|
||||
*mipsIV:
|
||||
@ -3246,6 +3247,7 @@
|
||||
|
||||
|
||||
// MOVF.fmt
|
||||
// MOVT.fmt
|
||||
010001,10,3.FMT,3.CC,0,1.TF,5.FS,5.FD,010001:COP1:32::MOVtf.fmt
|
||||
"mov%s<TF>.%s<FMT> f<FD>, f<FS>, <CC>"
|
||||
*mipsIV:
|
||||
|
||||
@ -59,6 +59,15 @@ Tue Feb 16 23:57:17 1999 Jeffrey A Law (law@cygnus.com)
|
||||
generation. (mn103int_finish): Install it as ioctl handler.
|
||||
* dv-mn103tim.c: Support timer 6 specially. Endianness fixes.
|
||||
|
||||
Wed Oct 14 12:11:05 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* am33.igen: Allow autoincrement stores using the same register
|
||||
for source and destination operands.
|
||||
|
||||
Mon Aug 31 10:19:55 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* am33.igen: Reverse HI/LO outputs of 4 operand "mul" and "mulu".
|
||||
|
||||
Fri Aug 28 14:40:49 1998 Joyce Janczyn <janczyn@cygnus.com>
|
||||
|
||||
* interp.c (sim_open): Check for invalid --board option, fix
|
||||
@ -73,6 +82,21 @@ Mon Aug 24 11:50:09 1998 Joyce Janczyn <janczyn@cygnus.com>
|
||||
|
||||
* sim-main.h (SIM_HANDLES_LMA): Define SIM_HANDLES_LMA.
|
||||
|
||||
Wed Aug 12 12:36:07 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* am33.igen: Handle case where first DSP operation modifies a
|
||||
register used in the second DSP operation correctly.
|
||||
|
||||
Tue Jul 28 10:10:25 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* am33.igen: Detect cases where two operands must not match for
|
||||
DSP instructions too.
|
||||
|
||||
Mon Jul 27 12:04:17 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* am33.igen: Detect cases where two operands must not match in
|
||||
non-DSP instructions.
|
||||
|
||||
Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>
|
||||
|
||||
* op_utils.c (do_syscall): Rewrite to use common/syscall.c.
|
||||
@ -83,21 +107,71 @@ Fri Jul 24 18:15:21 1998 Joyce Janczyn <janczyn@cygnus.com>
|
||||
* mn10300.igen: Change C++ style comments to C style comments.
|
||||
Check for divide by zero in div and divu ops.
|
||||
|
||||
Fri Jul 24 12:49:28 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* am33.igen (translate_xreg): New function. Use it as needed.
|
||||
|
||||
Thu Jul 23 10:05:28 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* am33.igen: Add some missing instructions.
|
||||
|
||||
* am33.igen: Autoincrement loads/store fixes.
|
||||
|
||||
Tue Jul 21 09:48:14 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* am33.igen: Add mov_lCC DSP instructions.
|
||||
|
||||
* am33.igen: Add most am33 DSP instructions.
|
||||
|
||||
Thu Jul 9 10:06:55 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* mn10300.igen: Fix Z bit for addc and subc instructions.
|
||||
Minor fixes in multiply/divide patterns.
|
||||
|
||||
* am33.igen: Add missing mul[u] imm32,Rn. Fix condition code
|
||||
handling for many instructions. Fix sign extension for some
|
||||
24bit immediates.
|
||||
|
||||
* am33.igen: Fix Z bit for remaining addc/subc instructions.
|
||||
Do not sign extend immediate for mov imm,XRn.
|
||||
More random mul, mac & div fixes.
|
||||
Remove some unused variables.
|
||||
Sign extend 24bit displacement in memory addresses.
|
||||
|
||||
* am33.igen: Fix Z bit for addc Rm,Rn and subc Rm,Rn. Various
|
||||
fixes to 2 register multiply, divide and mac instructions. Set
|
||||
Z,N correctly for sat16. Sign extend 24 bit immediate for add,
|
||||
and sub instructions.
|
||||
|
||||
* am33.igen: Add remaining non-DSP instructions.
|
||||
|
||||
Wed Jul 8 16:29:12 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* am33.igen (translate_rreg): New function. Use it as appropriate.
|
||||
|
||||
* am33.igen: More am33 instructions. Fix "div".
|
||||
|
||||
Mon Jul 6 15:39:22 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* mn10300.igen: Add am33 support.
|
||||
|
||||
* Makefile.in: Use multi-sim to support both a mn10300 and am33
|
||||
simulator.
|
||||
|
||||
* am33.igen: Add many more am33 instructions.
|
||||
|
||||
Wed Jul 1 17:07:09 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* mn10300_sim.h (FETCH24): Define.
|
||||
|
||||
* mn10300_sim.h: Add defines for some registers found on the AM33.
|
||||
* am33.igen: New file with some am33 support.
|
||||
|
||||
Tue Jun 30 11:23:20 1998 Jeffrey A Law (law@cygnus.com)
|
||||
|
||||
* mn10300_sim.h: Include bfd.h
|
||||
(struct state): Add more room for processor specific registers.
|
||||
(REG_E0): Define.
|
||||
|
||||
Thu Jun 25 10:12:03 1998 Joyce Janczyn <janczyn@cygnus.com>
|
||||
|
||||
|
||||
@ -113,6 +113,8 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen
|
||||
../igen/igen \
|
||||
$(IGEN_TRACE) \
|
||||
-G gen-direct-access \
|
||||
-M mn10300,am33 -G gen-multi-sim=am33 \
|
||||
-I $(srcdir) \
|
||||
-i $(IGEN_INSN) \
|
||||
-o $(IGEN_DC) \
|
||||
-x \
|
||||
|
||||
8683
sim/mn10300/am33.igen
Normal file
8683
sim/mn10300/am33.igen
Normal file
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@ -115,6 +115,13 @@ extern struct simops Simops[];
|
||||
#define REG_LIR 12
|
||||
#define REG_LAR 13
|
||||
#define REG_MDRQ 14
|
||||
#define REG_E0 15
|
||||
#define REG_SSP 23
|
||||
#define REG_MSP 24
|
||||
#define REG_USP 25
|
||||
#define REG_MCRH 26
|
||||
#define REG_MCRL 27
|
||||
#define REG_MCVF 28
|
||||
|
||||
#if WITH_COMMON
|
||||
/* These definitions conflict with similar macros in common. */
|
||||
|
||||
Reference in New Issue
Block a user