Move all global state data into opcode table struct, and treat

opcode table as something that is "opened/closed".
	* cgen-asm.c (all fns): New first arg of opcode table descriptor.
	(cgen_asm_init): Delete.
	(cgen_set_parse_operand_fn): New function.
	* cgen-dis.c (all fns): New first arg of opcode table descriptor.
	(cgen_dis_init): Delete.
	* cgen-opc.c (all fns): New first arg of opcode table descriptor.
	(cgen_current_{opcode_table_mach,endian}): Delete.
	* cgen-asm.in (all fns): New first arg of opcode table descriptor.
	* cgen-dis.in (all fns): Ditto.
	* cgen-opc.in (all fns): Ditto.
	* m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.

	* cgen-asm.in (parse_insn_normal): Ignore case in mnemonics.

	* cgen-dis.in (print_normal): Split into two.
	(print_address): New function.
	(extract_insn_normal): Clarify insn_value arg.
	(print_int_insn): Renamed from print_insn.
	(print_insn): New arg.
	(print_insn_@arch@): Open opcode table if not already done so.
	Move reading of insn into print_insn.

opcodes/ChangeLog

@@ -1,3 +1,33 @@
+Mon Aug  3 12:43:16 1998  Doug Evans  <devans@seba.cygnus.com>
+
+	Move all global state data into opcode table struct, and treat
+	opcode table as something that is "opened/closed".
+	* cgen-asm.c (all fns): New first arg of opcode table descriptor.
+	(cgen_asm_init): Delete.
+	(cgen_set_parse_operand_fn): New function.
+	* cgen-dis.c (all fns): New first arg of opcode table descriptor.
+	(cgen_dis_init): Delete.
+	* cgen-opc.c (all fns): New first arg of opcode table descriptor.
+	(cgen_current_{opcode_table_mach,endian}): Delete.
+start-sanitize-cygnus
+	* cgen-asm.in (all fns): New first arg of opcode table descriptor.
+	* cgen-dis.in (all fns): Ditto.
+	* cgen-opc.in (all fns): Ditto.
+end-sanitize-cygnus
+	* m32r-asm.c,m32r-dis.c,m32r-opc.c,m32r-opc.h: Regenerate.
+
+start-sanitize-cygnus
+	* cgen-asm.in (parse_insn_normal): Ignore case in mnemonics.
+
+	* cgen-dis.in (print_normal): Split into two.
+	(print_address): New function.
+	(extract_insn_normal): Clarify insn_value arg.
+	(print_int_insn): Renamed from print_insn.
+	(print_insn): New arg.
+	(print_insn_@arch@): Open opcode table if not already done so.
+	Move reading of insn into print_insn.
+
+end-sanitize-cygnus
 Thu Jul 30 21:41:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
 
 	* d30v-opc.c (d30v_opcode_table): Add new "LKR" flag to some

opcodes/cgen-opc.in

@@ -30,6 +30,14 @@ along with this program; if not, write to the Free Software Foundation, Inc.,
 #include "@prefix@-opc.h"
 #include "opintl.h"
 
+/* The hash functions are recorded here to help keep assembler code out of
+   the disassembler and vice versa.  */
+
+static int asm_hash_insn_p PARAMS ((const CGEN_INSN *));
+static unsigned int asm_hash_insn PARAMS ((const char *));
+static int dis_hash_insn_p PARAMS ((const CGEN_INSN *));
+static unsigned int dis_hash_insn PARAMS ((const char *, unsigned long));
+
 /* Look up instruction INSN_VALUE and extract its fields.
    INSN, if non-null, is the insn table entry.
    Otherwise INSN_VALUE is examined to compute it.
@@ -42,7 +50,8 @@ along with this program; if not, write to the Free Software Foundation, Inc.,
    wasn't recognized.  */
 
 const CGEN_INSN *
-@arch@_cgen_lookup_insn (insn, insn_value, length, fields, alias_p)
+@arch@_cgen_lookup_insn (od, insn, insn_value, length, fields, alias_p)
+     CGEN_OPCODE_DESC od;
      const CGEN_INSN *insn;
      cgen_insn_t insn_value;
      int length;
@@ -62,13 +71,13 @@ const CGEN_INSN *
 	  buf[0] = insn_value;
 	  break;
 	case 16:
-	  if (cgen_current_endian == CGEN_ENDIAN_BIG)
+	  if (CGEN_OPCODE_ENDIAN (od) == CGEN_ENDIAN_BIG)
 	    bfd_putb16 (insn_value, buf);
 	  else
 	    bfd_putl16 (insn_value, buf);
 	  break;
 	case 32:
-	  if (cgen_current_endian == CGEN_ENDIAN_BIG)
+	  if (CGEN_OPCODE_ENDIAN (od) == CGEN_ENDIAN_BIG)
 	    bfd_putb32 (insn_value, buf);
 	  else
 	    bfd_putl32 (insn_value, buf);
@@ -83,7 +92,7 @@ const CGEN_INSN *
       /* The instructions are stored in hash lists.
 	 Pick the first one and keep trying until we find the right one.  */
 
-      insn_list = CGEN_DIS_LOOKUP_INSN (buf, insn_value);
+      insn_list = CGEN_DIS_LOOKUP_INSN (od, buf, insn_value);
       while (insn_list != NULL)
 	{
 	  insn = insn_list->insn;
@@ -97,7 +106,7 @@ const CGEN_INSN *
 	      if ((insn_value & CGEN_INSN_MASK (insn)) == CGEN_INSN_VALUE (insn))
 		{
 		  /* ??? 0 is passed for `pc' */
-		  int elength = (*CGEN_EXTRACT_FN (insn)) (insn, NULL,
+		  int elength = (*CGEN_EXTRACT_FN (insn)) (od, insn, NULL,
 							   insn_value, fields,
 							   (bfd_vma) 0);
 		  if (elength > 0)
@@ -124,7 +133,7 @@ const CGEN_INSN *
 	abort ();
 
       /* ??? 0 is passed for `pc' */
-      length = (*CGEN_EXTRACT_FN (insn)) (insn, NULL, insn_value, fields,
+      length = (*CGEN_EXTRACT_FN (insn)) (od, insn, NULL, insn_value, fields,
 					  (bfd_vma) 0);
       /* Sanity check: must succeed.
 	 Could relax this later if it ever proves useful.  */
@@ -141,7 +150,8 @@ const CGEN_INSN *
    in.  */
 
 void
-@arch@_cgen_get_insn_operands (insn, fields, indices)
+@arch@_cgen_get_insn_operands (od, insn, fields, indices)
+     CGEN_OPCODE_DESC od;
      const CGEN_INSN * insn;
      const CGEN_FIELDS * fields;
      int *indices;
@@ -172,7 +182,8 @@ void
    recognized.  */
 
 const CGEN_INSN *
-@arch@_cgen_lookup_get_insn_operands (insn, insn_value, length, indices)
+@arch@_cgen_lookup_get_insn_operands (od, insn, insn_value, length, indices)
+     CGEN_OPCODE_DESC od;
      const CGEN_INSN *insn;
      cgen_insn_t insn_value;
      int length;
@@ -182,11 +193,11 @@ const CGEN_INSN *
 
   /* Pass non-zero for ALIAS_P only if INSN != NULL.
      If INSN == NULL, we want a real insn.  */
-  insn = @arch@_cgen_lookup_insn (insn, insn_value, length, &fields,
+  insn = @arch@_cgen_lookup_insn (od, insn, insn_value, length, &fields,
 				  insn != NULL);
   if (! insn)
     return NULL;
 
-  @arch@_cgen_get_insn_operands (insn, &fields, indices);
+  @arch@_cgen_get_insn_operands (od, insn, &fields, indices);
   return insn;
 }

opcodes/m32r-opc.h

@@ -226,7 +226,15 @@ typedef enum cgen_insn_type {
 /* start-sanitize-m32rx */
  , M32R_INSN_MACLO_A
 /* end-sanitize-m32rx */
- , M32R_INSN_MACWHI, M32R_INSN_MACWLO, M32R_INSN_MUL, M32R_INSN_MULHI
+ , M32R_INSN_MACWHI
+/* start-sanitize-m32rx */
+ , M32R_INSN_MACWHI_A
+/* end-sanitize-m32rx */
+ , M32R_INSN_MACWLO
+/* start-sanitize-m32rx */
+ , M32R_INSN_MACWLO_A
+/* end-sanitize-m32rx */
+ , M32R_INSN_MUL, M32R_INSN_MULHI
 /* start-sanitize-m32rx */
  , M32R_INSN_MULHI_A
 /* end-sanitize-m32rx */
@@ -234,7 +242,15 @@ typedef enum cgen_insn_type {
 /* start-sanitize-m32rx */
  , M32R_INSN_MULLO_A
 /* end-sanitize-m32rx */
- , M32R_INSN_MULWHI, M32R_INSN_MULWLO, M32R_INSN_MV, M32R_INSN_MVFACHI
+ , M32R_INSN_MULWHI
+/* start-sanitize-m32rx */
+ , M32R_INSN_MULWHI_A
+/* end-sanitize-m32rx */
+ , M32R_INSN_MULWLO
+/* start-sanitize-m32rx */
+ , M32R_INSN_MULWLO_A
+/* end-sanitize-m32rx */
+ , M32R_INSN_MV, M32R_INSN_MVFACHI
 /* start-sanitize-m32rx */
  , M32R_INSN_MVFACHI_A
 /* end-sanitize-m32rx */
@@ -387,16 +403,16 @@ extern CGEN_KEYWORD m32r_cgen_opval_h_cr;
 extern CGEN_KEYWORD m32r_cgen_opval_h_accums;
 /* end-sanitize-m32rx */
 
-#define CGEN_INIT_PARSE() \
+#define CGEN_INIT_PARSE(od) \
 {\
 }
-#define CGEN_INIT_INSERT() \
+#define CGEN_INIT_INSERT(od) \
 {\
 }
-#define CGEN_INIT_EXTRACT() \
+#define CGEN_INIT_EXTRACT(od) \
 {\
 }
-#define CGEN_INIT_PRINT() \
+#define CGEN_INIT_PRINT(od) \
 {\
 }