2006-03-16 Paul Brook <paul@codesourcery.com>

gas/
	* config/tc-arm.c (insns): Add "svc".
gas/testsuite/
	* gas/arm/svc.d: New test.
	* gas/arm/svc.s: New test.
	* gas/arm/inst.d: Accept svc mnemonic.
	* gas/arm/thumb.d: Ditto.
	* gas/arm/wince_inst.d: Ditto.
opcodes/
	* arm-dis.c (arm_opcodes): Rename swi to svc.
	(thumb_opcodes): Ditto.
This commit is contained in:
Paul Brook
2006-03-16 15:08:48 +00:00
parent 66eb6687c9
commit c16d2bf065
11 changed files with 56 additions and 9 deletions

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@ -1,3 +1,7 @@
2006-03-16 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (insns): Add "svc".
2006-03-13 Bob Wilson <bob.wilson@acm.org> 2006-03-13 Bob Wilson <bob.wilson@acm.org>
* config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar * config/tc-xtensa.c (xg_translate_sysreg_op): Remove has_underbar

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@ -8950,6 +8950,7 @@ static const struct asm_opcode insns[] =
tC3(ldmfd, 8900000, ldmia, 2, (RRw, REGLST), ldmstm, t_ldmstm), tC3(ldmfd, 8900000, ldmia, 2, (RRw, REGLST), ldmstm, t_ldmstm),
TCE(swi, f000000, df00, 1, (EXPi), swi, t_swi), TCE(swi, f000000, df00, 1, (EXPi), swi, t_swi),
TCE(svc, f000000, df00, 1, (EXPi), swi, t_swi),
tCE(b, a000000, b, 1, (EXPr), branch, t_branch), tCE(b, a000000, b, 1, (EXPr), branch, t_branch),
TCE(bl, b000000, f000f800, 1, (EXPr), bl, t_branch23), TCE(bl, b000000, f000f800, 1, (EXPr), bl, t_branch23),

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@ -1,3 +1,11 @@
2006-03-16 Paul Brook <paul@codesourcery.com>
* gas/arm/svc.d: New test.
* gas/arm/svc.s: New test.
* gas/arm/inst.d: Accept svc mnemonic.
* gas/arm/thumb.d: Ditto.
* gas/arm/wince_inst.d: Ditto.
2006-03-09 Paul Brook <paul@codesourcery.com> 2006-03-09 Paul Brook <paul@codesourcery.com>
* gas/arm/nomapping.d: New test. * gas/arm/nomapping.d: New test.

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@ -43,7 +43,7 @@ Disassembly of section .text:
0+84 <[^>]*> e1b00000 ? movs r0, r0 0+84 <[^>]*> e1b00000 ? movs r0, r0
0+88 <[^>]*> e1e00000 ? mvn r0, r0 0+88 <[^>]*> e1e00000 ? mvn r0, r0
0+8c <[^>]*> e1f00000 ? mvns r0, r0 0+8c <[^>]*> e1f00000 ? mvns r0, r0
0+90 <[^>]*> ef000000 ? swi 0x00000000 0+90 <[^>]*> ef000000 ? (swi|svc) 0x00000000
0+94 <[^>]*> e5900000 ? ldr r0, \[r0\] 0+94 <[^>]*> e5900000 ? ldr r0, \[r0\]
0+98 <[^>]*> e5d00000 ? ldrb r0, \[r0\] 0+98 <[^>]*> e5d00000 ? ldrb r0, \[r0\]
0+9c <[^>]*> e4b10000 ? ldrt r0, \[r1\] 0+9c <[^>]*> e4b10000 ? ldrt r0, \[r1\]

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@ -159,8 +159,8 @@ Disassembly of section .text:
0+24c <[^>]*> e9020018 ? stmdb r2, {r3, r4} 0+24c <[^>]*> e9020018 ? stmdb r2, {r3, r4}
0+250 <[^>]*> e8830003 ? stmia r3, {r0, r1} 0+250 <[^>]*> e8830003 ? stmia r3, {r0, r1}
0+254 <[^>]*> e9c40300 ? stmib r4, {r8, r9}\^ 0+254 <[^>]*> e9c40300 ? stmib r4, {r8, r9}\^
0+258 <[^>]*> ef123456 ? swi 0x00123456 0+258 <[^>]*> ef123456 ? (swi|svc) 0x00123456
0+25c <[^>]*> 2f000033 ? swics 0x00000033 0+25c <[^>]*> 2f000033 ? (swi|svc)cs 0x00000033
0+260 <[^>]*> eb...... ? bl 0[0123456789abcdef]+ <[^>]*> 0+260 <[^>]*> eb...... ? bl 0[0123456789abcdef]+ <[^>]*>
[ ]*260:.*_wombat.* [ ]*260:.*_wombat.*
0+264 <[^>]*> 5b...... ? blpl 0[0123456789abcdef]+ <[^>]*> 0+264 <[^>]*> 5b...... ? blpl 0[0123456789abcdef]+ <[^>]*>

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@ -0,0 +1,14 @@
# name: SWI/SVC instructions
# objdump: -dr --prefix-addresses --show-raw-insn
.*: +file format .*arm.*
Disassembly of section \.text:
0+000 <[^>]+> ef123456 (swi|svc) 0x00123456
0+004 <[^>]+> ef876543 (swi|svc) 0x00876543
0+008 <[^>]+> ef123456 (swi|svc) 0x00123456
0+00c <[^>]+> ef876543 (swi|svc) 0x00876543
0+010 <[^>]+> df5a (swi|svc) 90
0+012 <[^>]+> dfa5 (swi|svc) 165
0+014 <[^>]+> df5a (swi|svc) 90
0+016 <[^>]+> dfa5 (swi|svc) 165

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@ -0,0 +1,15 @@
.text
.arch armv4t
.syntax unified
foo:
swi 0x123456
swi 0x876543
svc 0x123456
svc 0x876543
.thumb
bar:
swi 0x5a
swi 0xa5
svc 0x5a
svc 0xa5

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@ -126,14 +126,14 @@ Disassembly of section \.text:
0+0ec <[^>]+> ebfffffc bl 0+0e4 <[^>]+> 0+0ec <[^>]+> ebfffffc bl 0+0e4 <[^>]+>
0+0f0 <[^>]+> eb00000f bl 0+134 <[^>]+> 0+0f0 <[^>]+> eb00000f bl 0+134 <[^>]+>
0+0f4 <[^>]+> e12fff10 bx r0 0+0f4 <[^>]+> e12fff10 bx r0
0+0f8 <[^>]+> ef123456 swi 0x00123456 0+0f8 <[^>]+> ef123456 (swi|svc) 0x00123456
0+0fc <[^>]+> a004 add r0, pc, #16 \(adr r0,0+110 <[^>]+>\) 0+0fc <[^>]+> a004 add r0, pc, #16 \(adr r0,0+110 <[^>]+>\)
0+0fe <[^>]+> e77f b.n 0+000 <[^>]+> 0+0fe <[^>]+> e77f b.n 0+000 <[^>]+>
0+100 <[^>]+> e018 b.n 0+134 <[^>]+> 0+100 <[^>]+> e018 b.n 0+134 <[^>]+>
0+102 <[^>]+> f7ff ff7d bl 0+000 <[^>]+> 0+102 <[^>]+> f7ff ff7d bl 0+000 <[^>]+>
0+106 <[^>]+> f000 f815 bl 0+134 <[^>]+> 0+106 <[^>]+> f000 f815 bl 0+134 <[^>]+>
0+10a <[^>]+> 4700 bx r0 0+10a <[^>]+> 4700 bx r0
0+10c <[^>]+> dfff swi 255 0+10c <[^>]+> dfff (swi|svc) 255
\.\.\. \.\.\.
0+110 <[^>]+> d010 beq.n 0+134 <[^>]+> 0+110 <[^>]+> d010 beq.n 0+134 <[^>]+>
0+112 <[^>]+> d10f bne.n 0+134 <[^>]+> 0+112 <[^>]+> d10f bne.n 0+134 <[^>]+>

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@ -161,8 +161,8 @@ Disassembly of section .text:
0+24c <[^>]*> e9020018 ? stmdb r2, {r3, r4} 0+24c <[^>]*> e9020018 ? stmdb r2, {r3, r4}
0+250 <[^>]*> e8830003 ? stmia r3, {r0, r1} 0+250 <[^>]*> e8830003 ? stmia r3, {r0, r1}
0+254 <[^>]*> e9c40300 ? stmib r4, {r8, r9}\^ 0+254 <[^>]*> e9c40300 ? stmib r4, {r8, r9}\^
0+258 <[^>]*> ef123456 ? swi 0x00123456 0+258 <[^>]*> ef123456 ? (swi|svc) 0x00123456
0+25c <[^>]*> 2f000033 ? swics 0x00000033 0+25c <[^>]*> 2f000033 ? (swi|svc)cs 0x00000033
0+260 <[^>]*> eb000000 ? bl 0+268 <[^>]*> 0+260 <[^>]*> eb000000 ? bl 0+268 <[^>]*>
[ ]*260:.*_wombat.* [ ]*260:.*_wombat.*
0+264 <[^>]*> 5b000000 ? blpl 0+26c <[^>]*> 0+264 <[^>]*> 5b000000 ? blpl 0+26c <[^>]*>

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@ -1,3 +1,8 @@
2006-03-16 Paul Brook <paul@codesourcery.com>
* arm-dis.c (arm_opcodes): Rename swi to svc.
(thumb_opcodes): Ditto.
2006-03-13 DJ Delorie <dj@redhat.com> 2006-03-13 DJ Delorie <dj@redhat.com>
* m32c-asm.c: Regenerate. * m32c-asm.c: Regenerate.

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@ -659,7 +659,7 @@ static const struct opcode32 arm_opcodes[] =
{ARM_EXT_V1, 0x08000000, 0x0e100000, "stm%c%23?id%24?ba\t%16-19r%21'!, %m%22'^"}, {ARM_EXT_V1, 0x08000000, 0x0e100000, "stm%c%23?id%24?ba\t%16-19r%21'!, %m%22'^"},
{ARM_EXT_V1, 0x08100000, 0x0e100000, "ldm%c%23?id%24?ba\t%16-19r%21'!, %m%22'^"}, {ARM_EXT_V1, 0x08100000, 0x0e100000, "ldm%c%23?id%24?ba\t%16-19r%21'!, %m%22'^"},
{ARM_EXT_V1, 0x0a000000, 0x0e000000, "b%24'l%c\t%b"}, {ARM_EXT_V1, 0x0a000000, 0x0e000000, "b%24'l%c\t%b"},
{ARM_EXT_V1, 0x0f000000, 0x0f000000, "swi%c\t%0-23x"}, {ARM_EXT_V1, 0x0f000000, 0x0f000000, "svc%c\t%0-23x"},
/* The rest. */ /* The rest. */
{ARM_EXT_V1, 0x00000000, 0x00000000, "undefined instruction %0-31x"}, {ARM_EXT_V1, 0x00000000, 0x00000000, "undefined instruction %0-31x"},
@ -798,7 +798,7 @@ static const struct opcode16 thumb_opcodes[] =
{ARM_EXT_V4T, 0xC000, 0xF800, "stmia\t%8-10r!, %M"}, {ARM_EXT_V4T, 0xC000, 0xF800, "stmia\t%8-10r!, %M"},
{ARM_EXT_V4T, 0xC800, 0xF800, "ldmia\t%8-10r!, %M"}, {ARM_EXT_V4T, 0xC800, 0xF800, "ldmia\t%8-10r!, %M"},
/* format 17 */ /* format 17 */
{ARM_EXT_V4T, 0xDF00, 0xFF00, "swi\t%0-7d"}, {ARM_EXT_V4T, 0xDF00, 0xFF00, "svc\t%0-7d"},
/* format 16 */ /* format 16 */
{ARM_EXT_V4T, 0xD000, 0xF000, "b%8-11c.n\t%0-7B"}, {ARM_EXT_V4T, 0xD000, 0xF000, "b%8-11c.n\t%0-7B"},
/* format 18 */ /* format 18 */