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Clean up F-unit assembly and tests.

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This commit is contained in:
Timothy Wall
2000-04-23 02:53:35 +00:00
parent aa170a07eb
commit bf3ca999c1
5 changed files with 37 additions and 13 deletions
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6
gas/ChangeLog
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@ -1,3 +1,9 @@
2000-04-22 Timothy Wall <twall@cygnus.com>
* config/tc-ia64.c (pseudo_func[]): Add new "nat" entry equivalent
to "natval".
(operand_match): Conditionally insert default bit values for IMMU9.
2000-04-14 Matthew Green <mrg@cygnus.com> 2000-04-14 Matthew Green <mrg@cygnus.com>
* configure.in: Add NetBSD/sparc ELF and NetBSD/sparc64 support. * configure.in: Add NetBSD/sparc ELF and NetBSD/sparc64 support.

17
gas/config/tc-ia64.c
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@ -448,7 +448,7 @@ pseudo_func[] =
{ "shuf", PSEUDO_FUNC_CONST, { 0x9 } }, { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
/* fclass constants: */ /* fclass constants: */
{ "natval", PSEUDO_FUNC_CONST, { 0x100 } }, { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
{ "qnan", PSEUDO_FUNC_CONST, { 0x080 } }, { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
{ "snan", PSEUDO_FUNC_CONST, { 0x040 } }, { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
{ "pos", PSEUDO_FUNC_CONST, { 0x001 } }, { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
@ -457,6 +457,8 @@ pseudo_func[] =
{ "unorm", PSEUDO_FUNC_CONST, { 0x008 } }, { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
{ "norm", PSEUDO_FUNC_CONST, { 0x010 } }, { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
{ "inf", PSEUDO_FUNC_CONST, { 0x020 } }, { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
{ "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
}; };
/* 41-bit nop opcodes (one per unit): */ /* 41-bit nop opcodes (one per unit): */
@ -3815,7 +3817,6 @@ operand_match (idesc, index, e)
case IA64_OPND_IMMU2: case IA64_OPND_IMMU2:
case IA64_OPND_IMMU7a: case IA64_OPND_IMMU7a:
case IA64_OPND_IMMU7b: case IA64_OPND_IMMU7b:
case IA64_OPND_IMMU9:
case IA64_OPND_IMMU21: case IA64_OPND_IMMU21:
case IA64_OPND_IMMU24: case IA64_OPND_IMMU24:
case IA64_OPND_MBTYPE4: case IA64_OPND_MBTYPE4:
@ -3827,6 +3828,18 @@ operand_match (idesc, index, e)
return 1; return 1;
break; break;
case IA64_OPND_IMMU9:
bits = operand_width (idesc->operands[index]);
if (e->X_op == O_constant
&& (bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
{
int lobits = e->X_add_number & 0x3;
if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
e->X_add_number |= (bfd_vma)0x3;
return 1;
}
break;
case IA64_OPND_IMM44: case IA64_OPND_IMM44:
/* least 16 bits must be zero */ /* least 16 bits must be zero */
if ((e->X_add_number & 0xffff) != 0) if ((e->X_add_number & 0xffff) != 0)

5
gas/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2000-04-22 Timothy Wall <twall@cygnus.com>
* gas/ia64/opc-f.d: Disassemble zeroes to verify break.f.
* gas/ia64/opc-f.s: Add an explicit stop to make IAS output match.
Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com> Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
David Mosberger <davidm@hpl.hp.com> David Mosberger <davidm@hpl.hp.com>
Timothy Wall <twall@cygnus.com> Timothy Wall <twall@cygnus.com>

20
gas/testsuite/gas/ia64/opc-f.d
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@ -1,4 +1,4 @@
# objdump: -d # objdump: -d --disassemble-zeroes
# name: ia64 opc-f # name: ia64 opc-f
.*: +file format .* .*: +file format .*
@ -469,16 +469,16 @@ Disassembly of section \.text:
996: 40 38 14 0c 76 00 xma\.hu f4=f5,f6,f7 996: 40 38 14 0c 76 00 xma\.hu f4=f5,f6,f7
99c: 00 00 04 00 nop\.i 0x0 99c: 00 00 04 00 nop\.i 0x0
9a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0 9a0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
9a6: 40 00 14 0c 74 00 xma\.l f4=f5,f6,f0 9a6: 40 00 14 0c 74 00 xmpy\.l f4=f5,f6
9ac: 00 00 04 00 nop\.i 0x0 9ac: 00 00 04 00 nop\.i 0x0
9b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0 9b0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
9b6: 40 00 14 0c 74 00 xma\.l f4=f5,f6,f0 9b6: 40 00 14 0c 74 00 xmpy\.l f4=f5,f6
9bc: 00 00 04 00 nop\.i 0x0 9bc: 00 00 04 00 nop\.i 0x0
9c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0 9c0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
9c6: 40 00 14 0c 77 00 xma\.h f4=f5,f6,f0 9c6: 40 00 14 0c 77 00 xmpy\.h f4=f5,f6
9cc: 00 00 04 00 nop\.i 0x0 9cc: 00 00 04 00 nop\.i 0x0
9d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0 9d0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
9d6: 40 00 14 0c 76 00 xma\.hu f4=f5,f6,f0 9d6: 40 00 14 0c 76 00 xmpy\.hu f4=f5,f6
9dc: 00 00 04 00 nop\.i 0x0 9dc: 00 00 04 00 nop\.i 0x0
9e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0 9e0: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
9e6: 40 38 14 0c 70 00 fselect f4=f5,f6,f7 9e6: 40 38 14 0c 70 00 fselect f4=f5,f6,f7
@ -1210,8 +1210,8 @@ Disassembly of section \.text:
1906: 00 e7 ff 10 07 00 fchkf\.s3 0 <_start> 1906: 00 e7 ff 10 07 00 fchkf\.s3 0 <_start>
190c: 00 00 04 00 nop\.i 0x0 190c: 00 00 04 00 nop\.i 0x0
1910: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0 1910: 0c 00 00 00 01 00 \[MFI\] nop\.m 0x0
\.\.\. 1916: 00 00 00 00 00 00 break\.f 0x0
191e: 04 00 0c 00 nop\.i 0x0 191c: 00 00 04 00 nop\.i 0x0
1922: 00 00 01 00 00 00 \[MFI\] nop\.m 0x0 1920: 0d 00 00 00 01 00 \[MFI\] nop\.m 0x0
1928: 00 02 00 00 00 00 nop\.f 0x0 1926: 00 00 00 02 00 00 nop\.f 0x0
192e: 04 00 00 00 nop\.i 0x0 192c: 00 00 04 00 nop\.i 0x0;;

2
gas/testsuite/gas/ia64/opc-f.s
View File

@ -477,5 +477,5 @@ _start:
fchkf.s3 _start fchkf.s3 _start
break.f 0 break.f 0
nop.f 0 nop.f 0;;