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[PowerPC] Consolidate linux target description selection
Share target description declarations and selection among ppc linux native targets, core files, gdbserver and IPA. To avoid complicated define guards, gdbserver and IPA now have declarations for all descriptions, including 64-bit generated descriptions when compiled in 32-bit mode. These have always been linked into the gdbserver and IPA binaries. Because they might be uninitialized, the selection function checks that the selected description is initialized. gdb/ChangeLog: 2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com> * arch/ppc-linux-common.c: New file. * arch/ppc-linux-common.h: New file. * arch/ppc-linux-tdesc.h: New file. * configure.tgt (powerpc*-*-linux*): Add arch/ppc-linux-common.o. * Makefile.in (ALL_TARGET_OBS): Add arch/ppc-linux-common.o. (HFILES_NO_SRCDIR): Add arch/ppc-linux-common.h and arch/ppc-linux-tdesc.h. * ppc-linux-nat.c: Include arch/ppc-linux-common.h and arch/ppc-linux-tdesc.h. (ppc_linux_nat_target::read_description): Remove target description matching code. Fill a ppc_linux_features struct and call ppc_linux_match_description with it. Move comment about ISA 2.05 to ppc-linux-common.c. * ppc-linux-tdep.c: Include arch/ppc-linux-common.h and arch/ppc-linux-tdesc.h. (ppc_linux_core_read_description): Remove target description matching code. Fill a ppc_linux_features struct and call ppc_linux_match_description with it. * ppc-linux-tdep.h (tdesc_powerpc_32l, tdesc_powerpc_64l) (tdesc_powerpc_altivec32l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell32l, tdesc_powerpc_cell64l) (tdesc_powerpc_vsx32l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_64l) (tdesc_powerpc_isa205_altivec32l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_isa205_vsx64l) (tdesc_powerpc_e500l): Remove. gdb/gdbserver/ChangeLog: 2018-05-22 Pedro Franco de Carvalho <pedromfc@linux.vnet.ibm.com> * configure.srv (srv_tgtobj): Add arch/ppc-linux-common.o. * Makefile.in (SFILES): Add arch/ppc-linux-common.c. * linux-ppc-tdesc.h: Rename to linux-ppc-tdesc-init.h. * linux-ppc-tdesc-init.h (tdesc_powerpc_32l, tdesc_powerpc_64l) (tdesc_powerpc_altivec32l, tdesc_powerpc_altivec64l) (tdesc_powerpc_cell32l, tdesc_powerpc_cell64l) (tdesc_powerpc_vsx32l, tdesc_powerpc_vsx64l) (tdesc_powerpc_isa205_32l, tdesc_powerpc_isa205_64l) (tdesc_powerpc_isa205_altivec32l, tdesc_powerpc_isa205_altivec64l) (tdesc_powerpc_isa205_vsx32l, tdesc_powerpc_isa205_vsx64l) (tdesc_powerpc_e500l): Remove. * linux-ppc-ipa.c: Include arch/ppc-linux-tdesc.h and linux-ppc-tdesc-init.h. Don't include linux-ppc-tdesc.h. * linux-ppc-low.c: Include arch/ppc-linux-common.h, arch/ppc-linux-tdesc.h, and linux-ppc-tdesc-init.h. Don't include linux-ppc-tdesc.h. (ppc_arch_setup): Remove target description matching code. Fill a ppc_linux_features struct and call ppc_linux_match_description with it.
This commit is contained in:
Pedro Franco de Carvalho
@ -45,6 +45,8 @@
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#include "elf/common.h"
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#include "auxv.h"
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#include "arch/ppc-linux-common.h"
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#include "arch/ppc-linux-tdesc.h"
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#include "nat/ppc-linux.h"
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/* Similarly for the hardware watchpoint support. These requests are used
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@ -2416,11 +2418,6 @@ ppc_linux_nat_target::auxv_parse (gdb_byte **readptr,
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const struct target_desc *
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ppc_linux_nat_target::read_description ()
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{
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int altivec = 0;
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int vsx = 0;
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int isa205 = 0;
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int cell = 0;
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int tid = ptid_get_lwp (inferior_ptid);
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if (tid == 0)
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tid = ptid_get_pid (inferior_ptid);
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@ -2438,13 +2435,19 @@ ppc_linux_nat_target::read_description ()
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perror_with_name (_("Unable to fetch SPE registers"));
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}
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struct ppc_linux_features features = ppc_linux_no_features;
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features.wordsize = ppc_linux_target_wordsize ();
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unsigned long hwcap = ppc_linux_get_hwcap ();
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if (have_ptrace_getsetvsxregs
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&& (ppc_linux_get_hwcap () & PPC_FEATURE_HAS_VSX))
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&& (hwcap & PPC_FEATURE_HAS_VSX))
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{
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gdb_vsxregset_t vsxregset;
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if (ptrace (PTRACE_GETVSXREGS, tid, 0, &vsxregset) >= 0)
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vsx = 1;
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features.vsx = true;
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/* EIO means that the PTRACE_GETVSXREGS request isn't supported.
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Anything else needs to be reported. */
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@ -2453,12 +2456,12 @@ ppc_linux_nat_target::read_description ()
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}
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if (have_ptrace_getvrregs
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&& (ppc_linux_get_hwcap () & PPC_FEATURE_HAS_ALTIVEC))
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&& (hwcap & PPC_FEATURE_HAS_ALTIVEC))
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{
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gdb_vrregset_t vrregset;
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if (ptrace (PTRACE_GETVRREGS, tid, 0, &vrregset) >= 0)
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altivec = 1;
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features.altivec = true;
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/* EIO means that the PTRACE_GETVRREGS request isn't supported.
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Anything else needs to be reported. */
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@ -2466,39 +2469,12 @@ ppc_linux_nat_target::read_description ()
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perror_with_name (_("Unable to fetch AltiVec registers"));
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}
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/* Power ISA 2.05 (implemented by Power 6 and newer processors) increases
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the FPSCR from 32 bits to 64 bits. Even though Power 7 supports this
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ISA version, it doesn't have PPC_FEATURE_ARCH_2_05 set, only
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PPC_FEATURE_ARCH_2_06. Since for now the only bits used in the higher
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half of the register are for Decimal Floating Point, we check if that
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feature is available to decide the size of the FPSCR. */
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if (ppc_linux_get_hwcap () & PPC_FEATURE_HAS_DFP)
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isa205 = 1;
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if (hwcap & PPC_FEATURE_CELL)
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features.cell = true;
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if (ppc_linux_get_hwcap () & PPC_FEATURE_CELL)
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cell = 1;
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features.isa205 = ppc_linux_has_isa205 (hwcap);
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if (ppc_linux_target_wordsize () == 8)
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{
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if (cell)
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return tdesc_powerpc_cell64l;
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else if (vsx)
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return isa205? tdesc_powerpc_isa205_vsx64l : tdesc_powerpc_vsx64l;
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else if (altivec)
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return isa205
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? tdesc_powerpc_isa205_altivec64l : tdesc_powerpc_altivec64l;
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return isa205? tdesc_powerpc_isa205_64l : tdesc_powerpc_64l;
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}
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if (cell)
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return tdesc_powerpc_cell32l;
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else if (vsx)
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return isa205? tdesc_powerpc_isa205_vsx32l : tdesc_powerpc_vsx32l;
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else if (altivec)
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return isa205? tdesc_powerpc_isa205_altivec32l : tdesc_powerpc_altivec32l;
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return isa205? tdesc_powerpc_isa205_32l : tdesc_powerpc_32l;
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return ppc_linux_match_description (features);
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}
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void
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