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opcodes/ChangeLog

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* cr16-dis.c (match_opcode,make_instruction: Remove static declaration.
	(dwordU,wordU): Moved typedefs to opcode/cr16.h
	(cr16_words,cr16_allWords,cr16_currInsn): Added prefix 'cr16_'

bfd/Changelog
	* config.bfd (cr16*-*-uclinux*): New target support.

include/opcode/ChangeLog
	* cr16.h (dwordU,wordU): Moved typedefs from cr16-dis.c
	(make_instruction,match_opcode): Added function prototypes.
	(cr16_words,cr16_allWords,cr16_currInsn): Declare as extern.
This commit is contained in:
Nick Clifton
2013-01-02 13:13:36 +00:00
parent 60c5dd9394
commit bab4becb12
8 changed files with 4641 additions and 4574 deletions
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bfd/config.bfd
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@ -1,6 +1,6 @@
# config.bfd # config.bfd
# #
# Copyright 2012 Free Software Foundation # Copyright 2012, 2013 Free Software Foundation
# #
# This file is free software; you can redistribute it and/or modify # This file is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by # it under the terms of the GNU General Public License as published by
@ -378,7 +378,7 @@ case "${targ}" in
targ_underscore=yes targ_underscore=yes
;; ;;
cr16-*-elf*) cr16-*-elf* | cr16*-*-uclinux*)
targ_defvec=bfd_elf32_cr16_vec targ_defvec=bfd_elf32_cr16_vec
targ_underscore=yes targ_underscore=yes
;; ;;

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include/opcode/ChangeLog
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@ -1,3 +1,9 @@
2013-01-02 Kaushik Phatak <kaushik.phatak@kpitcummins.com>
* cr16.h (dwordU,wordU): Moved typedefs from cr16-dis.c
(make_instruction,match_opcode): Added function prototypes.
(cr16_words,cr16_allWords,cr16_currInsn): Declare as extern.
2012-11-23 Alan Modra <amodra@gmail.com> 2012-11-23 Alan Modra <amodra@gmail.com>
* ppc.h (ppc_parse_cpu): Update prototype. * ppc.h (ppc_parse_cpu): Update prototype.

367
include/opcode/cr16.h
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@ -1,5 +1,5 @@
/* cr16.h -- Header file for CR16 opcode and register tables. /* cr16.h -- Header file for CR16 opcode and register tables.
Copyright 2007, 2008, 2010 Free Software Foundation, Inc. Copyright 2007, 2008, 2010, 2013 Free Software Foundation, Inc.
Contributed by M R Swami Reddy Contributed by M R Swami Reddy
This file is part of GAS, GDB and the GNU binutils. This file is part of GAS, GDB and the GNU binutils.
@ -26,21 +26,21 @@
Therefore, order MUST be preserved. */ Therefore, order MUST be preserved. */
typedef enum typedef enum
{ {
/* 16-bit general purpose registers. */ /* 16-bit general purpose registers. */
r0, r1, r2, r3, r0, r1, r2, r3,
r4, r5, r6, r7, r4, r5, r6, r7,
r8, r9, r10, r11, r8, r9, r10, r11,
r12_L = 12, r13_L = 13, ra = 14, sp_L = 15, r12_L = 12, r13_L = 13, ra = 14, sp_L = 15,
/* 32-bit general purpose registers. */ /* 32-bit general purpose registers. */
r12 = 12, r13 = 13, r14 = 14, r15 = 15, r12 = 12, r13 = 13, r14 = 14, r15 = 15,
era = 14, sp = 15, RA, era = 14, sp = 15, RA,
/* Not a register. */ /* Not a register. */
nullregister, nullregister,
MAX_REG MAX_REG
} }
reg; reg;
/* CR16 processor registers and special registers : /* CR16 processor registers and special registers :
@ -48,33 +48,33 @@ reg;
(cr16_pregtab). Therefore, order MUST be preserved. */ (cr16_pregtab). Therefore, order MUST be preserved. */
typedef enum typedef enum
{ {
/* processor registers. */ /* processor registers. */
dbs = MAX_REG, dbs = MAX_REG,
dsr, dcrl, dcrh, dsr, dcrl, dcrh,
car0l, car0h, car1l, car1h, car0l, car0h, car1l, car1h,
cfg, psr, intbasel, intbaseh, cfg, psr, intbasel, intbaseh,
ispl, isph, uspl, usph, ispl, isph, uspl, usph,
dcr = dcrl, dcr = dcrl,
car0 = car0l, car0 = car0l,
car1 = car1l, car1 = car1l,
intbase = intbasel, intbase = intbasel,
isp = ispl, isp = ispl,
usp = uspl, usp = uspl,
/* Not a processor register. */ /* Not a processor register. */
nullpregister = usph + 1, nullpregister = usph + 1,
MAX_PREG MAX_PREG
} }
preg; preg;
/* CR16 Register types. */ /* CR16 Register types. */
typedef enum typedef enum
{ {
CR16_R_REGTYPE, /* r<N> */ CR16_R_REGTYPE, /* r<N> */
CR16_RP_REGTYPE, /* reg pair */ CR16_RP_REGTYPE, /* reg pair */
CR16_P_REGTYPE /* Processor register */ CR16_P_REGTYPE /* Processor register */
} }
reg_type; reg_type;
/* CR16 argument types : /* CR16 argument types :
@ -89,69 +89,69 @@ reg_type;
idxrp - index with register pair idxrp - index with register pair
rbase - register base rbase - register base
rpbase - register pair base rpbase - register pair base
pr - processor register */ pr - processor register. */
typedef enum typedef enum
{ {
arg_r, arg_r,
arg_c, arg_c,
arg_cr, arg_cr,
arg_crp, arg_crp,
arg_ic, arg_ic,
arg_icr, arg_icr,
arg_idxr, arg_idxr,
arg_idxrp, arg_idxrp,
arg_rbase, arg_rbase,
arg_rpbase, arg_rpbase,
arg_rp, arg_rp,
arg_pr, arg_pr,
arg_prp, arg_prp,
arg_cc, arg_cc,
arg_ra, arg_ra,
/* Not an argument. */ /* Not an argument. */
nullargs nullargs
} }
argtype; argtype;
/* CR16 operand types:The operand types correspond to instructions operands.*/ /* CR16 operand types:The operand types correspond to instructions operands. */
typedef enum typedef enum
{ {
dummy, dummy,
/* N-bit signed immediate. */ /* N-bit signed immediate. */
imm3, imm4, imm5, imm6, imm16, imm20, imm32, imm3, imm4, imm5, imm6, imm16, imm20, imm32,
/* N-bit unsigned immediate. */ /* N-bit unsigned immediate. */
uimm3, uimm3_1, uimm4, uimm4_1, uimm5, uimm16, uimm20, uimm32, uimm3, uimm3_1, uimm4, uimm4_1, uimm5, uimm16, uimm20, uimm32,
/* N-bit signed displacement. */ /* N-bit signed displacement. */
disps5, disps17, disps25, disps5, disps17, disps25,
/* N-bit unsigned displacement. */ /* N-bit unsigned displacement. */
dispe9, dispe9,
/* N-bit absolute address. */ /* N-bit absolute address. */
abs20, abs24, abs20, abs24,
/* Register relative. */ /* Register relative. */
rra, rbase, rbase_disps20, rbase_dispe20, rra, rbase, rbase_disps20, rbase_dispe20,
/* Register pair relative. */ /* Register pair relative. */
rpbase_disps0, rpbase_dispe4, rpbase_disps4, rpbase_disps16, rpbase_disps0, rpbase_dispe4, rpbase_disps4, rpbase_disps16,
rpbase_disps20, rpbase_dispe20, rpbase_disps20, rpbase_dispe20,
/* Register index. */ /* Register index. */
rindex7_abs20, rindex8_abs20, rindex7_abs20, rindex8_abs20,
/* Register pair index. */ /* Register pair index. */
rpindex_disps0, rpindex_disps14, rpindex_disps20, rpindex_disps0, rpindex_disps14, rpindex_disps20,
/* register. */ /* register. */
regr, regr,
/* register pair. */ /* register pair. */
regp, regp,
/* processor register. */ /* processor register. */
pregr, pregr,
/* processor register 32 bit. */ /* processor register 32 bit. */
pregrp, pregrp,
/* condition code - 4 bit. */ /* condition code - 4 bit. */
cc, cc,
/* Not an operand. */ /* Not an operand. */
nulloperand, nulloperand,
/* Maximum supported operand. */ /* Maximum supported operand. */
MAX_OPRD MAX_OPRD
} }
operand_type; operand_type;
/* CR16 instruction types. */ /* CR16 instruction types. */
@ -239,126 +239,126 @@ operand_type;
/* Single operand description. */ /* Single operand description. */
typedef struct typedef struct
{ {
/* Operand type. */ /* Operand type. */
operand_type op_type; operand_type op_type;
/* Operand location within the opcode. */ /* Operand location within the opcode. */
unsigned int shift; unsigned int shift;
} }
operand_desc; operand_desc;
/* Instruction data structure used in instruction table. */ /* Instruction data structure used in instruction table. */
typedef struct typedef struct
{ {
/* Name. */ /* Name. */
const char *mnemonic; const char *mnemonic;
/* Size (in words). */ /* Size (in words). */
unsigned int size; unsigned int size;
/* Constant prefix (matched by the disassembler). */ /* Constant prefix (matched by the disassembler). */
unsigned long match; /* ie opcode */ unsigned long match; /* ie opcode */
/* Match size (in bits). */ /* Match size (in bits). */
/* MASK: if( (i & match_bits) == match ) then match */ /* MASK: if( (i & match_bits) == match ) then match */
int match_bits; int match_bits;
/* Attributes. */ /* Attributes. */
unsigned int flags; unsigned int flags;
/* Operands (always last, so unreferenced operands are initialized). */ /* Operands (always last, so unreferenced operands are initialized). */
operand_desc operands[MAX_OPERANDS]; operand_desc operands[MAX_OPERANDS];
} }
inst; inst;
/* Data structure for a single instruction's arguments (Operands). */ /* Data structure for a single instruction's arguments (Operands). */
typedef struct typedef struct
{ {
/* Register or base register. */ /* Register or base register. */
reg r; reg r;
/* Register pair register. */ /* Register pair register. */
reg rp; reg rp;
/* Index register. */ /* Index register. */
reg i_r; reg i_r;
/* Processor register. */ /* Processor register. */
preg pr; preg pr;
/* Processor register. 32 bit */ /* Processor register. 32 bit */
preg prp; preg prp;
/* Constant/immediate/absolute value. */ /* Constant/immediate/absolute value. */
long constant; long constant;
/* CC code. */ /* CC code. */
unsigned int cc; unsigned int cc;
/* Scaled index mode. */ /* Scaled index mode. */
unsigned int scale; unsigned int scale;
/* Argument type. */ /* Argument type. */
argtype type; argtype type;
/* Size of the argument (in bits) required to represent. */ /* Size of the argument (in bits) required to represent. */
int size; int size;
/* The type of the expression. */ /* The type of the expression. */
unsigned char X_op; unsigned char X_op;
} }
argument; argument;
/* Internal structure to hold the various entities /* Internal structure to hold the various entities
corresponding to the current assembling instruction. */ corresponding to the current assembling instruction. */
typedef struct typedef struct
{ {
/* Number of arguments. */ /* Number of arguments. */
int nargs; int nargs;
/* The argument data structure for storing args (operands). */ /* The argument data structure for storing args (operands). */
argument arg[MAX_OPERANDS]; argument arg[MAX_OPERANDS];
/* The following fields are required only by CR16-assembler. */ /* The following fields are required only by CR16-assembler. */
#ifdef TC_CR16 #ifdef TC_CR16
/* Expression used for setting the fixups (if any). */ /* Expression used for setting the fixups (if any). */
expressionS exp; expressionS exp;
bfd_reloc_code_real_type rtype; bfd_reloc_code_real_type rtype;
#endif /* TC_CR16 */ #endif /* TC_CR16 */
/* Instruction size (in bytes). */ /* Instruction size (in bytes). */
int size; int size;
} }
ins; ins;
/* Structure to hold information about predefined operands. */ /* Structure to hold information about predefined operands. */
typedef struct typedef struct
{ {
/* Size (in bits). */ /* Size (in bits). */
unsigned int bit_size; unsigned int bit_size;
/* Argument type. */ /* Argument type. */
argtype arg_type; argtype arg_type;
/* One bit syntax flags. */ /* One bit syntax flags. */
int flags; int flags;
} }
operand_entry; operand_entry;
/* Structure to hold trap handler information. */ /* Structure to hold trap handler information. */
typedef struct typedef struct
{ {
/* Trap name. */ /* Trap name. */
char *name; char *name;
/* Index in dispatch table. */ /* Index in dispatch table. */
unsigned int entry; unsigned int entry;
} }
trap_entry; trap_entry;
/* Structure to hold information about predefined registers. */ /* Structure to hold information about predefined registers. */
typedef struct typedef struct
{
/* Name (string representation). */
char *name;
/* Value (enum representation). */
union
{ {
/* Name (string representation). */ /* Register. */
char *name; reg reg_val;
/* Value (enum representation). */ /* processor register. */
union preg preg_val;
{ } value;
/* Register. */ /* Register image. */
reg reg_val; int image;
/* processor register. */ /* Register type. */
preg preg_val; reg_type type;
} value; }
/* Register image. */
int image;
/* Register type. */
reg_type type;
}
reg_entry; reg_entry;
/* CR16 opcode table. */ /* CR16 opcode table. */
@ -435,4 +435,17 @@ extern const inst *instruction;
typedef long long int LONGLONG; typedef long long int LONGLONG;
typedef unsigned long long ULONGLONG; typedef unsigned long long ULONGLONG;
/* Data types for opcode handling. */
typedef unsigned long dwordU;
typedef unsigned short wordU;
/* Globals to store opcode data and build the instruction. */
extern wordU cr16_words[3];
extern ULONGLONG cr16_allWords;
extern ins cr16_currInsn;
/* Prototypes for function in cr16-dis.c. */
extern void make_instruction (void);
extern int match_opcode (void);
#endif /* _CR16_H_ */ #endif /* _CR16_H_ */

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opcodes/cr16-dis.c
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@ -1,5 +1,5 @@
/* Disassembler code for CR16. /* Disassembler code for CR16.
Copyright 2007, 2008, 2009, 2012 Free Software Foundation, Inc. Copyright 2007, 2008, 2009, 2012, 2013 Free Software Foundation, Inc.
Contributed by M R Swami Reddy (MR.Swami.Reddy@nsc.com). Contributed by M R Swami Reddy (MR.Swami.Reddy@nsc.com).
This file is part of GAS, GDB and the GNU binutils. This file is part of GAS, GDB and the GNU binutils.
@ -36,9 +36,6 @@
/* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */ /* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */
#define SBM(offs) ((((1 << (32 - offs)) -1) << (offs))) #define SBM(offs) ((((1 << (32 - offs)) -1) << (offs)))
typedef unsigned long dwordU;
typedef unsigned short wordU;
typedef struct typedef struct
{ {
dwordU val; dwordU val;
@ -83,11 +80,11 @@ REG_ARG_TYPE;
/* Current opcode table entry we're disassembling. */ /* Current opcode table entry we're disassembling. */
const inst *instruction; const inst *instruction;
/* Current instruction we're disassembling. */ /* Current instruction we're disassembling. */
ins currInsn; ins cr16_currInsn;
/* The current instruction is read into 3 consecutive words. */ /* The current instruction is read into 3 consecutive words. */
wordU words[3]; wordU cr16_words[3];
/* Contains all words in appropriate order. */ /* Contains all words in appropriate order. */
ULONGLONG allWords; ULONGLONG cr16_allWords;
/* Holds the current processed argument number. */ /* Holds the current processed argument number. */
int processing_argument_number; int processing_argument_number;
/* Nonzero means a IMM4 instruction. */ /* Nonzero means a IMM4 instruction. */
@ -281,7 +278,7 @@ getprocpregname (int reg_index)
return "ILLEGAL REGISTER"; return "ILLEGAL REGISTER";
} }
/* START and END are relating 'allWords' struct, which is 48 bits size. /* START and END are relating 'cr16_allWords' struct, which is 48 bits size.
START|--------|END START|--------|END
+---------+---------+---------+---------+ +---------+---------+---------+---------+
@ -317,12 +314,13 @@ build_mask (void)
/* Search for a matching opcode. Return 1 for success, 0 for failure. */ /* Search for a matching opcode. Return 1 for success, 0 for failure. */
static int int
match_opcode (void) match_opcode (void)
{ {
unsigned long mask; unsigned long mask;
/* The instruction 'constant' opcode doewsn't exceed 32 bits. */ /* The instruction 'constant' opcode doewsn't exceed 32 bits. */
unsigned long doubleWord = (words[1] + (words[0] << 16)) & 0xffffffff; unsigned long doubleWord = (cr16_words[1]
+ (cr16_words[0] << 16)) & 0xffffffff;
/* Start searching from end of instruction table. */ /* Start searching from end of instruction table. */
instruction = &cr16_instruction[NUMOPCODES - 2]; instruction = &cr16_instruction[NUMOPCODES - 2];
@ -360,38 +358,44 @@ make_argument (argument * a, int start_bits)
switch (a->type) switch (a->type)
{ {
case arg_r: case arg_r:
p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size), p = makelongparameter (cr16_allWords,
inst_bit_size - start_bits); inst_bit_size - (start_bits + a->size),
inst_bit_size - start_bits);
a->r = p.val; a->r = p.val;
break; break;
case arg_rp: case arg_rp:
p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size), p = makelongparameter (cr16_allWords,
inst_bit_size - start_bits); inst_bit_size - (start_bits + a->size),
inst_bit_size - start_bits);
a->rp = p.val; a->rp = p.val;
break; break;
case arg_pr: case arg_pr:
p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size), p = makelongparameter (cr16_allWords,
inst_bit_size - start_bits); inst_bit_size - (start_bits + a->size),
inst_bit_size - start_bits);
a->pr = p.val; a->pr = p.val;
break; break;
case arg_prp: case arg_prp:
p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size), p = makelongparameter (cr16_allWords,
inst_bit_size - start_bits); inst_bit_size - (start_bits + a->size),
inst_bit_size - start_bits);
a->prp = p.val; a->prp = p.val;
break; break;
case arg_ic: case arg_ic:
p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size), p = makelongparameter (cr16_allWords,
inst_bit_size - start_bits); inst_bit_size - (start_bits + a->size),
inst_bit_size - start_bits);
a->constant = p.val; a->constant = p.val;
break; break;
case arg_cc: case arg_cc:
p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size), p = makelongparameter (cr16_allWords,
inst_bit_size - start_bits); inst_bit_size - (start_bits + a->size),
inst_bit_size - start_bits);
a->cc = p.val; a->cc = p.val;
break; break;
@ -400,28 +404,30 @@ make_argument (argument * a, int start_bits)
if ((IS_INSN_MNEMONIC ("cbitb")) if ((IS_INSN_MNEMONIC ("cbitb"))
|| (IS_INSN_MNEMONIC ("sbitb")) || (IS_INSN_MNEMONIC ("sbitb"))
|| (IS_INSN_MNEMONIC ("tbitb"))) || (IS_INSN_MNEMONIC ("tbitb")))
p = makelongparameter (allWords, 8, 9); p = makelongparameter (cr16_allWords, 8, 9);
else else
p = makelongparameter (allWords, 9, 10); p = makelongparameter (cr16_allWords, 9, 10);
a->i_r = p.val; a->i_r = p.val;
p = makelongparameter (allWords, inst_bit_size - a->size, inst_bit_size); p = makelongparameter (cr16_allWords,
inst_bit_size - a->size, inst_bit_size);
a->constant = p.val; a->constant = p.val;
break; break;
case arg_idxrp: case arg_idxrp:
p = makelongparameter (allWords, start_bits + 12, start_bits + 13); p = makelongparameter (cr16_allWords, start_bits + 12, start_bits + 13);
a->i_r = p.val; a->i_r = p.val;
p = makelongparameter (allWords, start_bits + 13, start_bits + 16); p = makelongparameter (cr16_allWords, start_bits + 13, start_bits + 16);
a->rp = p.val; a->rp = p.val;
if (inst_bit_size > 32) if (inst_bit_size > 32)
{ {
p = makelongparameter (allWords, inst_bit_size - start_bits - 12, p = makelongparameter (cr16_allWords, inst_bit_size - start_bits - 12,
inst_bit_size); inst_bit_size);
a->constant = ((p.val & 0xffff) | (p.val >> 8 & 0xf0000)); a->constant = ((p.val & 0xffff) | (p.val >> 8 & 0xf0000));
} }
else if (instruction->size == 2) else if (instruction->size == 2)
{ {
p = makelongparameter (allWords, inst_bit_size - 22, inst_bit_size); p = makelongparameter (cr16_allWords, inst_bit_size - 22,
inst_bit_size);
a->constant = (p.val & 0xf) | (((p.val >>20) & 0x3) << 4) a->constant = (p.val & 0xf) | (((p.val >>20) & 0x3) << 4)
| ((p.val >>14 & 0x3) << 6) | (((p.val >>7) & 0x1f) <<7); | ((p.val >>14 & 0x3) << 6) | (((p.val >>7) & 0x1f) <<7);
} }
@ -431,41 +437,42 @@ make_argument (argument * a, int start_bits)
break; break;
case arg_rbase: case arg_rbase:
p = makelongparameter (allWords, inst_bit_size, inst_bit_size); p = makelongparameter (cr16_allWords, inst_bit_size, inst_bit_size);
a->constant = p.val; a->constant = p.val;
p = makelongparameter (allWords, inst_bit_size - (start_bits + 4), p = makelongparameter (cr16_allWords, inst_bit_size - (start_bits + 4),
inst_bit_size - start_bits); inst_bit_size - start_bits);
a->r = p.val; a->r = p.val;
break; break;
case arg_cr: case arg_cr:
p = makelongparameter (allWords, start_bits + 12, start_bits + 16); p = makelongparameter (cr16_allWords, start_bits + 12, start_bits + 16);
a->r = p.val; a->r = p.val;
p = makelongparameter (allWords, inst_bit_size - 16, inst_bit_size); p = makelongparameter (cr16_allWords, inst_bit_size - 16, inst_bit_size);
a->constant = p.val; a->constant = p.val;
break; break;
case arg_crp: case arg_crp:
if (instruction->size == 1) if (instruction->size == 1)
p = makelongparameter (allWords, 12, 16); p = makelongparameter (cr16_allWords, 12, 16);
else else
p = makelongparameter (allWords, start_bits + 12, start_bits + 16); p = makelongparameter (cr16_allWords, start_bits + 12, start_bits + 16);
a->rp = p.val; a->rp = p.val;
if (inst_bit_size > 32) if (inst_bit_size > 32)
{ {
p = makelongparameter (allWords, inst_bit_size - start_bits - 12, p = makelongparameter (cr16_allWords, inst_bit_size - start_bits - 12,
inst_bit_size); inst_bit_size);
a->constant = ((p.val & 0xffff) | (p.val >> 8 & 0xf0000)); a->constant = ((p.val & 0xffff) | (p.val >> 8 & 0xf0000));
} }
else if (instruction->size == 2) else if (instruction->size == 2)
{ {
p = makelongparameter (allWords, inst_bit_size - 16, inst_bit_size); p = makelongparameter (cr16_allWords, inst_bit_size - 16,
inst_bit_size);
a->constant = p.val; a->constant = p.val;
} }
else if (instruction->size == 1 && a->size != 0) else if (instruction->size == 1 && a->size != 0)
{ {
p = makelongparameter (allWords, 4, 8); p = makelongparameter (cr16_allWords, 4, 8);
if (IS_INSN_MNEMONIC ("loadw") if (IS_INSN_MNEMONIC ("loadw")
|| IS_INSN_MNEMONIC ("loadd") || IS_INSN_MNEMONIC ("loadd")
|| IS_INSN_MNEMONIC ("storw") || IS_INSN_MNEMONIC ("storw")
@ -489,36 +496,37 @@ make_argument (argument * a, int start_bits)
switch (a->size) switch (a->size)
{ {
case 8 : case 8 :
p = makelongparameter (allWords, 0, start_bits); p = makelongparameter (cr16_allWords, 0, start_bits);
a->constant = ((((p.val&0xf00)>>4)) | (p.val&0xf)); a->constant = ((((p.val&0xf00)>>4)) | (p.val&0xf));
break; break;
case 24: case 24:
if (instruction->size == 3) if (instruction->size == 3)
{ {
p = makelongparameter (allWords, 16, inst_bit_size); p = makelongparameter (cr16_allWords, 16, inst_bit_size);
a->constant = ((((p.val>>16)&0xf) << 20) a->constant = ((((p.val>>16)&0xf) << 20)
| (((p.val>>24)&0xf) << 16) | (((p.val>>24)&0xf) << 16)
| (p.val & 0xffff)); | (p.val & 0xffff));
} }
else if (instruction->size == 2) else if (instruction->size == 2)
{ {
p = makelongparameter (allWords, 8, inst_bit_size); p = makelongparameter (cr16_allWords, 8, inst_bit_size);
a->constant = p.val; a->constant = p.val;
} }
break; break;
default: default:
p = makelongparameter (allWords, inst_bit_size - (start_bits + p = makelongparameter (cr16_allWords,
a->size), inst_bit_size - start_bits); inst_bit_size - (start_bits + a->size),
inst_bit_size - start_bits);
a->constant = p.val; a->constant = p.val;
break; break;
} }
} }
else else
{ {
p = makelongparameter (allWords, inst_bit_size - p = makelongparameter (cr16_allWords,
(start_bits + a->size), inst_bit_size - (start_bits + a->size),
inst_bit_size - start_bits); inst_bit_size - start_bits);
a->constant = p.val; a->constant = p.val;
} }
@ -734,13 +742,13 @@ print_arguments (ins *currentInsn, bfd_vma memaddr, struct disassemble_info *inf
/* Build the instruction's arguments. */ /* Build the instruction's arguments. */
static void void
make_instruction (void) make_instruction (void)
{ {
int i; int i;
unsigned int shift; unsigned int shift;
for (i = 0; i < currInsn.nargs; i++) for (i = 0; i < cr16_currInsn.nargs; i++)
{ {
argument a; argument a;
@ -750,13 +758,13 @@ make_instruction (void)
shift = instruction->operands[i].shift; shift = instruction->operands[i].shift;
make_argument (&a, shift); make_argument (&a, shift);
currInsn.arg[i] = a; cr16_currInsn.arg[i] = a;
} }
/* Calculate instruction size (in bytes). */ /* Calculate instruction size (in bytes). */
currInsn.size = instruction->size + (size_changed ? 1 : 0); cr16_currInsn.size = instruction->size + (size_changed ? 1 : 0);
/* Now in bits. */ /* Now in bits. */
currInsn.size *= 2; cr16_currInsn.size *= 2;
} }
/* Retrieve a single word from a given memory address. */ /* Retrieve a single word from a given memory address. */
@ -785,10 +793,10 @@ get_words_at_PC (bfd_vma memaddr, struct disassemble_info *info)
bfd_vma mem; bfd_vma mem;
for (i = 0, mem = memaddr; i < 3; i++, mem += 2) for (i = 0, mem = memaddr; i < 3; i++, mem += 2)
words[i] = get_word_at_PC (mem, info); cr16_words[i] = get_word_at_PC (mem, info);
allWords = cr16_allWords = ((ULONGLONG) cr16_words[0] << 32)
((ULONGLONG) words[0] << 32) + ((unsigned long) words[1] << 16) + words[2]; + ((unsigned long) cr16_words[1] << 16) + cr16_words[2];
} }
/* Prints the instruction by calling print_arguments after proper matching. */ /* Prints the instruction by calling print_arguments after proper matching. */
@ -807,22 +815,22 @@ print_insn_cr16 (bfd_vma memaddr, struct disassemble_info *info)
/* Find a matching opcode in table. */ /* Find a matching opcode in table. */
is_decoded = match_opcode (); is_decoded = match_opcode ();
/* If found, print the instruction's mnemonic and arguments. */ /* If found, print the instruction's mnemonic and arguments. */
if (is_decoded > 0 && (words[0] << 16 || words[1]) != 0) if (is_decoded > 0 && (cr16_words[0] << 16 || cr16_words[1]) != 0)
{ {
if (strneq (instruction->mnemonic, "cinv", 4)) if (strneq (instruction->mnemonic, "cinv", 4))
info->fprintf_func (info->stream,"%s", getcinvstring (instruction->mnemonic)); info->fprintf_func (info->stream,"%s", getcinvstring (instruction->mnemonic));
else else
info->fprintf_func (info->stream, "%s", instruction->mnemonic); info->fprintf_func (info->stream, "%s", instruction->mnemonic);
if (((currInsn.nargs = get_number_of_operands ()) != 0) if (((cr16_currInsn.nargs = get_number_of_operands ()) != 0)
&& ! (IS_INSN_MNEMONIC ("b"))) && ! (IS_INSN_MNEMONIC ("b")))
info->fprintf_func (info->stream, "\t"); info->fprintf_func (info->stream, "\t");
make_instruction (); make_instruction ();
/* For push/pop/pushrtn with RA instructions. */ /* For push/pop/pushrtn with RA instructions. */
if ((INST_HAS_REG_LIST) && ((words[0] >> 7) & 0x1)) if ((INST_HAS_REG_LIST) && ((cr16_words[0] >> 7) & 0x1))
currInsn.nargs +=1; cr16_currInsn.nargs +=1;
print_arguments (&currInsn, memaddr, info); print_arguments (&cr16_currInsn, memaddr, info);
return currInsn.size; return cr16_currInsn.size;
} }
/* No match found. */ /* No match found. */