Superficial editing pass over Z8000 stuff.

This commit is contained in:
Roland Pesch
1992-11-24 05:21:14 +00:00
parent bac89d6ca8
commit ba487f3ad2
2 changed files with 776 additions and 744 deletions

View File

@ -23,7 +23,7 @@ END-INFO-DIR-ENTRY
@ifinfo @ifinfo
This file documents the GNU Assembler "as". This file documents the GNU Assembler "as".
Copyright (C) 1991 Free Software Foundation, Inc. Copyright (C) 1991, 1992 Free Software Foundation, Inc.
Permission is granted to make and distribute verbatim copies of Permission is granted to make and distribute verbatim copies of
this manual provided the copyright notice and this permission notice this manual provided the copyright notice and this permission notice
@ -84,7 +84,7 @@ done.
@end tex @end tex
@vskip 0pt plus 1filll @vskip 0pt plus 1filll
Copyright @copyright{} 1991 Free Software Foundation, Inc. Copyright @copyright{} 1991, 1992 Free Software Foundation, Inc.
Permission is granted to make and distribute verbatim copies of Permission is granted to make and distribute verbatim copies of
this manual provided the copyright notice and this permission notice this manual provided the copyright notice and this permission notice
@ -697,8 +697,8 @@ is considered a comment and is ignored. The line comment character is
@samp{|} on the 680x0; @samp{|} on the 680x0;
@samp{;} for the AMD 29K family; @samp{;} for the AMD 29K family;
@samp{;} for the machine specific family; @samp{;} for the machine specific family;
@samp{!} for the Z8000. @samp{!} for the Z8000;
@pxref{Machine Dependent}. @refill see @ref{Machine Dependent}. @refill
@c FIXME: fill in SPARC line comment char @c FIXME: fill in SPARC line comment char
On some machines there are two different line comment characters. One On some machines there are two different line comment characters. One
@ -4626,35 +4626,42 @@ Z8000 family.
@cindex line separator, Z8000 @cindex line separator, Z8000
@cindex statement separator, Z8000 @cindex statement separator, Z8000
@cindex Z8000 line separator @cindex Z8000 line separator
@samp{;} can be used instead of a newline to separate statements. You can use @samp{;} instead of a newline to separate statements.
@node Z8000-Regs @node Z8000-Regs
@subsubsection Register Names @subsubsection Register Names
@cindex Z8000 registers @cindex Z8000 registers
@cindex registers, Z8000 @cindex registers, Z8000
The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer to different The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer
sized groups of registers with the prefix @samp{r} for 16 bit registers, @samp{rr} to different sized groups of registers by register number, with the
for 32 bit registers and @samp{rq} for 64 bit registers. The first eight of the sixteen prefix @samp{r} for 16 bit registers, @samp{rr} for 32 bit registers and
16 bit registers may also be accessed by bytes. They are named @samp{r@var{n}h} and @samp{r@var{n}l}. @samp{rq} for 64 bit registers. You can also refer to the contents of
@example the first eight (of the sixteen 16 bit registers) by bytes. They are
byte registers named @samp{r@var{n}h} and @samp{r@var{n}l}.
r0l r0h r1h r1l r2h r2l r3h r3l r4h r4l r5h r5l r6h r6l r7h r7l
word registers @smallexample
@exdent @emph{byte registers}
r0l r0h r1h r1l r2h r2l r3h r3l
r4h r4l r5h r5l r6h r6l r7h r7l
@exdent @emph{word registers}
r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
long word registers @exdent @emph{long word registers}
rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14 rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
quad word registers @exdent @emph{quad word registers}
rq0 rq4 rq8 rq12 rq0 rq4 rq8 rq12
@end example @end smallexample
@node Z8000-Addressing @node Z8000-Addressing
@subsubsection Addressing Modes @subsubsection Addressing Modes
@cindex addressing modes, Z8000 @cindex addressing modes, Z8000
@cindex Z800 addressing modes @cindex Z800 addressing modes
as understands the following addressing modes for the Z8000: as understands the following addressing modes for the Z8000:
@table @code @table @code
@item r@var{n} @item r@var{n}
Register direct Register direct
@ -4662,7 +4669,7 @@ Register direct
@item @@r@var{n} @item @@r@var{n}
Indirect register Indirect register
@item @var{address} @item @var{addr}
Direct: the 16/24 bit address of the operand is in the instruction. Direct: the 16/24 bit address of the operand is in the instruction.
@item address(r@var{n}) @item address(r@var{n})
@ -4670,11 +4677,14 @@ Indexed: the 16/24 bit address is added to the 16 bit register to produce
the final address in memory of the operand. the final address in memory of the operand.
@item r@var{n}(#@var{imm}) @item r@var{n}(#@var{imm})
Base Address: the 16/24 bit register is added to the 16 bit sign extended immediate displacement to produce the final address in memory of the operand. Base Address: the 16/24 bit register is added to the 16 bit sign
extended immediate displacement to produce the final address in memory
of the operand.
@item r@var{n}(r@var{m}) @item r@var{n}(r@var{m})
Base Index: the 16/24 bit register r@var{n} is added to the sign extended Base Index: the 16/24 bit register r@var{n} is added to the sign
16 bit index register r@var{m} to produce the final address in memory of the operand. extended 16 bit index register r@var{m} to produce the final address in
memory of the operand.
@item #@var{xx} @item #@var{xx}
Immediate data @var{xx}. Immediate data @var{xx}.
@ -4689,56 +4699,64 @@ Immediate data @var{xx}.
For detailed information on the Z8000 machine instruction set, see For detailed information on the Z8000 machine instruction set, see
@cite{Z8000 Technical Manual}. @cite{Z8000 Technical Manual}.
@cindex Z8000 pseudo ops @cindex Z8000 directives
The Z8000 port of as includes these additional assembler directives,
for compatibility with other Z8000 assemblers:
The Z8000 port of gas provides a superficial resemblance to YASM, and
provides these YASM compatible pseudo ops:
@table @code @table @code
@item segm @item segm
@cindex segm @cindex segm
Generates code for the segmented Z8001. Generates code for the segmented Z8001.
@item unsegm @item unsegm
Generates code for the unsegmented Z8002. Generates code for the unsegmented Z8002.
@item name @item name
Synonym for @code{.file} Synonym for @code{.file}
@item global @item global
Synonum for @code{.global} Synonum for @code{.global}
@item wval @item wval
Synonym for .word Synonym for .word
@item lval @item lval
Synonym for .long Synonym for .long
@item bval @item bval
Synonym for .byte Synonym for .byte
@item sval @item sval
Assemble a string. Assemble a string. @code{sval} expects one string literal, delimited by
@code{sval} expects one string literal, delimited by single quotes. It assembles each byte of the string into consecutive addresses. Single quote single quotes. It assembles each byte of the string into consecutive
and other non-representable characters may be descrbed by escaping them addresses. You can use the escape sequence @samp{%@var{xx}} (where
with a percent sign and their ascii value as a two digit hex number. @var{xx} represents a two-digit hexadecimal number) to represent the
character whose @sc{ascii} value is @var{xx}. Use this feature to
describe single quote and other characters that may not appear in string
literals as themselves. For example, the C statement @w{@samp{char *a =
"he said \"it's 50% off\"";}} is represented in Z8000 assembly language
as
@example @smallexample
char *a = "he said \"it's 50% off\""; sval 'he said %22it%27s 50%25 off%22%00'
@end smallexample
0000 68652073 sval 'he said %22it%27s 50%25 off%22%00'
61696420
22697427
73203530
25206F66
662200
@end example
@item rsect @item rsect
synonym for @code{.section} synonym for @code{.section}
@item block @item block
synonym for @code{.space} synonym for @code{.space}
@item even @item even
synonym for @code{.align 1} synonym for @code{.align 1}
@end table @end table
The following table summarizes the opcodes and their arguments: The following table summarizes the opcodes and their arguments:
@c kluge due to lack of group outside example @iftex
@page @begingroup
@let@nonarrowing=@comment
@end iftex
@smallexample @smallexample
@group
rs @r{16 bit source register} rs @r{16 bit source register}
rd @r{16 bit destination register} rd @r{16 bit destination register}
@ -4798,8 +4816,6 @@ clr addr cpsdr @@rd,@@rs,rr,cc inb rbd,@@rs
clr addr(rd) cpsdrb @@rd,@@rs,rr,cc inb rbd,imm16 clr addr(rd) cpsdrb @@rd,@@rs,rr,cc inb rbd,imm16
clr rd cpsi @@rd,@@rs,rr,cc inc @@rd,imm4m1 clr rd cpsi @@rd,@@rs,rr,cc inc @@rd,imm4m1
clrb @@rd cpsib @@rd,@@rs,rr,cc inc addr(rd),imm4m1 clrb @@rd cpsib @@rd,@@rs,rr,cc inc addr(rd),imm4m1
@end group
@group
inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs) inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs)
inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16 inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16
incb @@rd,imm4m1 ldb rd(rx),rbs mult rrd,rs incb @@rd,imm4m1 ldb rd(rx),rbs mult rrd,rs
@ -4847,8 +4863,6 @@ ldb rbd,addr(rs) mres push @@rd,@@rs
ldb rbd,imm8 mset push @@rd,addr ldb rbd,imm8 mset push @@rd,addr
ldb rbd,rbs mult rrd,@@rs push @@rd,addr(rs) ldb rbd,rbs mult rrd,@@rs push @@rd,addr(rs)
ldb rbd,rs(imm16) mult rrd,addr push @@rd,imm16 ldb rbd,rs(imm16) mult rrd,addr push @@rd,imm16
@end group
@group
push @@rd,rs set addr,imm4 subl rrd,imm32 push @@rd,rs set addr,imm4 subl rrd,imm32
pushl @@rd,@@rs set rd,imm4 subl rrd,rrs pushl @@rd,@@rs set rd,imm4 subl rrd,rrs
pushl @@rd,addr set rd,rs tcc cc,rd pushl @@rd,addr set rd,rs tcc cc,rd
@ -4895,8 +4909,10 @@ sdlb rbd,rs subb rbd,rbs xorb rbd,rbs
sdll rrd,rs subl rrd,@@rs sdll rrd,rs subl rrd,@@rs
set @@rd,imm4 subl rrd,addr set @@rd,imm4 subl rrd,addr
set addr(rd),imm4 subl rrd,addr(rs) set addr(rd),imm4 subl rrd,addr(rs)
@end group
@end smallexample @end smallexample
@iftex
@endgroup
@end iftex
@node Copying @node Copying

View File

@ -45,7 +45,7 @@ _fi__(0)
@ifinfo @ifinfo
This file documents the GNU Assembler "_AS__". This file documents the GNU Assembler "_AS__".
Copyright (C) 1991 Free Software Foundation, Inc. Copyright (C) 1991, 1992 Free Software Foundation, Inc.
Permission is granted to make and distribute verbatim copies of Permission is granted to make and distribute verbatim copies of
this manual provided the copyright notice and this permission notice this manual provided the copyright notice and this permission notice
@ -109,7 +109,7 @@ done.
@end tex @end tex
@vskip 0pt plus 1filll @vskip 0pt plus 1filll
Copyright @copyright{} 1991 Free Software Foundation, Inc. Copyright @copyright{} 1991, 1992 Free Software Foundation, Inc.
Permission is granted to make and distribute verbatim copies of Permission is granted to make and distribute verbatim copies of
this manual provided the copyright notice and this permission notice this manual provided the copyright notice and this permission notice
@ -847,9 +847,9 @@ _if__(_H8__)
@samp{;} for the _HOST__ family; @samp{;} for the _HOST__ family;
_fi__(_H8__) _fi__(_H8__)
_if__(_Z8000__) _if__(_Z8000__)
@samp{!} for the Z8000. @samp{!} for the Z8000;
_fi__(_Z8000__) _fi__(_Z8000__)
@pxref{_MACH_DEP__}. @refill see @ref{_MACH_DEP__}. @refill
@c FIXME: fill in SPARC line comment char @c FIXME: fill in SPARC line comment char
_if__(_GENERIC__) _if__(_GENERIC__)
@ -5286,35 +5286,42 @@ _CHAPSEC__(2+_GENERIC__) Special Characters
@cindex line separator, Z8000 @cindex line separator, Z8000
@cindex statement separator, Z8000 @cindex statement separator, Z8000
@cindex Z8000 line separator @cindex Z8000 line separator
@samp{;} can be used instead of a newline to separate statements. You can use @samp{;} instead of a newline to separate statements.
@node Z8000-Regs @node Z8000-Regs
_CHAPSEC__(2+_GENERIC__) Register Names _CHAPSEC__(2+_GENERIC__) Register Names
@cindex Z8000 registers @cindex Z8000 registers
@cindex registers, Z8000 @cindex registers, Z8000
The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer to different The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer
sized groups of registers with the prefix @samp{r} for 16 bit registers, @samp{rr} to different sized groups of registers by register number, with the
for 32 bit registers and @samp{rq} for 64 bit registers. The first eight of the sixteen prefix @samp{r} for 16 bit registers, @samp{rr} for 32 bit registers and
16 bit registers may also be accessed by bytes. They are named @samp{r@var{n}h} and @samp{r@var{n}l}. @samp{rq} for 64 bit registers. You can also refer to the contents of
@example the first eight (of the sixteen 16 bit registers) by bytes. They are
byte registers named @samp{r@var{n}h} and @samp{r@var{n}l}.
r0l r0h r1h r1l r2h r2l r3h r3l r4h r4l r5h r5l r6h r6l r7h r7l
word registers @smallexample
@exdent @emph{byte registers}
r0l r0h r1h r1l r2h r2l r3h r3l
r4h r4l r5h r5l r6h r6l r7h r7l
@exdent @emph{word registers}
r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
long word registers @exdent @emph{long word registers}
rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14 rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
quad word registers @exdent @emph{quad word registers}
rq0 rq4 rq8 rq12 rq0 rq4 rq8 rq12
@end example @end smallexample
@node Z8000-Addressing @node Z8000-Addressing
_CHAPSEC__(2+_GENERIC__) Addressing Modes _CHAPSEC__(2+_GENERIC__) Addressing Modes
@cindex addressing modes, Z8000 @cindex addressing modes, Z8000
@cindex Z800 addressing modes @cindex Z800 addressing modes
_AS__ understands the following addressing modes for the Z8000: _AS__ understands the following addressing modes for the Z8000:
@table @code @table @code
@item r@var{n} @item r@var{n}
Register direct Register direct
@ -5322,7 +5329,7 @@ Register direct
@item @@r@var{n} @item @@r@var{n}
Indirect register Indirect register
@item @var{address} @item @var{addr}
Direct: the 16/24 bit address of the operand is in the instruction. Direct: the 16/24 bit address of the operand is in the instruction.
@item address(r@var{n}) @item address(r@var{n})
@ -5330,11 +5337,14 @@ Indexed: the 16/24 bit address is added to the 16 bit register to produce
the final address in memory of the operand. the final address in memory of the operand.
@item r@var{n}(#@var{imm}) @item r@var{n}(#@var{imm})
Base Address: the 16/24 bit register is added to the 16 bit sign extended immediate displacement to produce the final address in memory of the operand. Base Address: the 16/24 bit register is added to the 16 bit sign
extended immediate displacement to produce the final address in memory
of the operand.
@item r@var{n}(r@var{m}) @item r@var{n}(r@var{m})
Base Index: the 16/24 bit register r@var{n} is added to the sign extended Base Index: the 16/24 bit register r@var{n} is added to the sign
16 bit index register r@var{m} to produce the final address in memory of the operand. extended 16 bit index register r@var{m} to produce the final address in
memory of the operand.
@item #@var{xx} @item #@var{xx}
Immediate data @var{xx}. Immediate data @var{xx}.
@ -5349,56 +5359,64 @@ _CHAPSEC__(1+_GENERIC__) Opcodes
For detailed information on the Z8000 machine instruction set, see For detailed information on the Z8000 machine instruction set, see
@cite{Z8000 Technical Manual}. @cite{Z8000 Technical Manual}.
@cindex Z8000 pseudo ops @cindex Z8000 directives
The Z8000 port of _AS__ includes these additional assembler directives,
for compatibility with other Z8000 assemblers:
The Z8000 port of gas provides a superficial resemblance to YASM, and
provides these YASM compatible pseudo ops:
@table @code @table @code
@item segm @item segm
@cindex segm @cindex segm
Generates code for the segmented Z8001. Generates code for the segmented Z8001.
@item unsegm @item unsegm
Generates code for the unsegmented Z8002. Generates code for the unsegmented Z8002.
@item name @item name
Synonym for @code{.file} Synonym for @code{.file}
@item global @item global
Synonum for @code{.global} Synonum for @code{.global}
@item wval @item wval
Synonym for .word Synonym for .word
@item lval @item lval
Synonym for .long Synonym for .long
@item bval @item bval
Synonym for .byte Synonym for .byte
@item sval @item sval
Assemble a string. Assemble a string. @code{sval} expects one string literal, delimited by
@code{sval} expects one string literal, delimited by single quotes. It assembles each byte of the string into consecutive addresses. Single quote single quotes. It assembles each byte of the string into consecutive
and other non-representable characters may be descrbed by escaping them addresses. You can use the escape sequence @samp{%@var{xx}} (where
with a percent sign and their ascii value as a two digit hex number. @var{xx} represents a two-digit hexadecimal number) to represent the
character whose @sc{ascii} value is @var{xx}. Use this feature to
describe single quote and other characters that may not appear in string
literals as themselves. For example, the C statement @w{@samp{char *a =
"he said \"it's 50% off\"";}} is represented in Z8000 assembly language
as
@example @smallexample
char *a = "he said \"it's 50% off\""; sval 'he said %22it%27s 50%25 off%22%00'
@end smallexample
0000 68652073 sval 'he said %22it%27s 50%25 off%22%00'
61696420
22697427
73203530
25206F66
662200
@end example
@item rsect @item rsect
synonym for @code{.section} synonym for @code{.section}
@item block @item block
synonym for @code{.space} synonym for @code{.space}
@item even @item even
synonym for @code{.align 1} synonym for @code{.align 1}
@end table @end table
The following table summarizes the opcodes and their arguments: The following table summarizes the opcodes and their arguments:
@c kluge due to lack of group outside example @iftex
@page @begingroup
@let@nonarrowing=@comment
@end iftex
@smallexample @smallexample
@group
rs @r{16 bit source register} rs @r{16 bit source register}
rd @r{16 bit destination register} rd @r{16 bit destination register}
@ -5458,8 +5476,6 @@ clr addr cpsdr @@rd,@@rs,rr,cc inb rbd,@@rs
clr addr(rd) cpsdrb @@rd,@@rs,rr,cc inb rbd,imm16 clr addr(rd) cpsdrb @@rd,@@rs,rr,cc inb rbd,imm16
clr rd cpsi @@rd,@@rs,rr,cc inc @@rd,imm4m1 clr rd cpsi @@rd,@@rs,rr,cc inc @@rd,imm4m1
clrb @@rd cpsib @@rd,@@rs,rr,cc inc addr(rd),imm4m1 clrb @@rd cpsib @@rd,@@rs,rr,cc inc addr(rd),imm4m1
@end group
@group
inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs) inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs)
inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16 inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16
incb @@rd,imm4m1 ldb rd(rx),rbs mult rrd,rs incb @@rd,imm4m1 ldb rd(rx),rbs mult rrd,rs
@ -5507,8 +5523,6 @@ ldb rbd,addr(rs) mres push @@rd,@@rs
ldb rbd,imm8 mset push @@rd,addr ldb rbd,imm8 mset push @@rd,addr
ldb rbd,rbs mult rrd,@@rs push @@rd,addr(rs) ldb rbd,rbs mult rrd,@@rs push @@rd,addr(rs)
ldb rbd,rs(imm16) mult rrd,addr push @@rd,imm16 ldb rbd,rs(imm16) mult rrd,addr push @@rd,imm16
@end group
@group
push @@rd,rs set addr,imm4 subl rrd,imm32 push @@rd,rs set addr,imm4 subl rrd,imm32
pushl @@rd,@@rs set rd,imm4 subl rrd,rrs pushl @@rd,@@rs set rd,imm4 subl rrd,rrs
pushl @@rd,addr set rd,rs tcc cc,rd pushl @@rd,addr set rd,rs tcc cc,rd
@ -5555,8 +5569,10 @@ sdlb rbd,rs subb rbd,rbs xorb rbd,rbs
sdll rrd,rs subl rrd,@@rs sdll rrd,rs subl rrd,@@rs
set @@rd,imm4 subl rrd,addr set @@rd,imm4 subl rrd,addr
set addr(rd),imm4 subl rrd,addr(rs) set addr(rd),imm4 subl rrd,addr(rs)
@end group
@end smallexample @end smallexample
@iftex
@endgroup
@end iftex
_fi__(_Z8000__) _fi__(_Z8000__)
_if__(0) _if__(0)