mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-06-27 22:48:57 +08:00
sim: riscv: new port
This is a hand-written implementation that should have fairly complete
coverage for the base integer instruction set ("i"), and for the atomic
("a") and integer multiplication+division ("m") extensions. It also
covers 32-bit & 64-bit targets.
The unittest coverage is a bit weak atm, but should get better.
This commit is contained in:
Mike Frysinger
@ -1,3 +1,8 @@
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2021-02-04 Mike Frysinger <vapier@gentoo.org>
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* configure.tgt (sim_arch): Add entry for riscv*-*-*.
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* configure: Regenerate.
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2021-01-30 Mike Frysinger <vapier@gentoo.org>
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2021-01-30 Mike Frysinger <vapier@gentoo.org>
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* Makefile.in (nltvals): Change to gennltvals.py.
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* Makefile.in (nltvals): Change to gennltvals.py.
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@ -1,3 +1,9 @@
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2021-02-04 Mike Frysinger <vapier@gentoo.org>
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* gennltvals.py (TARGETS): Add riscv.
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(TARGET_DIRS): Likewise.
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* nltvals.def: Regenerate from the latest libgloss sources.
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2021-01-31 Mike Frysinger <vapier@gentoo.org>
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2021-01-31 Mike Frysinger <vapier@gentoo.org>
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* cgen-trace.c (cgen_trace_insn): Add "%s" argument.
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* cgen-trace.c (cgen_trace_insn): Add "%s" argument.
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@ -50,6 +50,7 @@ TARGET_DIRS = {
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'd10v': 'newlib/libc/sys/d10v/sys',
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'd10v': 'newlib/libc/sys/d10v/sys',
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'i960': 'libgloss/i960',
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'i960': 'libgloss/i960',
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'mcore': 'libgloss/mcore',
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'mcore': 'libgloss/mcore',
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'riscv': 'libgloss/riscv/machine',
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'v850': 'libgloss/v850/sys',
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'v850': 'libgloss/v850/sys',
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}
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}
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TARGETS = {
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TARGETS = {
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@ -66,6 +67,7 @@ TARGETS = {
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'mn10300',
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'mn10300',
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'msp430',
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'msp430',
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'pru',
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'pru',
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'riscv',
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'sparc',
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'sparc',
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'v850',
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'v850',
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}
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}
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@ -546,6 +546,54 @@
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/* end pru sys target macros */
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/* end pru sys target macros */
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#endif
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#endif
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#endif
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#endif
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#ifdef NL_TARGET_riscv
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#ifdef sys_defs
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/* from syscall.h */
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/* begin riscv sys target macros */
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{ "SYS_access", 1033 },
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{ "SYS_brk", 214 },
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{ "SYS_chdir", 49 },
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{ "SYS_close", 57 },
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{ "SYS_dup", 23 },
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{ "SYS_exit", 93 },
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{ "SYS_exit_group", 94 },
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{ "SYS_faccessat", 48 },
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{ "SYS_fcntl", 25 },
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{ "SYS_fstat", 80 },
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{ "SYS_fstatat", 79 },
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{ "SYS_getcwd", 17 },
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{ "SYS_getdents", 61 },
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{ "SYS_getegid", 177 },
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{ "SYS_geteuid", 175 },
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{ "SYS_getgid", 176 },
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{ "SYS_getmainvars", 2011 },
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{ "SYS_getpid", 172 },
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{ "SYS_gettimeofday", 169 },
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{ "SYS_getuid", 174 },
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{ "SYS_kill", 129 },
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{ "SYS_link", 1025 },
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{ "SYS_lseek", 62 },
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{ "SYS_lstat", 1039 },
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{ "SYS_mkdir", 1030 },
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{ "SYS_mmap", 222 },
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{ "SYS_mremap", 216 },
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{ "SYS_munmap", 215 },
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{ "SYS_open", 1024 },
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{ "SYS_openat", 56 },
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|
{ "SYS_pread", 67 },
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{ "SYS_pwrite", 68 },
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{ "SYS_read", 63 },
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{ "SYS_rt_sigaction", 134 },
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{ "SYS_stat", 1038 },
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|
{ "SYS_time", 1062 },
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|
{ "SYS_times", 153 },
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|
{ "SYS_uname", 160 },
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|
{ "SYS_unlink", 1026 },
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|
{ "SYS_write", 64 },
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|
{ "SYS_writev", 66 },
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|
/* end riscv sys target macros */
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|
#endif
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|
#endif
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#ifdef NL_TARGET_sparc
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#ifdef NL_TARGET_sparc
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#ifdef sys_defs
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#ifdef sys_defs
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/* from syscall.h */
|
/* from syscall.h */
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8
sim/configure
vendored
8
sim/configure
vendored
@ -690,6 +690,7 @@ moxie
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msp430
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msp430
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or1k
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or1k
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pru
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pru
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|
riscv
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rl78
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rl78
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rx
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rx
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sh
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sh
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@ -4028,6 +4029,13 @@ subdirs="$subdirs aarch64"
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subdirs="$subdirs pru"
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subdirs="$subdirs pru"
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|
;;
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riscv*-*-*)
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sim_arch=riscv
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subdirs="$subdirs riscv"
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|
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;;
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;;
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rl78-*-*)
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rl78-*-*)
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@ -85,6 +85,9 @@ case "${target}" in
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pru*-*-*)
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pru*-*-*)
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SIM_ARCH(pru)
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SIM_ARCH(pru)
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;;
|
;;
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riscv*-*-*)
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SIM_ARCH(riscv)
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|
;;
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rl78-*-*)
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rl78-*-*)
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SIM_ARCH(rl78)
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SIM_ARCH(rl78)
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;;
|
;;
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5
sim/riscv/ChangeLog
Normal file
5
sim/riscv/ChangeLog
Normal file
@ -0,0 +1,5 @@
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|
2021-02-04 Mike Frysinger <vapier@gentoo.org>
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|
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|
* Makefile.in, configure.ac, interp.c, machs.c, machs.h,
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|
model_list.def, sim-main.c, sim-main.h: New files.
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|
* aclocal.m4, config.in, configure: Regenerated.
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30
sim/riscv/Makefile.in
Normal file
30
sim/riscv/Makefile.in
Normal file
@ -0,0 +1,30 @@
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|
# Makefile template for Configure for the example basic simulator.
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|
# Copyright (C) 2005-2021 Free Software Foundation, Inc.
|
||||||
|
# Written by Mike Frysinger.
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|
#
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|
# This program is free software; you can redistribute it and/or modify
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||||||
|
# it under the terms of the GNU General Public License as published by
|
||||||
|
# the Free Software Foundation; either version 3 of the License, or
|
||||||
|
# (at your option) any later version.
|
||||||
|
#
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||||||
|
# This program is distributed in the hope that it will be useful,
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||||||
|
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
# GNU General Public License for more details.
|
||||||
|
#
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||||||
|
# You should have received a copy of the GNU General Public License
|
||||||
|
# along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||||
|
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# This selects the newlib/libgloss syscall definitions.
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|
NL_TARGET = -DNL_TARGET_riscv
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|
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|
## COMMON_PRE_CONFIG_FRAG
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|
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|
SIM_OBJS = \
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|
$(SIM_NEW_COMMON_OBJS) \
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|
sim-resume.o \
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|
interp.o \
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|
machs.o \
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|
sim-main.o
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|
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## COMMON_POST_CONFIG_FRAG
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119
sim/riscv/aclocal.m4
vendored
Normal file
119
sim/riscv/aclocal.m4
vendored
Normal file
@ -0,0 +1,119 @@
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|||||||
|
# generated automatically by aclocal 1.15.1 -*- Autoconf -*-
|
||||||
|
|
||||||
|
# Copyright (C) 1996-2017 Free Software Foundation, Inc.
|
||||||
|
|
||||||
|
# This file is free software; the Free Software Foundation
|
||||||
|
# gives unlimited permission to copy and/or distribute it,
|
||||||
|
# with or without modifications, as long as this notice is preserved.
|
||||||
|
|
||||||
|
# This program is distributed in the hope that it will be useful,
|
||||||
|
# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
|
||||||
|
# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
|
||||||
|
# PARTICULAR PURPOSE.
|
||||||
|
|
||||||
|
m4_ifndef([AC_CONFIG_MACRO_DIRS], [m4_defun([_AM_CONFIG_MACRO_DIRS], [])m4_defun([AC_CONFIG_MACRO_DIRS], [_AM_CONFIG_MACRO_DIRS($@)])])
|
||||||
|
# AM_CONDITIONAL -*- Autoconf -*-
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||||||
|
|
||||||
|
# Copyright (C) 1997-2017 Free Software Foundation, Inc.
|
||||||
|
#
|
||||||
|
# This file is free software; the Free Software Foundation
|
||||||
|
# gives unlimited permission to copy and/or distribute it,
|
||||||
|
# with or without modifications, as long as this notice is preserved.
|
||||||
|
|
||||||
|
# AM_CONDITIONAL(NAME, SHELL-CONDITION)
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||||||
|
# -------------------------------------
|
||||||
|
# Define a conditional.
|
||||||
|
AC_DEFUN([AM_CONDITIONAL],
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|
[AC_PREREQ([2.52])dnl
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|
m4_if([$1], [TRUE], [AC_FATAL([$0: invalid condition: $1])],
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[$1], [FALSE], [AC_FATAL([$0: invalid condition: $1])])dnl
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AC_SUBST([$1_TRUE])dnl
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||||||
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AC_SUBST([$1_FALSE])dnl
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||||||
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_AM_SUBST_NOTMAKE([$1_TRUE])dnl
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||||||
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_AM_SUBST_NOTMAKE([$1_FALSE])dnl
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||||||
|
m4_define([_AM_COND_VALUE_$1], [$2])dnl
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||||||
|
if $2; then
|
||||||
|
$1_TRUE=
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||||||
|
$1_FALSE='#'
|
||||||
|
else
|
||||||
|
$1_TRUE='#'
|
||||||
|
$1_FALSE=
|
||||||
|
fi
|
||||||
|
AC_CONFIG_COMMANDS_PRE(
|
||||||
|
[if test -z "${$1_TRUE}" && test -z "${$1_FALSE}"; then
|
||||||
|
AC_MSG_ERROR([[conditional "$1" was never defined.
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||||||
|
Usually this means the macro was only invoked conditionally.]])
|
||||||
|
fi])])
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||||||
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||||||
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# Copyright (C) 2003-2017 Free Software Foundation, Inc.
|
||||||
|
#
|
||||||
|
# This file is free software; the Free Software Foundation
|
||||||
|
# gives unlimited permission to copy and/or distribute it,
|
||||||
|
# with or without modifications, as long as this notice is preserved.
|
||||||
|
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||||||
|
# Check whether the underlying file-system supports filenames
|
||||||
|
# with a leading dot. For instance MS-DOS doesn't.
|
||||||
|
AC_DEFUN([AM_SET_LEADING_DOT],
|
||||||
|
[rm -rf .tst 2>/dev/null
|
||||||
|
mkdir .tst 2>/dev/null
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||||||
|
if test -d .tst; then
|
||||||
|
am__leading_dot=.
|
||||||
|
else
|
||||||
|
am__leading_dot=_
|
||||||
|
fi
|
||||||
|
rmdir .tst 2>/dev/null
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||||||
|
AC_SUBST([am__leading_dot])])
|
||||||
|
|
||||||
|
# Add --enable-maintainer-mode option to configure. -*- Autoconf -*-
|
||||||
|
# From Jim Meyering
|
||||||
|
|
||||||
|
# Copyright (C) 1996-2017 Free Software Foundation, Inc.
|
||||||
|
#
|
||||||
|
# This file is free software; the Free Software Foundation
|
||||||
|
# gives unlimited permission to copy and/or distribute it,
|
||||||
|
# with or without modifications, as long as this notice is preserved.
|
||||||
|
|
||||||
|
# AM_MAINTAINER_MODE([DEFAULT-MODE])
|
||||||
|
# ----------------------------------
|
||||||
|
# Control maintainer-specific portions of Makefiles.
|
||||||
|
# Default is to disable them, unless 'enable' is passed literally.
|
||||||
|
# For symmetry, 'disable' may be passed as well. Anyway, the user
|
||||||
|
# can override the default with the --enable/--disable switch.
|
||||||
|
AC_DEFUN([AM_MAINTAINER_MODE],
|
||||||
|
[m4_case(m4_default([$1], [disable]),
|
||||||
|
[enable], [m4_define([am_maintainer_other], [disable])],
|
||||||
|
[disable], [m4_define([am_maintainer_other], [enable])],
|
||||||
|
[m4_define([am_maintainer_other], [enable])
|
||||||
|
m4_warn([syntax], [unexpected argument to AM@&t@_MAINTAINER_MODE: $1])])
|
||||||
|
AC_MSG_CHECKING([whether to enable maintainer-specific portions of Makefiles])
|
||||||
|
dnl maintainer-mode's default is 'disable' unless 'enable' is passed
|
||||||
|
AC_ARG_ENABLE([maintainer-mode],
|
||||||
|
[AS_HELP_STRING([--]am_maintainer_other[-maintainer-mode],
|
||||||
|
am_maintainer_other[ make rules and dependencies not useful
|
||||||
|
(and sometimes confusing) to the casual installer])],
|
||||||
|
[USE_MAINTAINER_MODE=$enableval],
|
||||||
|
[USE_MAINTAINER_MODE=]m4_if(am_maintainer_other, [enable], [no], [yes]))
|
||||||
|
AC_MSG_RESULT([$USE_MAINTAINER_MODE])
|
||||||
|
AM_CONDITIONAL([MAINTAINER_MODE], [test $USE_MAINTAINER_MODE = yes])
|
||||||
|
MAINT=$MAINTAINER_MODE_TRUE
|
||||||
|
AC_SUBST([MAINT])dnl
|
||||||
|
]
|
||||||
|
)
|
||||||
|
|
||||||
|
# Copyright (C) 2006-2017 Free Software Foundation, Inc.
|
||||||
|
#
|
||||||
|
# This file is free software; the Free Software Foundation
|
||||||
|
# gives unlimited permission to copy and/or distribute it,
|
||||||
|
# with or without modifications, as long as this notice is preserved.
|
||||||
|
|
||||||
|
# _AM_SUBST_NOTMAKE(VARIABLE)
|
||||||
|
# ---------------------------
|
||||||
|
# Prevent Automake from outputting VARIABLE = @VARIABLE@ in Makefile.in.
|
||||||
|
# This macro is traced by Automake.
|
||||||
|
AC_DEFUN([_AM_SUBST_NOTMAKE])
|
||||||
|
|
||||||
|
# AM_SUBST_NOTMAKE(VARIABLE)
|
||||||
|
# --------------------------
|
||||||
|
# Public sister of _AM_SUBST_NOTMAKE.
|
||||||
|
AC_DEFUN([AM_SUBST_NOTMAKE], [_AM_SUBST_NOTMAKE($@)])
|
||||||
|
|
||||||
242
sim/riscv/config.in
Normal file
242
sim/riscv/config.in
Normal file
@ -0,0 +1,242 @@
|
|||||||
|
/* config.in. Generated from configure.ac by autoheader. */
|
||||||
|
|
||||||
|
/* Define if building universal (internal helper macro) */
|
||||||
|
#undef AC_APPLE_UNIVERSAL_BUILD
|
||||||
|
|
||||||
|
/* Sim debug setting */
|
||||||
|
#undef DEBUG
|
||||||
|
|
||||||
|
/* Define to 1 if translation of program messages to the user's native
|
||||||
|
language is requested. */
|
||||||
|
#undef ENABLE_NLS
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <dlfcn.h> header file. */
|
||||||
|
#undef HAVE_DLFCN_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <fcntl.h> header file. */
|
||||||
|
#undef HAVE_FCNTL_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <fpu_control.h> header file. */
|
||||||
|
#undef HAVE_FPU_CONTROL_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `ftruncate' function. */
|
||||||
|
#undef HAVE_FTRUNCATE
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `getrusage' function. */
|
||||||
|
#undef HAVE_GETRUSAGE
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <inttypes.h> header file. */
|
||||||
|
#undef HAVE_INTTYPES_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `nsl' library (-lnsl). */
|
||||||
|
#undef HAVE_LIBNSL
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `socket' library (-lsocket). */
|
||||||
|
#undef HAVE_LIBSOCKET
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `lstat' function. */
|
||||||
|
#undef HAVE_LSTAT
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <memory.h> header file. */
|
||||||
|
#undef HAVE_MEMORY_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `mmap' function. */
|
||||||
|
#undef HAVE_MMAP
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `munmap' function. */
|
||||||
|
#undef HAVE_MUNMAP
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `posix_fallocate' function. */
|
||||||
|
#undef HAVE_POSIX_FALLOCATE
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `sigaction' function. */
|
||||||
|
#undef HAVE_SIGACTION
|
||||||
|
|
||||||
|
/* Define to 1 if the system has the type `socklen_t'. */
|
||||||
|
#undef HAVE_SOCKLEN_T
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <stdint.h> header file. */
|
||||||
|
#undef HAVE_STDINT_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <stdlib.h> header file. */
|
||||||
|
#undef HAVE_STDLIB_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <strings.h> header file. */
|
||||||
|
#undef HAVE_STRINGS_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <string.h> header file. */
|
||||||
|
#undef HAVE_STRING_H
|
||||||
|
|
||||||
|
/* Define to 1 if `st_atime' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_ATIME
|
||||||
|
|
||||||
|
/* Define to 1 if `st_blksize' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_BLKSIZE
|
||||||
|
|
||||||
|
/* Define to 1 if `st_blocks' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_BLOCKS
|
||||||
|
|
||||||
|
/* Define to 1 if `st_ctime' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_CTIME
|
||||||
|
|
||||||
|
/* Define to 1 if `st_dev' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_DEV
|
||||||
|
|
||||||
|
/* Define to 1 if `st_gid' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_GID
|
||||||
|
|
||||||
|
/* Define to 1 if `st_ino' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_INO
|
||||||
|
|
||||||
|
/* Define to 1 if `st_mode' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_MODE
|
||||||
|
|
||||||
|
/* Define to 1 if `st_mtime' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_MTIME
|
||||||
|
|
||||||
|
/* Define to 1 if `st_nlink' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_NLINK
|
||||||
|
|
||||||
|
/* Define to 1 if `st_rdev' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_RDEV
|
||||||
|
|
||||||
|
/* Define to 1 if `st_size' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_SIZE
|
||||||
|
|
||||||
|
/* Define to 1 if `st_uid' is a member of `struct stat'. */
|
||||||
|
#undef HAVE_STRUCT_STAT_ST_UID
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <sys/mman.h> header file. */
|
||||||
|
#undef HAVE_SYS_MMAN_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <sys/resource.h> header file. */
|
||||||
|
#undef HAVE_SYS_RESOURCE_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <sys/stat.h> header file. */
|
||||||
|
#undef HAVE_SYS_STAT_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <sys/times.h> header file. */
|
||||||
|
#undef HAVE_SYS_TIMES_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <sys/time.h> header file. */
|
||||||
|
#undef HAVE_SYS_TIME_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <sys/types.h> header file. */
|
||||||
|
#undef HAVE_SYS_TYPES_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `time' function. */
|
||||||
|
#undef HAVE_TIME
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `truncate' function. */
|
||||||
|
#undef HAVE_TRUNCATE
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <unistd.h> header file. */
|
||||||
|
#undef HAVE_UNISTD_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the <windows.h> header file. */
|
||||||
|
#undef HAVE_WINDOWS_H
|
||||||
|
|
||||||
|
/* Define to 1 if you have the `__setfpucw' function. */
|
||||||
|
#undef HAVE___SETFPUCW
|
||||||
|
|
||||||
|
/* Define to the sub-directory in which libtool stores uninstalled libraries.
|
||||||
|
*/
|
||||||
|
#undef LT_OBJDIR
|
||||||
|
|
||||||
|
/* Name of this package. */
|
||||||
|
#undef PACKAGE
|
||||||
|
|
||||||
|
/* Define to the address where bug reports for this package should be sent. */
|
||||||
|
#undef PACKAGE_BUGREPORT
|
||||||
|
|
||||||
|
/* Define to the full name of this package. */
|
||||||
|
#undef PACKAGE_NAME
|
||||||
|
|
||||||
|
/* Define to the full name and version of this package. */
|
||||||
|
#undef PACKAGE_STRING
|
||||||
|
|
||||||
|
/* Define to the one symbol short name of this package. */
|
||||||
|
#undef PACKAGE_TARNAME
|
||||||
|
|
||||||
|
/* Define to the home page for this package. */
|
||||||
|
#undef PACKAGE_URL
|
||||||
|
|
||||||
|
/* Define to the version of this package. */
|
||||||
|
#undef PACKAGE_VERSION
|
||||||
|
|
||||||
|
/* Additional package description */
|
||||||
|
#undef PKGVERSION
|
||||||
|
|
||||||
|
/* Sim profile settings */
|
||||||
|
#undef PROFILE
|
||||||
|
|
||||||
|
/* Bug reporting address */
|
||||||
|
#undef REPORT_BUGS_TO
|
||||||
|
|
||||||
|
/* Define as the return type of signal handlers (`int' or `void'). */
|
||||||
|
#undef RETSIGTYPE
|
||||||
|
|
||||||
|
/* Define to 1 if you have the ANSI C header files. */
|
||||||
|
#undef STDC_HEADERS
|
||||||
|
|
||||||
|
/* Enable extensions on AIX 3, Interix. */
|
||||||
|
#ifndef _ALL_SOURCE
|
||||||
|
# undef _ALL_SOURCE
|
||||||
|
#endif
|
||||||
|
/* Enable GNU extensions on systems that have them. */
|
||||||
|
#ifndef _GNU_SOURCE
|
||||||
|
# undef _GNU_SOURCE
|
||||||
|
#endif
|
||||||
|
/* Enable threading extensions on Solaris. */
|
||||||
|
#ifndef _POSIX_PTHREAD_SEMANTICS
|
||||||
|
# undef _POSIX_PTHREAD_SEMANTICS
|
||||||
|
#endif
|
||||||
|
/* Enable extensions on HP NonStop. */
|
||||||
|
#ifndef _TANDEM_SOURCE
|
||||||
|
# undef _TANDEM_SOURCE
|
||||||
|
#endif
|
||||||
|
/* Enable general extensions on Solaris. */
|
||||||
|
#ifndef __EXTENSIONS__
|
||||||
|
# undef __EXTENSIONS__
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/* Sim assert settings */
|
||||||
|
#undef WITH_ASSERT
|
||||||
|
|
||||||
|
/* Sim debug setting */
|
||||||
|
#undef WITH_DEBUG
|
||||||
|
|
||||||
|
/* Sim default environment */
|
||||||
|
#undef WITH_ENVIRONMENT
|
||||||
|
|
||||||
|
/* Sim profile settings */
|
||||||
|
#undef WITH_PROFILE
|
||||||
|
|
||||||
|
/* How to route I/O */
|
||||||
|
#undef WITH_STDIO
|
||||||
|
|
||||||
|
/* Sim trace settings */
|
||||||
|
#undef WITH_TRACE
|
||||||
|
|
||||||
|
/* Define WORDS_BIGENDIAN to 1 if your processor stores words with the most
|
||||||
|
significant byte first (like Motorola and SPARC, unlike Intel). */
|
||||||
|
#if defined AC_APPLE_UNIVERSAL_BUILD
|
||||||
|
# if defined __BIG_ENDIAN__
|
||||||
|
# define WORDS_BIGENDIAN 1
|
||||||
|
# endif
|
||||||
|
#else
|
||||||
|
# ifndef WORDS_BIGENDIAN
|
||||||
|
# undef WORDS_BIGENDIAN
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Define to 1 if on MINIX. */
|
||||||
|
#undef _MINIX
|
||||||
|
|
||||||
|
/* Define to 2 if the system does not provide POSIX.1 features except with
|
||||||
|
this defined. */
|
||||||
|
#undef _POSIX_1_SOURCE
|
||||||
|
|
||||||
|
/* Define to 1 if you need to in order for `stat' and other things to work. */
|
||||||
|
#undef _POSIX_SOURCE
|
||||||
16145
sim/riscv/configure
vendored
Executable file
16145
sim/riscv/configure
vendored
Executable file
File diff suppressed because it is too large
Load Diff
28
sim/riscv/configure.ac
Normal file
28
sim/riscv/configure.ac
Normal file
@ -0,0 +1,28 @@
|
|||||||
|
dnl Process this file with autoconf to produce a configure script.
|
||||||
|
AC_INIT(Makefile.in)
|
||||||
|
sinclude(../common/acinclude.m4)
|
||||||
|
|
||||||
|
SIM_AC_COMMON
|
||||||
|
|
||||||
|
SIM_AC_OPTION_ENDIAN(LITTLE)
|
||||||
|
SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
|
||||||
|
SIM_AC_OPTION_ENVIRONMENT
|
||||||
|
SIM_AC_OPTION_WARNINGS
|
||||||
|
|
||||||
|
# Select the default model for the target.
|
||||||
|
riscv_model=
|
||||||
|
case "${target}" in
|
||||||
|
riscv32*) riscv_model="RV32G" ;;
|
||||||
|
riscv*) riscv_model="RV64G" ;;
|
||||||
|
esac
|
||||||
|
SIM_AC_OPTION_DEFAULT_MODEL(${riscv_model})
|
||||||
|
|
||||||
|
# Select the bitsize of the target.
|
||||||
|
riscv_addr_bitsize=
|
||||||
|
case "${target}" in
|
||||||
|
riscv32*) riscv_addr_bitsize=32 ;;
|
||||||
|
riscv*) riscv_addr_bitsize=64 ;;
|
||||||
|
esac
|
||||||
|
SIM_AC_OPTION_BITSIZE($riscv_addr_bitsize)
|
||||||
|
|
||||||
|
SIM_AC_OUTPUT
|
||||||
153
sim/riscv/interp.c
Normal file
153
sim/riscv/interp.c
Normal file
@ -0,0 +1,153 @@
|
|||||||
|
/* RISC-V simulator.
|
||||||
|
|
||||||
|
Copyright (C) 2005-2021 Free Software Foundation, Inc.
|
||||||
|
Contributed by Mike Frysinger.
|
||||||
|
|
||||||
|
This file is part of simulators.
|
||||||
|
|
||||||
|
This program is free software; you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation; either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
This program is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
||||||
|
|
||||||
|
#include "config.h"
|
||||||
|
|
||||||
|
#include "sim-main.h"
|
||||||
|
#include "sim-options.h"
|
||||||
|
|
||||||
|
void
|
||||||
|
sim_engine_run (SIM_DESC sd,
|
||||||
|
int next_cpu_nr, /* ignore */
|
||||||
|
int nr_cpus, /* ignore */
|
||||||
|
int siggnal) /* ignore */
|
||||||
|
{
|
||||||
|
SIM_CPU *cpu;
|
||||||
|
|
||||||
|
SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
|
||||||
|
|
||||||
|
cpu = STATE_CPU (sd, 0);
|
||||||
|
|
||||||
|
while (1)
|
||||||
|
{
|
||||||
|
step_once (cpu);
|
||||||
|
if (sim_events_tick (sd))
|
||||||
|
sim_events_process (sd);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
static void
|
||||||
|
free_state (SIM_DESC sd)
|
||||||
|
{
|
||||||
|
if (STATE_MODULES (sd) != NULL)
|
||||||
|
sim_module_uninstall (sd);
|
||||||
|
sim_cpu_free_all (sd);
|
||||||
|
sim_state_free (sd);
|
||||||
|
}
|
||||||
|
|
||||||
|
SIM_DESC
|
||||||
|
sim_open (SIM_OPEN_KIND kind, host_callback *callback,
|
||||||
|
struct bfd *abfd, char * const *argv)
|
||||||
|
{
|
||||||
|
char c;
|
||||||
|
int i;
|
||||||
|
SIM_DESC sd = sim_state_alloc (kind, callback);
|
||||||
|
|
||||||
|
/* The cpu data is kept in a separately allocated chunk of memory. */
|
||||||
|
if (sim_cpu_alloc_all (sd, 1, /*cgen_cpu_max_extra_bytes ()*/0) != SIM_RC_OK)
|
||||||
|
{
|
||||||
|
free_state (sd);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
|
||||||
|
{
|
||||||
|
free_state (sd);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* XXX: Default to the Virtual environment. */
|
||||||
|
if (STATE_ENVIRONMENT (sd) == ALL_ENVIRONMENT)
|
||||||
|
STATE_ENVIRONMENT (sd) = VIRTUAL_ENVIRONMENT;
|
||||||
|
|
||||||
|
/* The parser will print an error message for us, so we silently return. */
|
||||||
|
if (sim_parse_args (sd, argv) != SIM_RC_OK)
|
||||||
|
{
|
||||||
|
free_state (sd);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Check for/establish the a reference program image. */
|
||||||
|
if (sim_analyze_program (sd,
|
||||||
|
(STATE_PROG_ARGV (sd) != NULL
|
||||||
|
? *STATE_PROG_ARGV (sd)
|
||||||
|
: NULL), abfd) != SIM_RC_OK)
|
||||||
|
{
|
||||||
|
free_state (sd);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Establish any remaining configuration options. */
|
||||||
|
if (sim_config (sd) != SIM_RC_OK)
|
||||||
|
{
|
||||||
|
free_state (sd);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (sim_post_argv_init (sd) != SIM_RC_OK)
|
||||||
|
{
|
||||||
|
free_state (sd);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* CPU specific initialization. */
|
||||||
|
for (i = 0; i < MAX_NR_PROCESSORS; ++i)
|
||||||
|
{
|
||||||
|
SIM_CPU *cpu = STATE_CPU (sd, i);
|
||||||
|
|
||||||
|
initialize_cpu (sd, cpu, i);
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Allocate external memory if none specified by user.
|
||||||
|
Use address 4 here in case the user wanted address 0 unmapped. */
|
||||||
|
if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
|
||||||
|
sim_do_commandf (sd, "memory-size %#x", DEFAULT_MEM_SIZE);
|
||||||
|
|
||||||
|
return sd;
|
||||||
|
}
|
||||||
|
|
||||||
|
SIM_RC
|
||||||
|
sim_create_inferior (SIM_DESC sd, struct bfd *abfd,
|
||||||
|
char * const *argv, char * const *env)
|
||||||
|
{
|
||||||
|
SIM_CPU *cpu = STATE_CPU (sd, 0);
|
||||||
|
SIM_ADDR addr;
|
||||||
|
|
||||||
|
/* Set the PC. */
|
||||||
|
if (abfd != NULL)
|
||||||
|
addr = bfd_get_start_address (abfd);
|
||||||
|
else
|
||||||
|
addr = 0;
|
||||||
|
sim_pc_set (cpu, addr);
|
||||||
|
|
||||||
|
/* Standalone mode (i.e. `run`) will take care of the argv for us in
|
||||||
|
sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim'
|
||||||
|
with `gdb`), we need to handle it because the user can change the
|
||||||
|
argv on the fly via gdb's 'run'. */
|
||||||
|
if (STATE_PROG_ARGV (sd) != argv)
|
||||||
|
{
|
||||||
|
freeargv (STATE_PROG_ARGV (sd));
|
||||||
|
STATE_PROG_ARGV (sd) = dupargv (argv);
|
||||||
|
}
|
||||||
|
|
||||||
|
initialize_env (sd, (void *)argv, (void *)env);
|
||||||
|
|
||||||
|
return SIM_RC_OK;
|
||||||
|
}
|
||||||
125
sim/riscv/machs.c
Normal file
125
sim/riscv/machs.c
Normal file
@ -0,0 +1,125 @@
|
|||||||
|
/* RISC-V simulator.
|
||||||
|
|
||||||
|
Copyright (C) 2005-2021 Free Software Foundation, Inc.
|
||||||
|
Contributed by Mike Frysinger.
|
||||||
|
|
||||||
|
This file is part of simulators.
|
||||||
|
|
||||||
|
This program is free software; you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation; either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
This program is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
||||||
|
|
||||||
|
#include "config.h"
|
||||||
|
|
||||||
|
#include "sim-main.h"
|
||||||
|
|
||||||
|
static void
|
||||||
|
riscv_model_init (SIM_CPU *cpu)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
static void
|
||||||
|
riscv_init_cpu (SIM_CPU *cpu)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
static void
|
||||||
|
riscv_prepare_run (SIM_CPU *cpu)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
|
||||||
|
static const SIM_MACH_IMP_PROPERTIES riscv_imp_properties =
|
||||||
|
{
|
||||||
|
sizeof (SIM_CPU),
|
||||||
|
0,
|
||||||
|
};
|
||||||
|
|
||||||
|
#if WITH_TARGET_WORD_BITSIZE >= 32
|
||||||
|
|
||||||
|
static const SIM_MACH rv32i_mach;
|
||||||
|
|
||||||
|
static const SIM_MODEL rv32_models[] =
|
||||||
|
{
|
||||||
|
#define M(ext) { "RV32"#ext, &rv32i_mach, MODEL_RV32##ext, NULL, riscv_model_init },
|
||||||
|
#include "model_list.def"
|
||||||
|
#undef M
|
||||||
|
{ 0, NULL, 0, NULL, NULL, }
|
||||||
|
};
|
||||||
|
|
||||||
|
static const SIM_MACH rv32i_mach =
|
||||||
|
{
|
||||||
|
"rv32i", "riscv:rv32", MACH_RV32I,
|
||||||
|
32, 32, &rv32_models[0], &riscv_imp_properties,
|
||||||
|
riscv_init_cpu,
|
||||||
|
riscv_prepare_run
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if WITH_TARGET_WORD_BITSIZE >= 64
|
||||||
|
|
||||||
|
static const SIM_MACH rv64i_mach;
|
||||||
|
|
||||||
|
static const SIM_MODEL rv64_models[] =
|
||||||
|
{
|
||||||
|
#define M(ext) { "RV64"#ext, &rv64i_mach, MODEL_RV64##ext, NULL, riscv_model_init },
|
||||||
|
#include "model_list.def"
|
||||||
|
#undef M
|
||||||
|
{ 0, NULL, 0, NULL, NULL, }
|
||||||
|
};
|
||||||
|
|
||||||
|
static const SIM_MACH rv64i_mach =
|
||||||
|
{
|
||||||
|
"rv64i", "riscv:rv64", MACH_RV64I,
|
||||||
|
64, 64, &rv64_models[0], &riscv_imp_properties,
|
||||||
|
riscv_init_cpu,
|
||||||
|
riscv_prepare_run
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if WITH_TARGET_WORD_BITSIZE >= 128
|
||||||
|
|
||||||
|
static const SIM_MACH rv128i_mach;
|
||||||
|
|
||||||
|
static const SIM_MODEL rv128_models[] =
|
||||||
|
{
|
||||||
|
#define M(ext) { "RV128"#ext, &rv128i_mach, MODEL_RV128##ext, NULL, riscv_model_init },
|
||||||
|
#include "model_list.def"
|
||||||
|
#undef M
|
||||||
|
{ 0, NULL, 0, NULL, NULL, }
|
||||||
|
};
|
||||||
|
|
||||||
|
static const SIM_MACH rv128i_mach =
|
||||||
|
{
|
||||||
|
"rv128i", "riscv:rv128", MACH_RV128I,
|
||||||
|
128, 128, &rv128_models[0], &riscv_imp_properties,
|
||||||
|
riscv_init_cpu,
|
||||||
|
riscv_prepare_run
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Order matters here. */
|
||||||
|
const SIM_MACH *sim_machs[] =
|
||||||
|
{
|
||||||
|
#if WITH_TARGET_WORD_BITSIZE >= 128
|
||||||
|
&rv128i_mach,
|
||||||
|
#endif
|
||||||
|
#if WITH_TARGET_WORD_BITSIZE >= 64
|
||||||
|
&rv64i_mach,
|
||||||
|
#endif
|
||||||
|
#if WITH_TARGET_WORD_BITSIZE >= 32
|
||||||
|
&rv32i_mach,
|
||||||
|
#endif
|
||||||
|
NULL
|
||||||
|
};
|
||||||
45
sim/riscv/machs.h
Normal file
45
sim/riscv/machs.h
Normal file
@ -0,0 +1,45 @@
|
|||||||
|
/* RISC-V simulator.
|
||||||
|
|
||||||
|
Copyright (C) 2005-2021 Free Software Foundation, Inc.
|
||||||
|
Contributed by Mike Frysinger.
|
||||||
|
|
||||||
|
This file is part of simulators.
|
||||||
|
|
||||||
|
This program is free software; you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation; either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
This program is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
||||||
|
|
||||||
|
#ifndef RISCV_SIM_MACHS_H
|
||||||
|
#define RISCV_SIM_MACHS_H
|
||||||
|
|
||||||
|
typedef enum model_type {
|
||||||
|
#define M(ext) MODEL_RV32##ext,
|
||||||
|
#include "model_list.def"
|
||||||
|
#undef M
|
||||||
|
#define M(ext) MODEL_RV64##ext,
|
||||||
|
#include "model_list.def"
|
||||||
|
#undef M
|
||||||
|
#define M(ext) MODEL_RV128##ext,
|
||||||
|
#include "model_list.def"
|
||||||
|
#undef M
|
||||||
|
MODEL_MAX
|
||||||
|
} MODEL_TYPE;
|
||||||
|
|
||||||
|
typedef enum mach_attr {
|
||||||
|
MACH_BASE,
|
||||||
|
MACH_RV32I,
|
||||||
|
MACH_RV64I,
|
||||||
|
MACH_RV128I,
|
||||||
|
MACH_MAX
|
||||||
|
} MACH_ATTR;
|
||||||
|
|
||||||
|
#endif
|
||||||
9
sim/riscv/model_list.def
Normal file
9
sim/riscv/model_list.def
Normal file
@ -0,0 +1,9 @@
|
|||||||
|
M(G)
|
||||||
|
M(I)
|
||||||
|
M(IM)
|
||||||
|
M(IMA)
|
||||||
|
M(IA)
|
||||||
|
M(E)
|
||||||
|
M(EM)
|
||||||
|
M(EMA)
|
||||||
|
M(EA)
|
||||||
1150
sim/riscv/sim-main.c
Normal file
1150
sim/riscv/sim-main.c
Normal file
File diff suppressed because it is too large
Load Diff
86
sim/riscv/sim-main.h
Normal file
86
sim/riscv/sim-main.h
Normal file
@ -0,0 +1,86 @@
|
|||||||
|
/* RISC-V simulator.
|
||||||
|
|
||||||
|
Copyright (C) 2005-2021 Free Software Foundation, Inc.
|
||||||
|
Contributed by Mike Frysinger.
|
||||||
|
|
||||||
|
This file is part of simulators.
|
||||||
|
|
||||||
|
This program is free software; you can redistribute it and/or modify
|
||||||
|
it under the terms of the GNU General Public License as published by
|
||||||
|
the Free Software Foundation; either version 3 of the License, or
|
||||||
|
(at your option) any later version.
|
||||||
|
|
||||||
|
This program is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
GNU General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU General Public License
|
||||||
|
along with this program. If not, see <http://www.gnu.org/licenses/>. */
|
||||||
|
|
||||||
|
#ifndef SIM_MAIN_H
|
||||||
|
#define SIM_MAIN_H
|
||||||
|
|
||||||
|
#include "sim-basics.h"
|
||||||
|
#include "machs.h"
|
||||||
|
#include "sim-base.h"
|
||||||
|
|
||||||
|
struct _sim_cpu {
|
||||||
|
union {
|
||||||
|
unsigned_word regs[32];
|
||||||
|
struct {
|
||||||
|
/* These are the ABI names. */
|
||||||
|
unsigned_word zero, ra, sp, gp, tp;
|
||||||
|
unsigned_word t0, t1, t2;
|
||||||
|
unsigned_word s0, s1;
|
||||||
|
unsigned_word a0, a1, a2, a3, a4, a5, a6, a7;
|
||||||
|
unsigned_word s2, s3, s4, s5, s6, s7, s8, s9, s10, s11;
|
||||||
|
unsigned_word t3, t4, t5, t6;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
union {
|
||||||
|
unsigned_word fpregs[32];
|
||||||
|
struct {
|
||||||
|
/* These are the ABI names. */
|
||||||
|
unsigned_word ft0, ft1, ft2, ft3, ft4, ft5, ft6, ft7;
|
||||||
|
unsigned_word fs0, fs1;
|
||||||
|
unsigned_word fa0, fa1, fa2, fa3, fa4, fa5, fa6, fa7;
|
||||||
|
unsigned_word fs2, fs3, fs4, fs5, fs6, fs7, fs8, fs9, fs10, fs11;
|
||||||
|
unsigned_word ft8, ft9, ft10, ft11;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
sim_cia pc;
|
||||||
|
|
||||||
|
struct {
|
||||||
|
#define DECLARE_CSR(name, ...) unsigned_word name;
|
||||||
|
#include "opcode/riscv-opc.h"
|
||||||
|
#undef DECLARE_CSR
|
||||||
|
} csr;
|
||||||
|
|
||||||
|
sim_cpu_base base;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct atomic_mem_reserved_list;
|
||||||
|
struct atomic_mem_reserved_list {
|
||||||
|
struct atomic_mem_reserved_list *next;
|
||||||
|
address_word addr;
|
||||||
|
};
|
||||||
|
|
||||||
|
struct sim_state {
|
||||||
|
sim_cpu *cpu[MAX_NR_PROCESSORS];
|
||||||
|
struct atomic_mem_reserved_list *amo_reserved_list;
|
||||||
|
|
||||||
|
/* ... simulator specific members ... */
|
||||||
|
sim_state_base base;
|
||||||
|
};
|
||||||
|
|
||||||
|
extern void step_once (SIM_CPU *);
|
||||||
|
extern void initialize_cpu (SIM_DESC, SIM_CPU *, int);
|
||||||
|
extern void initialize_env (SIM_DESC, const char * const *argv,
|
||||||
|
const char * const *env);
|
||||||
|
|
||||||
|
#define DEFAULT_MEM_SIZE (64 * 1024 * 1024)
|
||||||
|
|
||||||
|
#define RISCV_XLEN(cpu) MACH_WORD_BITSIZE (CPU_MACH (cpu))
|
||||||
|
|
||||||
|
#endif
|
||||||
@ -1,3 +1,7 @@
|
|||||||
|
2021-02-04 Mike Frysinger <vapier@gentoo.org>
|
||||||
|
|
||||||
|
* riscv/: New directory.
|
||||||
|
|
||||||
2021-01-15 Mike Frysinger <vapier@gentoo.org>
|
2021-01-15 Mike Frysinger <vapier@gentoo.org>
|
||||||
|
|
||||||
* Makefile.in (site.exp): Delete tool setting.
|
* Makefile.in (site.exp): Delete tool setting.
|
||||||
|
|||||||
3
sim/testsuite/riscv/ChangeLog
Normal file
3
sim/testsuite/riscv/ChangeLog
Normal file
@ -0,0 +1,3 @@
|
|||||||
|
2021-02-04 Mike Frysinger <vapier@gentoo.org>
|
||||||
|
|
||||||
|
* allinsn.exp, pass.s, testutils.inc: New files.
|
||||||
15
sim/testsuite/riscv/allinsn.exp
Normal file
15
sim/testsuite/riscv/allinsn.exp
Normal file
@ -0,0 +1,15 @@
|
|||||||
|
# RISC-V simulator testsuite.
|
||||||
|
|
||||||
|
if [istarget riscv*-*] {
|
||||||
|
# all machines
|
||||||
|
set all_machs "riscv"
|
||||||
|
|
||||||
|
foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.s]] {
|
||||||
|
# If we're only testing specific files and this isn't one of them,
|
||||||
|
# skip it.
|
||||||
|
if ![runtest_file_p $runtests $src] {
|
||||||
|
continue
|
||||||
|
}
|
||||||
|
run_sim_test $src $all_machs
|
||||||
|
}
|
||||||
|
}
|
||||||
7
sim/testsuite/riscv/pass.s
Normal file
7
sim/testsuite/riscv/pass.s
Normal file
@ -0,0 +1,7 @@
|
|||||||
|
# check that the sim doesn't die immediately.
|
||||||
|
# mach: riscv
|
||||||
|
|
||||||
|
.include "testutils.inc"
|
||||||
|
|
||||||
|
start
|
||||||
|
pass
|
||||||
52
sim/testsuite/riscv/testutils.inc
Normal file
52
sim/testsuite/riscv/testutils.inc
Normal file
@ -0,0 +1,52 @@
|
|||||||
|
# MACRO: exit
|
||||||
|
.macro exit nr
|
||||||
|
li a0, \nr
|
||||||
|
# The exit utility function.
|
||||||
|
li a7, 93;
|
||||||
|
# Trigger OS trap.
|
||||||
|
ecall;
|
||||||
|
.endm
|
||||||
|
|
||||||
|
# MACRO: pass
|
||||||
|
# Write 'pass' to stdout and quit.
|
||||||
|
.macro pass
|
||||||
|
# syscall write().
|
||||||
|
li a7, 64;
|
||||||
|
# Use stdout.
|
||||||
|
li a0, 1;
|
||||||
|
# Point to the string.
|
||||||
|
lla a1, 1f;
|
||||||
|
# Number of bytes to write.
|
||||||
|
li a2, 5;
|
||||||
|
# Trigger OS trap.
|
||||||
|
ecall;
|
||||||
|
exit 0;
|
||||||
|
.data
|
||||||
|
1: .asciz "pass\n"
|
||||||
|
.endm
|
||||||
|
|
||||||
|
# MACRO: fail
|
||||||
|
# Write 'fail' to stdout and quit.
|
||||||
|
.macro fail
|
||||||
|
# syscall write().
|
||||||
|
li a7, 64;
|
||||||
|
# Use stdout.
|
||||||
|
li a0, 1;
|
||||||
|
# Point to the string.
|
||||||
|
lla a1, 1f;
|
||||||
|
# Number of bytes to write.
|
||||||
|
li a2, 5;
|
||||||
|
# Trigger OS trap.
|
||||||
|
ecall;
|
||||||
|
exit 0;
|
||||||
|
.data
|
||||||
|
1: .asciz "fail\n"
|
||||||
|
.endm
|
||||||
|
|
||||||
|
# MACRO: start
|
||||||
|
# All assembler tests should start with a call to "start".
|
||||||
|
.macro start
|
||||||
|
.text
|
||||||
|
.global _start
|
||||||
|
_start:
|
||||||
|
.endm
|
||||||
Reference in New Issue
Block a user