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* simops.c (OP_6401): postdecrement on r15 is OK, remove exception.

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(OP_6601): Ditto.
PR 13498
This commit is contained in:
Fred Fish
1997-10-11 16:50:05 +00:00
parent 93f0cb6975
commit b83093ff79
1 changed files with 3 additions and 15 deletions
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18
sim/d10v/simops.c
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@ -132,7 +132,7 @@ trace_input_func (name, in1, in2, in3)
filename = (const char *)0; filename = (const char *)0;
functionname = (const char *)0; functionname = (const char *)0;
linenumber = 0; linenumber = 0;
if (bfd_find_nearest_line (exec_bfd, text, (struct symbol_cache_entry **)0, byte_pc - text_start, if (bfd_find_nearest_line (prog_bfd, text, (struct symbol_cache_entry **)0, byte_pc - text_start,
&filename, &functionname, &linenumber)) &filename, &functionname, &linenumber))
{ {
p = buf; p = buf;
@ -1179,12 +1179,6 @@ void
OP_6401 () OP_6401 ()
{ {
trace_input ("ld", OP_REG_OUTPUT, OP_POSTDEC, OP_VOID); trace_input ("ld", OP_REG_OUTPUT, OP_POSTDEC, OP_VOID);
if ( OP[1] == 15 )
{
(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n");
State.exception = SIGILL;
return;
}
State.regs[OP[0]] = RW (State.regs[OP[1]]); State.regs[OP[0]] = RW (State.regs[OP[1]]);
INC_ADDR(State.regs[OP[1]],-2); INC_ADDR(State.regs[OP[1]],-2);
trace_output (OP_REG); trace_output (OP_REG);
@ -1226,12 +1220,6 @@ OP_6601 ()
{ {
uint16 addr = State.regs[OP[1]]; uint16 addr = State.regs[OP[1]];
trace_input ("ld2w", OP_REG_OUTPUT, OP_POSTDEC, OP_VOID); trace_input ("ld2w", OP_REG_OUTPUT, OP_POSTDEC, OP_VOID);
if ( OP[1] == 15 )
{
(*d10v_callback->printf_filtered) (d10v_callback, "ERROR: cannot post-decrement register r15 (SP).\n");
State.exception = SIGILL;
return;
}
State.regs[OP[0]] = RW (addr); State.regs[OP[0]] = RW (addr);
State.regs[OP[0]+1] = RW (addr+2); State.regs[OP[0]+1] = RW (addr+2);
INC_ADDR(State.regs[OP[1]],-4); INC_ADDR(State.regs[OP[1]],-4);
@ -1949,9 +1937,9 @@ OP_4201 ()
trace_input ("rachi", OP_REG_OUTPUT, OP_ACCUM, OP_CONSTANT3); trace_input ("rachi", OP_REG_OUTPUT, OP_ACCUM, OP_CONSTANT3);
State.F1 = State.F0; State.F1 = State.F0;
if (shift >=0) if (shift >=0)
tmp = SEXT44 (State.a[1]) << shift; tmp = SEXT44 (State.a[OP[1]]) << shift;
else else
tmp = SEXT44 (State.a[1]) >> -shift; tmp = SEXT44 (State.a[OP[1]]) >> -shift;
tmp += 0x8000; tmp += 0x8000;
if (tmp > MAX32) if (tmp > MAX32)