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x86: have preprocessor expand macros

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There's no point having i386-gen's set_bitfield() to handle any aliases,
now that we pass the opcode table through the C preprocessor anyway.
This commit is contained in:
Jan Beulich
2021-02-16 11:27:40 +01:00
parent c2f1204d1f
commit b818b220e4
3 changed files with 11 additions and 11 deletions
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6
opcodes/ChangeLog
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@ -1,3 +1,9 @@
2021-02-16 Jan Beulich <jbeulich@suse.com>
* i386-gen.c (set_bitfield): Don't look for CpuFP, Mmword, nor
Oword.
* i386-opc.tbl (CpuFP, Mmword, Oword): Define.
2021-02-15 Andreas Krebbel <krebbel@linux.ibm.com> 2021-02-15 Andreas Krebbel <krebbel@linux.ibm.com>
* s390-mkopc.c (main): Accept arch14 as cpu string. * s390-mkopc.c (main): Accept arch14 as cpu string.

11
opcodes/i386-gen.c
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@ -971,17 +971,6 @@ set_bitfield (char *f, bitfield *array, int value,
if (*f == '\0') if (*f == '\0')
return; return;
if (strcmp (f, "CpuFP") == 0)
{
set_bitfield("Cpu387", array, value, size, lineno);
set_bitfield("Cpu287", array, value, size, lineno);
f = "Cpu8087";
}
else if (strcmp (f, "Mmword") == 0)
f= "Qword";
else if (strcmp (f, "Oword") == 0)
f= "Xmmword";
for (i = 0; i < size; i++) for (i = 0; i < size; i++)
if (strcasecmp (array[i].name, f) == 0) if (strcasecmp (array[i].name, f) == 0)
{ {

5
opcodes/i386-opc.tbl
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@ -58,6 +58,9 @@
#define RegBND Class=RegBND #define RegBND Class=RegBND
#define Mmword Qword
#define Oword Xmmword
#define JumpByte Jump=JUMP_BYTE #define JumpByte Jump=JUMP_BYTE
#define JumpDword Jump=JUMP_DWORD #define JumpDword Jump=JUMP_DWORD
#define JumpAbsolute Jump=JUMP_ABSOLUTE #define JumpAbsolute Jump=JUMP_ABSOLUTE
@ -106,6 +109,8 @@
// operands may allow to switch from 3-byte to 2-byte VEX encoding. // operands may allow to switch from 3-byte to 2-byte VEX encoding.
#define C StaticRounding #define C StaticRounding
#define CpuFP Cpu387|Cpu287|Cpu8087
### MARKER ### ### MARKER ###
// Move instructions. // Move instructions.