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* mpw-config.in: Add ELF support to mips config, create the

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elf32-target.h file in the object dir.
	* mpw-make.sed: Edit elfXX-target.h refs at beginnings of lines.
This commit is contained in:
Stan Shebs
1996-07-18 18:42:06 +00:00
parent 05a8bf3325
commit b576c7b3d2
3 changed files with 20 additions and 9 deletions
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14
bfd/ChangeLog
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@ -1,3 +1,9 @@
Thu Jul 18 11:36:31 1996 Stan Shebs <shebs@andros.cygnus.com>
* mpw-config.in: Add ELF support to mips config, create the
elf32-target.h file in the object dir.
* mpw-make.sed: Edit elfXX-target.h refs at beginnings of lines.
Wed Jul 17 18:02:32 1996 Kim Knuttila <krk@cygnus.com>
* coff-ppc.c: Redid debug scheme - numerous fprintf's gone.
@ -6,8 +12,8 @@ Wed Jul 17 18:02:32 1996 Kim Knuttila <krk@cygnus.com>
start-sanitize-d10v
Wed Jul 17 14:51:52 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
* Makefile.in (ALL_MACHINES): Add cpu-d10v.o
(BFD32_BACKENDS) Add elf32-d10v.o
* Makefile.in (ALL_MACHINES): Add cpu-d10v.o.
(BFD32_BACKENDS) Add elf32-d10v.o.
* archures.c: Add bfd_d10v_arch.
* bfd-in2.h: Add bfd_d10v_arch.
* config.bfd (d10v-*-*): New target.
@ -17,8 +23,8 @@ start-sanitize-d10v
* elf.c (prep_headers): Added case bfd_arch_d10v.
* elf32-d10v.c: New file.
* libbfd.h: Rebuild.
* reloc.c (BFD_RELOC_D10V_10_PCREL_R, BFD_RELOC_D10V_10_PCREL_L, BFD_RELOC_D10V_18,
BFD_RELOC_D10V_18_PCREL): Define.
* reloc.c (BFD_RELOC_D10V_10_PCREL_R, BFD_RELOC_D10V_10_PCREL_L,
BFD_RELOC_D10V_18, BFD_RELOC_D10V_18_PCREL): Define.
* targets.c (bfd_elf32_d10v_vec): New vector.
end-sanitize-d10v

11
bfd/mpw-config.in
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@ -17,17 +17,17 @@ Else If "{target_canonical}" =~ /powerpc-apple-macos/
Set selvecs '&pmac_xcoff_vec'
Set selarchs "&bfd_powerpc_arch"
Else If "{target_canonical}" =~ /i386-unknown-go32/
Else If "{target_canonical}" =~ /i386-\Option-x-go32/
Set BFD_BACKENDS '"{o}"coff-i386.c.o'
Set defvec i386coff_vec
Set selvecs '&i386coff_vec'
Else If "{target_canonical}" =~ /mips-\Option-x-\Option-x/
Set BFD_BACKENDS '"{o}"coff-mips.c.o "{o}"ecoff.c.o "{o}"ecofflink.c.o'
Set BFD_BACKENDS '"{o}"coff-mips.c.o "{o}"ecoff.c.o "{o}"ecofflink.c.o "{o}"elf32.c.o "{o}"elf32-mips.c.o "{o}"elflink.c.o'
Set defvec ecoff_big_vec
Set selvecs '&ecoff_big_vec,&ecoff_little_vec'
Set selvecs '&ecoff_big_vec,&ecoff_little_vec,&bfd_elf32_bigmips_vec'
Else If "{target_canonical}" =~ /sh-hitachi-hms/
Else If "{target_canonical}" =~ /sh-\Option-x-hms/
Set BFD_BACKENDS '"{o}"coff-sh.c.o "{o}"cofflink.c.o'
Set defvec shcoff_vec
Set selvecs '&shcoff_vec,&shlcoff_vec'
@ -60,6 +60,9 @@ sed -e 's/@WORDSIZE@/32/' \Option-d
MoveIfChange "{o}"bfd.h-new "{o}"bfd.h
sed -e 's/NN/32/g' "{srcdir}"elfxx-target.h >"{o}"elf32-target.h-new
MoveIfChange "{o}"elf32-target.h-new "{o}"elf32-target.h
# Pre-expand some macros in coffswap.h, so MPW C doesn't choke.
sed -e 's/^ PUT_AOUTHDR_TSIZE (/ bfd_h_put_32 (/' \Option-d

2
bfd/mpw-make.sed
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@ -27,7 +27,9 @@
/bfd/s/"{s}"bfd\.h/"{o}"bfd.h/g
/config/s/"{s}"config\.h/"{o}"config.h/g
/elf32-target/s/"{s}"elf32-target\.h/"{o}"elf32-target.h/g
/elf32-target/s/^elf32-target\.h/"{o}"elf32-target.h/
/elf64-target/s/"{s}"elf64-target\.h/"{o}"elf64-target.h/g
/elf64-target/s/^elf64-target\.h/"{o}"elf64-target.h/
/"{s}"{INCDIR}/s/"{s}"{INCDIR}/"{INCDIR}"/g