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2008-09-26 Florian Krohm <fkrohm@us.ibm.com>
* s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF. (cfxr, cfdr, cfer, clclu): Add esa flag. (sqd): Instruction added. (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF. * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed. 2008-09-26 Andreas Krebbel <krebbel1@de.ibm.com> * gas/s390/esa-g5.d: Adjust according to the s390-opc changes. * gas/s390/esa-g5.s: Likewise. * gas/s390/esa-z990.d: Likewise. * gas/s390/esa-z990.s: Likewise. * gas/s390/zarch-z900.d: Likewise. * gas/s390/zarch-z900.s: Likewise. * gas/s390/zarch-z990.d: Likewise. * gas/s390/zarch-z990.s: Likewise.
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@ -273,7 +273,6 @@ const struct s390_operand s390_operands[] =
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#define INSTR_RRF_U0RF 4, { R_24,U4_16,F_28,0,0,0 } /* e.g. cfebr */
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#define INSTR_RRF_UUFF 4, { F_24,U4_16,F_28,U4_20,0,0 } /* e.g. fidtr */
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#define INSTR_RRF_0UFF 4, { F_24,F_28,U4_20,0,0,0 } /* e.g. ldetr */
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#define INSTR_RRF_FFFU 4, { F_24,F_16,F_28,U4_20,0,0 } /* e.g. qadtr */
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#define INSTR_RRF_FFRU 4, { F_24,F_16,R_28,U4_20,0,0 } /* e.g. rrdtr */
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#define INSTR_RRF_M0RR 4, { R_24,R_28,M_16,0,0,0 } /* e.g. sske */
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#define INSTR_RRF_U0RR 4, { R_24,R_28,U4_16,0,0,0 } /* e.g. clrt */
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@ -378,7 +377,6 @@ const struct s390_operand s390_operands[] =
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#define MASK_RRF_U0RF { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
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#define MASK_RRF_UUFF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
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#define MASK_RRF_0UFF { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 }
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#define MASK_RRF_FFFU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
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#define MASK_RRF_FFRU { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
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#define MASK_RRF_M0RR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
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#define MASK_RRF_U0RR { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
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