mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-10-11 09:56:23 +08:00
Replace --error-explicit-parallel-conflicts with --ignore-parallel-conflitcs.
Add test of parallel constraint checking.
This commit is contained in:
@ -1,3 +1,17 @@
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2003-12-17 Nick Clifton <nickc@redhat.com>
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* config/tc-m32r.c (error_explicit_parallel_conflicts): Rename
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to 'ignore_parallel_conflicts'.
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(md_longopts): Change option names as well.
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(md_parse_option): Separate the warn_explicit and ignore
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parallel conflicts options.
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(md_show_usage): Update descriptions of these options.
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(first_writes_to_seconds_operands): Do not run this check if
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ignoring parallel conflicts.
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(assemble_two_insns): Remove code that checked
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error_explicit_parallel_conflicts.
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* doc/c-m32r.texi: Update descriptions of the options.
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2003-12-16 Dmitry Semyonov <Dmitry.Semyonov@oktet.ru>
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2003-12-16 Dmitry Semyonov <Dmitry.Semyonov@oktet.ru>
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* tc-arm.c (do_adr): Do not adjust pc by -8 if TE_WINCE is
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* tc-arm.c (do_adr): Do not adjust pc by -8 if TE_WINCE is
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@ -116,9 +116,12 @@ static int enable_special_float = 0;
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instruction might have constraint violations. */
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instruction might have constraint violations. */
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static int warn_explicit_parallel_conflicts = 1;
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static int warn_explicit_parallel_conflicts = 1;
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/* Non-zero if the programmer should receive an error message when an
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/* Non-zero if the programmer should not receive any messages about
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explicit parallel instruction might have constraint violations. */
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parallel instruction with potential or real constraint violations.
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static int error_explicit_parallel_conflicts = 1;
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The ability to suppress these messages is intended only for hardware
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vendors testing the chip. It superceedes
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warn_explicit_parallel_conflicts. */
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static int ignore_parallel_conflicts = 0;
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/* Non-zero if insns can be made parallel. */
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/* Non-zero if insns can be made parallel. */
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static int use_parallel = 1;
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static int use_parallel = 1;
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@ -197,22 +200,22 @@ const char *md_shortopts = M32R_SHORTOPTS;
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struct option md_longopts[] =
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struct option md_longopts[] =
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{
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{
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#define OPTION_M32R (OPTION_MD_BASE)
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#define OPTION_M32R (OPTION_MD_BASE)
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#define OPTION_M32RX (OPTION_M32R + 1)
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#define OPTION_M32RX (OPTION_M32R + 1)
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#define OPTION_M32R2 (OPTION_M32RX + 1)
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#define OPTION_M32R2 (OPTION_M32RX + 1)
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#define OPTION_BIG (OPTION_M32R2 + 1)
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#define OPTION_BIG (OPTION_M32R2 + 1)
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#define OPTION_LITTLE (OPTION_BIG + 1)
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#define OPTION_LITTLE (OPTION_BIG + 1)
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#define OPTION_PARALLEL (OPTION_LITTLE + 1)
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#define OPTION_PARALLEL (OPTION_LITTLE + 1)
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#define OPTION_NO_PARALLEL (OPTION_PARALLEL + 1)
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#define OPTION_NO_PARALLEL (OPTION_PARALLEL + 1)
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#define OPTION_WARN_PARALLEL (OPTION_NO_PARALLEL + 1)
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#define OPTION_WARN_PARALLEL (OPTION_NO_PARALLEL + 1)
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#define OPTION_NO_WARN_PARALLEL (OPTION_WARN_PARALLEL + 1)
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#define OPTION_NO_WARN_PARALLEL (OPTION_WARN_PARALLEL + 1)
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#define OPTION_ERROR_PARALLEL (OPTION_NO_WARN_PARALLEL + 1)
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#define OPTION_IGNORE_PARALLEL (OPTION_NO_WARN_PARALLEL + 1)
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#define OPTION_NO_ERROR_PARALLEL (OPTION_ERROR_PARALLEL + 1)
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#define OPTION_NO_IGNORE_PARALLEL (OPTION_IGNORE_PARALLEL + 1)
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#define OPTION_SPECIAL (OPTION_NO_ERROR_PARALLEL + 1)
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#define OPTION_SPECIAL (OPTION_NO_IGNORE_PARALLEL + 1)
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#define OPTION_SPECIAL_M32R (OPTION_SPECIAL + 1)
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#define OPTION_SPECIAL_M32R (OPTION_SPECIAL + 1)
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#define OPTION_SPECIAL_FLOAT (OPTION_SPECIAL_M32R + 1)
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#define OPTION_SPECIAL_FLOAT (OPTION_SPECIAL_M32R + 1)
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#define OPTION_WARN_UNMATCHED (OPTION_SPECIAL_FLOAT + 1)
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#define OPTION_WARN_UNMATCHED (OPTION_SPECIAL_FLOAT + 1)
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#define OPTION_NO_WARN_UNMATCHED (OPTION_WARN_UNMATCHED + 1)
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#define OPTION_NO_WARN_UNMATCHED (OPTION_WARN_UNMATCHED + 1)
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{"m32r", no_argument, NULL, OPTION_M32R},
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{"m32r", no_argument, NULL, OPTION_M32R},
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{"m32rx", no_argument, NULL, OPTION_M32RX},
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{"m32rx", no_argument, NULL, OPTION_M32RX},
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{"m32r2", no_argument, NULL, OPTION_M32R2},
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{"m32r2", no_argument, NULL, OPTION_M32R2},
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@ -226,10 +229,10 @@ struct option md_longopts[] =
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{"Wp", no_argument, NULL, OPTION_WARN_PARALLEL},
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{"Wp", no_argument, NULL, OPTION_WARN_PARALLEL},
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{"no-warn-explicit-parallel-conflicts", no_argument, NULL, OPTION_NO_WARN_PARALLEL},
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{"no-warn-explicit-parallel-conflicts", no_argument, NULL, OPTION_NO_WARN_PARALLEL},
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{"Wnp", no_argument, NULL, OPTION_NO_WARN_PARALLEL},
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{"Wnp", no_argument, NULL, OPTION_NO_WARN_PARALLEL},
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{"error-explicit-parallel-conflicts", no_argument, NULL, OPTION_ERROR_PARALLEL},
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{"ignore-parallel-conflicts", no_argument, NULL, OPTION_IGNORE_PARALLEL},
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{"Ep", no_argument, NULL, OPTION_ERROR_PARALLEL},
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{"Ip", no_argument, NULL, OPTION_IGNORE_PARALLEL},
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{"no-error-explicit-parallel-conflicts", no_argument, NULL, OPTION_NO_ERROR_PARALLEL},
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{"no-ignore-parallel-conflicts", no_argument, NULL, OPTION_NO_IGNORE_PARALLEL},
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{"Enp", no_argument, NULL, OPTION_NO_ERROR_PARALLEL},
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{"nIp", no_argument, NULL, OPTION_NO_IGNORE_PARALLEL},
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{"hidden", no_argument, NULL, OPTION_SPECIAL},
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{"hidden", no_argument, NULL, OPTION_SPECIAL},
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{"bitinst", no_argument, NULL, OPTION_SPECIAL_M32R},
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{"bitinst", no_argument, NULL, OPTION_SPECIAL_M32R},
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{"float", no_argument, NULL, OPTION_SPECIAL_FLOAT},
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{"float", no_argument, NULL, OPTION_SPECIAL_FLOAT},
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@ -318,22 +321,18 @@ md_parse_option (c, arg)
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case OPTION_WARN_PARALLEL:
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case OPTION_WARN_PARALLEL:
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warn_explicit_parallel_conflicts = 1;
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warn_explicit_parallel_conflicts = 1;
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error_explicit_parallel_conflicts = 0;
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break;
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break;
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case OPTION_NO_WARN_PARALLEL:
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case OPTION_NO_WARN_PARALLEL:
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warn_explicit_parallel_conflicts = 0;
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warn_explicit_parallel_conflicts = 0;
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error_explicit_parallel_conflicts = 0;
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break;
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break;
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case OPTION_ERROR_PARALLEL:
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case OPTION_IGNORE_PARALLEL:
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warn_explicit_parallel_conflicts = 1;
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ignore_parallel_conflicts = 1;
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error_explicit_parallel_conflicts = 1;
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break;
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break;
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case OPTION_NO_ERROR_PARALLEL:
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case OPTION_NO_IGNORE_PARALLEL:
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error_explicit_parallel_conflicts = 0;
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ignore_parallel_conflicts = 0;
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warn_explicit_parallel_conflicts = 0;
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break;
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break;
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case OPTION_SPECIAL:
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case OPTION_SPECIAL:
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@ -406,27 +405,27 @@ md_show_usage (stream)
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fprintf (stream, _("\
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fprintf (stream, _("\
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-warn-explicit-parallel-conflicts warn when parallel instructions\n"));
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-warn-explicit-parallel-conflicts warn when parallel instructions\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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violate contraints\n"));
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might violate contraints\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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-no-warn-explicit-parallel-conflicts do not warn when parallel\n"));
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-no-warn-explicit-parallel-conflicts do not warn when parallel\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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instructions violate contraints\n"));
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instructions might violate contraints\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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-Wp synonym for -warn-explicit-parallel-conflicts\n"));
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-Wp synonym for -warn-explicit-parallel-conflicts\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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-Wnp synonym for -no-warn-explicit-parallel-conflicts\n"));
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-Wnp synonym for -no-warn-explicit-parallel-conflicts\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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-error-explicit-parallel-conflicts error when parallel instructions\n"));
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-ignore-parallel-conflicts do not check parallel instructions\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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violate contraints\n"));
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fo contraint violations\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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-no-error-explicit-parallel-conflicts do not error when parallel\n"));
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-no-ignore-parallel-conflicts check parallel instructions for\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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instructions violate contraints\n"));
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contraint violations\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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-Ep synonym for -error-explicit-parallel-conflicts\n"));
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-Ip synonym for -ignore-parallel-conflicts\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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-Enp synonym for -no-error-explicit-parallel-conflicts\n"));
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-nIp synonym for -no-ignore-parallel-conflicts\n"));
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fprintf (stream, _("\
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fprintf (stream, _("\
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-warn-unmatched-high warn when an (s)high reloc has no matching low reloc\n"));
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-warn-unmatched-high warn when an (s)high reloc has no matching low reloc\n"));
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@ -756,6 +755,9 @@ first_writes_to_seconds_operands (a, b, check_outputs)
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const CGEN_OPINST *b_ops = CGEN_INSN_OPERANDS (b->insn);
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const CGEN_OPINST *b_ops = CGEN_INSN_OPERANDS (b->insn);
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int a_index;
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int a_index;
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if (ignore_parallel_conflicts)
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return 0;
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/* If at least one of the instructions takes no operands, then there is
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/* If at least one of the instructions takes no operands, then there is
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nothing to check. There really are instructions without operands,
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nothing to check. There really are instructions without operands,
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eg 'nop'. */
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eg 'nop'. */
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@ -870,7 +872,7 @@ can_make_parallel (a, b)
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abort ();
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abort ();
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if (first_writes_to_seconds_operands (a, b, TRUE))
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if (first_writes_to_seconds_operands (a, b, TRUE))
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return _("Instructions write to the same destination register.");
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return _("instructions write to the same destination register.");
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a_pipe = CGEN_INSN_ATTR_VALUE (a->insn, CGEN_INSN_PIPE);
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a_pipe = CGEN_INSN_ATTR_VALUE (a->insn, CGEN_INSN_PIPE);
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b_pipe = CGEN_INSN_ATTR_VALUE (b->insn, CGEN_INSN_PIPE);
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b_pipe = CGEN_INSN_ATTR_VALUE (b->insn, CGEN_INSN_PIPE);
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@ -1154,17 +1156,13 @@ assemble_two_insns (str, str2, parallel_p)
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if (parallel_p && warn_explicit_parallel_conflicts)
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if (parallel_p && warn_explicit_parallel_conflicts)
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{
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{
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void (* func)(const char *, ...);
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func = error_explicit_parallel_conflicts ? as_bad : as_warn;
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if (first_writes_to_seconds_operands (&first, &second, FALSE))
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if (first_writes_to_seconds_operands (&first, &second, FALSE))
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/* xgettext:c-format */
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/* xgettext:c-format */
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func (_("%s: output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?"), str2);
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as_warn (_("%s: output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?"), str2);
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if (first_writes_to_seconds_operands (&second, &first, FALSE))
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if (first_writes_to_seconds_operands (&second, &first, FALSE))
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/* xgettext:c-format */
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/* xgettext:c-format */
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func (_("%s: output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?"), str2);
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as_warn (_("%s: output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?"), str2);
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}
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}
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if (!parallel_p
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if (!parallel_p
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@ -119,27 +119,26 @@ questionable parallel instructions are encountered.
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This is a shorter synonym for the @emph{-no-warn-explicit-parallel-conflicts}
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This is a shorter synonym for the @emph{-no-warn-explicit-parallel-conflicts}
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option.
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option.
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@item -error-explicit-parallel-conflicts
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@item -ignore-parallel-conflicts
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@cindex @samp{-error-explicit-parallel-conflicts} option, M32RX
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@cindex @samp{-ignore-parallel-conflicts} option, M32RX
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This option performs the same thing as the
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This option tells the assembler's to stop checking parallel
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@emph{-warn-explicit-parallel-conflicts} expcept that instead of
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instructions for contraint violations. This ability is provided for
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warning messages being produced, error messages will be produced. If
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hardware vendors testing chip designs and should not be used under
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any error messages are generated then GAS will not produce an output
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normal circumstances.
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file.
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@item -no-error-explicit-parallel-conflicts
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@item -no-ignore-parallel-conflicts
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@cindex @samp{-no-error-explicit-parallel-conflicts} option, M32RX
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@cindex @samp{-no-ignore-parallel-conflicts} option, M32RX
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This option disables a previously enabled
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This option restores the assembler's default behaviour of checking
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@emph{-error-explicit-parallel-conflicts} option.
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parallel instructions to detect constraint violations.
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@item -Ep
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@item -Ip
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@cindex @samp{-Ep} option, M32RX
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@cindex @samp{-Ip} option, M32RX
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This is a shorter synonym for the @emph{-error-explicit-parallel-conflicts}
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This is a shorter synonym for the @emph{-ignore-parallel-conflicts}
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option.
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option.
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@item -Enp
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@item -nIp
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@cindex @samp{-Enp} option, M32RX
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@cindex @samp{-nIp} option, M32RX
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This is a shorter synonym for the @emph{-no-error-explicit-parallel-conflicts}
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This is a shorter synonym for the @emph{-no-ignore-parallel-conflicts}
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option.
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option.
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@item -warn-unmatched-high
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@item -warn-unmatched-high
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@ -1,3 +1,9 @@
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2003-12-17 Nick Clifton <nickc@redhat.com>
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* gas/m32r/error.exp: Add parallel.s
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* gas/m32r/parallel.s: New file: Test warning and error
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messages produced for parallel conflicts.
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2003-12-16 Nick Clifton <nickc@redhat.com>
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2003-12-16 Nick Clifton <nickc@redhat.com>
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* gas/arm/arm.exp: Run special versions of the inst, ldconst,
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* gas/arm/arm.exp: Run special versions of the inst, ldconst,
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@ -9,6 +9,7 @@ if [istarget m32r-*-*] {
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dg-runtest "$srcdir/$subdir/wrongsize.s" "" ""
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dg-runtest "$srcdir/$subdir/wrongsize.s" "" ""
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dg-runtest "$srcdir/$subdir/interfere.s" "" ""
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dg-runtest "$srcdir/$subdir/interfere.s" "" ""
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dg-runtest "$srcdir/$subdir/outofrange.s" "" ""
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dg-runtest "$srcdir/$subdir/outofrange.s" "" ""
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dg-runtest "$srcdir/$subdir/parallel.s" "" ""
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dg-finish
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dg-finish
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14
gas/testsuite/gas/m32r/parallel.s
Normal file
14
gas/testsuite/gas/m32r/parallel.s
Normal file
@ -0,0 +1,14 @@
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; Test error messages where parallel instructions conflict
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; { dg-options "-m32rx" }
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; { dg-do assemble { target m32r-*-* } }
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.text
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.global parallel
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parallel:
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mv r1,r0 || mv r2,r1
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; { dg-warning "output of 1st instruction" "parallel output overlaps input" { target *-*-* } { 9 } }
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mv r1,r0 || mv r0,r2
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; { dg-warning "output of 2nd instruction" "parallel output overlaps input" { target *-*-* } { 11 } }
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mv r1,r0 || mv r1,r2
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; { dg-error "instructions write to the same destination register" "parallel overlapping destinations" { target *-*-* } { 13 } }
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