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gas/

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* config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
	for system registers.

gas/testsuite/

	* gas/aarch64/illegal.l: Delete the error message for
	msr S3_1_C13_C15_1,x7.
	* gas/aarch64/sysreg.s: Add new tests.
	* gas/aarch64/sysreg.d: Update.
This commit is contained in:
Yufeng Zhang
2013-02-28 18:51:05 +00:00
parent 589bc9275a
commit aeebdd9b12
6 changed files with 26 additions and 4 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
gas/ChangeLog
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@ -1,3 +1,8 @@
2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
* config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
for system registers.
2013-02-27 DJ Delorie <dj@redhat.com> 2013-02-27 DJ Delorie <dj@redhat.com>
* config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE. * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.

10
gas/config/tc-aarch64.c
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@ -3197,10 +3197,14 @@ parse_sys_reg (char **str, struct hash_control *sys_regs, int imple_defined_p)
unsigned int op0, op1, cn, cm, op2; unsigned int op0, op1, cn, cm, op2;
if (sscanf (buf, "s%u_%u_c%u_c%u_%u", &op0, &op1, &cn, &cm, &op2) != 5) if (sscanf (buf, "s%u_%u_c%u_c%u_%u", &op0, &op1, &cn, &cm, &op2) != 5)
return PARSE_FAIL; return PARSE_FAIL;
/* Register access is encoded as follows: /* The architecture specifies the encoding space for implementation
defined registers as:
op0 op1 CRn CRm op2 op0 op1 CRn CRm op2
11 xxx 1x11 xxxx xxx. */ 11 xxx 1x11 xxxx xxx
if (op0 != 3 || op1 > 7 || (cn | 0x4) != 0xf || cm > 15 || op2 > 7) For convenience GAS accepts a wider encoding space, as follows:
op0 op1 CRn CRm op2
11 xxx xxxx xxxx xxx */
if (op0 != 3 || op1 > 7 || cn > 15 || cm > 15 || op2 > 7)
return PARSE_FAIL; return PARSE_FAIL;
value = (op0 << 14) | (op1 << 11) | (cn << 7) | (cm << 3) | op2; value = (op0 << 14) | (op1 << 11) | (cn << 7) | (cm << 3) | op2;
} }

7
gas/testsuite/ChangeLog
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@ -1,3 +1,10 @@
2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
* gas/aarch64/illegal.l: Delete the error message for
msr S3_1_C13_C15_1,x7.
* gas/aarch64/sysreg.s: Add new tests.
* gas/aarch64/sysreg.d: Update.
2013-02-19 H.J. Lu <hongjiu.lu@intel.com> 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
PR gas/15159 PR gas/15159

1
gas/testsuite/gas/aarch64/illegal.l
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@ -520,7 +520,6 @@
[^:]*:496: Error: .*`str x1,page_table_count' [^:]*:496: Error: .*`str x1,page_table_count'
[^:]*:498: Error: .*`prfm PLDL3KEEP,\[x9,x15,sxtx#2\]' [^:]*:498: Error: .*`prfm PLDL3KEEP,\[x9,x15,sxtx#2\]'
[^:]*:500: Error: .*`mrs x5,S1_0_C13_C8_0' [^:]*:500: Error: .*`mrs x5,S1_0_C13_C8_0'
[^:]*:501: Error: .*`msr S3_1_C13_C15_1,x7'
[^:]*:502: Error: .*`msr S3_1_C11_C15_-1,x7' [^:]*:502: Error: .*`msr S3_1_C11_C15_-1,x7'
[^:]*:503: Error: .*`msr S3_1_11_15_1,x7' [^:]*:503: Error: .*`msr S3_1_11_15_1,x7'
[^:]*:506: Error: .*`movi w1,#15' [^:]*:506: Error: .*`movi w1,#15'

3
gas/testsuite/gas/aarch64/sysreg.d
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@ -23,3 +23,6 @@ Disassembly of section \.text:
3c: d5380260 mrs x0, id_isar3_el1 3c: d5380260 mrs x0, id_isar3_el1
40: d5380280 mrs x0, id_isar4_el1 40: d5380280 mrs x0, id_isar4_el1
44: d53802a0 mrs x0, id_isar5_el1 44: d53802a0 mrs x0, id_isar5_el1
48: d538cc00 mrs x0, s3_0_c12_c12_0
4c: d5384600 mrs x0, s3_0_c4_c6_0
50: d5184600 msr s3_0_c4_c6_0, x0

4
gas/testsuite/gas/aarch64/sysreg.s
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@ -22,3 +22,7 @@
mrs x0, id_isar3_el1 mrs x0, id_isar3_el1
mrs x0, id_isar4_el1 mrs x0, id_isar4_el1
mrs x0, id_isar5_el1 mrs x0, id_isar5_el1
mrs x0, s3_0_c12_c12_0
mrs x0, s3_0_c4_c6_0
msr s3_0_c4_c6_0, x0