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* gas/cfi/cfi.exp: Remove redundant ppc test. Exclude
powerpc-pe targets from cfi-common-6 test. * gas/cfi/cfi-ppc-1.d: Use objdump to handle pe. * gas/cfi/cfi-ppc-1.s: Don't use .type and .size. * gas/ppc/ppc.exp: Exclude various tests for powerpc-pe. Exclude vle tests for le targets. * gas/ppc/476.d, * gas/ppc/476.s: Update for le output. Use .text rather than section directive with quotes. * gas/ppc/a2.d, * gas/ppc/a2.s: Likewise. * gas/ppc/altivec.d, * gas/ppc/altivec.s: Likewise. * gas/ppc/altivec2.d: Likewise. * gas/ppc/altivec_and_spe.d: Likewise. * gas/ppc/astest.d: Likewise. * gas/ppc/astest2.d: Likewise. * gas/ppc/astest2_64.d: Likewise. * gas/ppc/astest64.d: Likewise. * gas/ppc/booke.d, * gas/ppc/booke.s: Likewise. * gas/ppc/cell.d, * gas/ppc/cell.s: Likewise. * gas/ppc/common.d, * gas/ppc/common.s: Likewise. * gas/ppc/e500.d, * gas/ppc/e500.s: Likewise. * gas/ppc/e500mc.d, * gas/ppc/e500mc.s: Likewise. * gas/ppc/e500mc64_nop.d, * gas/ppc/e500mc64_nop.s: Likewise. * gas/ppc/e5500_nop.d, * gas/ppc/e5500_nop.s: Likewise. * gas/ppc/e6500.d, * gas/ppc/e6500.s: Likewise. * gas/ppc/e6500_nop.d, * gas/ppc/e6500_nop.s: Likewise. * gas/ppc/machine.d: Likewise. * gas/ppc/power4.d, * gas/ppc/power4.s: Likewise. * gas/ppc/power4_32.d, * gas/ppc/power4_32.s: Likewise. * gas/ppc/power6.d, * gas/ppc/power6.s: Likewise. * gas/ppc/power7.d, * gas/ppc/power7.s: Likewise. * gas/ppc/ppc750ps.d, * gas/ppc/ppc750ps.s: Likewise. * gas/ppc/regnames.d: Likewise. * gas/ppc/simpshft.d: Likewise. * gas/ppc/test1elf32.d: Likewise. * gas/ppc/test1elf64.d: Likewise. * gas/ppc/titan.d, * gas/ppc/titan.s: Likewise. * gas/ppc/vle-reloc.s: Likewise. * gas/ppc/vle-simple-1.s: Likewise. * gas/ppc/vle-simple-2.s: Likewise. * gas/ppc/vle-simple-3.s: Likewise. * gas/ppc/vle-simple-4.s: Likewise. * gas/ppc/vle-simple-5.s: Likewise. * gas/ppc/vle-simple-6.s: Likewise. * gas/ppc/vle.s: Likewise. * gas/ppc/vsx.d, * gas/ppc/vsx.s: Likewise.
This commit is contained in:
Alan Modra
@ -1,3 +1,51 @@
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2012-10-29 Alan Modra <amodra@gmail.com>
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* gas/cfi/cfi.exp: Remove redundant ppc test. Exclude
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powerpc-pe targets from cfi-common-6 test.
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* gas/cfi/cfi-ppc-1.d: Use objdump to handle pe.
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* gas/cfi/cfi-ppc-1.s: Don't use .type and .size.
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* gas/ppc/ppc.exp: Exclude various tests for powerpc-pe. Exclude
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vle tests for le targets.
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* gas/ppc/476.d, * gas/ppc/476.s: Update for le output. Use .text
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rather than section directive with quotes.
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* gas/ppc/a2.d, * gas/ppc/a2.s: Likewise.
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* gas/ppc/altivec.d, * gas/ppc/altivec.s: Likewise.
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* gas/ppc/altivec2.d: Likewise.
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* gas/ppc/altivec_and_spe.d: Likewise.
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* gas/ppc/astest.d: Likewise.
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* gas/ppc/astest2.d: Likewise.
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* gas/ppc/astest2_64.d: Likewise.
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* gas/ppc/astest64.d: Likewise.
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* gas/ppc/booke.d, * gas/ppc/booke.s: Likewise.
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* gas/ppc/cell.d, * gas/ppc/cell.s: Likewise.
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* gas/ppc/common.d, * gas/ppc/common.s: Likewise.
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* gas/ppc/e500.d, * gas/ppc/e500.s: Likewise.
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* gas/ppc/e500mc.d, * gas/ppc/e500mc.s: Likewise.
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* gas/ppc/e500mc64_nop.d, * gas/ppc/e500mc64_nop.s: Likewise.
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* gas/ppc/e5500_nop.d, * gas/ppc/e5500_nop.s: Likewise.
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* gas/ppc/e6500.d, * gas/ppc/e6500.s: Likewise.
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* gas/ppc/e6500_nop.d, * gas/ppc/e6500_nop.s: Likewise.
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* gas/ppc/machine.d: Likewise.
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* gas/ppc/power4.d, * gas/ppc/power4.s: Likewise.
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* gas/ppc/power4_32.d, * gas/ppc/power4_32.s: Likewise.
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* gas/ppc/power6.d, * gas/ppc/power6.s: Likewise.
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* gas/ppc/power7.d, * gas/ppc/power7.s: Likewise.
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* gas/ppc/ppc750ps.d, * gas/ppc/ppc750ps.s: Likewise.
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* gas/ppc/regnames.d: Likewise.
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* gas/ppc/simpshft.d: Likewise.
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* gas/ppc/test1elf32.d: Likewise.
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* gas/ppc/test1elf64.d: Likewise.
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* gas/ppc/titan.d, * gas/ppc/titan.s: Likewise.
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* gas/ppc/vle-reloc.s: Likewise.
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* gas/ppc/vle-simple-1.s: Likewise.
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* gas/ppc/vle-simple-2.s: Likewise.
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* gas/ppc/vle-simple-3.s: Likewise.
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* gas/ppc/vle-simple-4.s: Likewise.
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* gas/ppc/vle-simple-5.s: Likewise.
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* gas/ppc/vle-simple-6.s: Likewise.
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* gas/ppc/vle.s: Likewise.
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* gas/ppc/vsx.d, * gas/ppc/vsx.s: Likewise.
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2012-10-27 James Lemke <jwlemke@codesourcery.com>
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2012-10-27 James Lemke <jwlemke@codesourcery.com>
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* gas/m68k/all.exp: Exclude pr11676 for fido-*-*.
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* gas/m68k/all.exp: Exclude pr11676 for fido-*-*.
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@ -1,7 +1,9 @@
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#readelf: -wf
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#objdump: -Wf
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#name: CFI on ppc
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#name: CFI on ppc
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#as: -a32
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#as: -a32
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.*
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Contents of the .eh_frame section:
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Contents of the .eh_frame section:
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00000000 00000010 00000000 CIE
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00000000 00000010 00000000 CIE
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@ -10,7 +12,7 @@ Contents of the .eh_frame section:
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Code alignment factor: [24]
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Code alignment factor: [24]
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Data alignment factor: -4
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Data alignment factor: -4
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Return address column: 65
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Return address column: 65
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Augmentation data: 1b
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Augmentation data: [01]b
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DW_CFA_def_cfa: r1 ofs 0
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DW_CFA_def_cfa: r1 ofs 0
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@ -4,7 +4,6 @@
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.text
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.text
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.align 2
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.align 2
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.globl foo
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.globl foo
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.type foo, @function
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foo:
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foo:
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.cfi_startproc
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.cfi_startproc
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stwu 1,-48(1)
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stwu 1,-48(1)
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@ -42,4 +41,3 @@ foo:
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addi 1,1,48
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addi 1,1,48
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blr
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blr
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.cfi_endproc
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.cfi_endproc
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.size foo, .-foo
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@ -44,7 +44,7 @@ if { [istarget "i*86-*-*"] || [istarget "x86_64-*-*"] } then {
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run_dump_test "cfi-alpha-2"
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run_dump_test "cfi-alpha-2"
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run_dump_test "cfi-alpha-3"
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run_dump_test "cfi-alpha-3"
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} elseif { [istarget ppc*-*-*] || [istarget powerpc*-*-*] } then {
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} elseif { [istarget powerpc*-*-*] } then {
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run_dump_test "cfi-ppc-1"
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run_dump_test "cfi-ppc-1"
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} elseif { [istarget s390*-*-*] } then {
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} elseif { [istarget s390*-*-*] } then {
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@ -100,8 +100,9 @@ if { ![istarget "hppa64*-*"] } then {
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# This test uses .subsection/.previous which are elf-specific.
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# This test uses .subsection/.previous which are elf-specific.
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run_dump_test "cfi-common-5"
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run_dump_test "cfi-common-5"
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}
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}
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# MIPS doesn't support PC relative cfi directives.
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# Some targets don't support PC relative cfi directives
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if { ![istarget "mips*-*"] } then {
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if { ![istarget "mips*-*"] &&
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!([istarget powerpc*-*-*] && [is_pecoff_format]) } then {
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run_dump_test "cfi-common-6"
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run_dump_test "cfi-common-6"
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}
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}
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run_dump_test "cfi-common-7"
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run_dump_test "cfi-common-7"
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@ -2,496 +2,496 @@
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#as: -a32 -m476
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#as: -a32 -m476
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#name: PowerPC 476 instructions
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#name: PowerPC 476 instructions
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.*: +file format elf32-powerpc.*
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.*
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Disassembly of section \.text:
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Disassembly of section \.text:
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0+00 <ppc476>:
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0+00 <ppc476>:
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0: 7c 64 2a 14 add r3,r4,r5
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0: (7c 64 2a 14|14 2a 64 7c) add r3,r4,r5
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4: 7c 64 2a 15 add\. r3,r4,r5
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4: (7c 64 2a 15|15 2a 64 7c) add\. r3,r4,r5
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8: 7c 64 28 14 addc r3,r4,r5
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8: (7c 64 28 14|14 28 64 7c) addc r3,r4,r5
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c: 7c 64 28 15 addc\. r3,r4,r5
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c: (7c 64 28 15|15 28 64 7c) addc\. r3,r4,r5
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10: 7c 64 2c 14 addco r3,r4,r5
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10: (7c 64 2c 14|14 2c 64 7c) addco r3,r4,r5
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14: 7c 64 2c 15 addco\. r3,r4,r5
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14: (7c 64 2c 15|15 2c 64 7c) addco\. r3,r4,r5
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18: 7c 64 29 14 adde r3,r4,r5
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18: (7c 64 29 14|14 29 64 7c) adde r3,r4,r5
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1c: 7c 64 29 15 adde\. r3,r4,r5
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1c: (7c 64 29 15|15 29 64 7c) adde\. r3,r4,r5
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20: 7c 64 2d 14 addeo r3,r4,r5
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20: (7c 64 2d 14|14 2d 64 7c) addeo r3,r4,r5
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24: 7c 64 2d 15 addeo\. r3,r4,r5
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24: (7c 64 2d 15|15 2d 64 7c) addeo\. r3,r4,r5
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28: 38 64 ff 80 addi r3,r4,-128
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28: (38 64 ff 80|80 ff 64 38) addi r3,r4,-128
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2c: 30 64 ff 80 addic r3,r4,-128
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2c: (30 64 ff 80|80 ff 64 30) addic r3,r4,-128
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30: 34 64 ff 80 addic\. r3,r4,-128
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30: (34 64 ff 80|80 ff 64 34) addic\. r3,r4,-128
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34: 3c 64 ff 80 addis r3,r4,-128
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34: (3c 64 ff 80|80 ff 64 3c) addis r3,r4,-128
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38: 7c 64 01 d4 addme r3,r4
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38: (7c 64 01 d4|d4 01 64 7c) addme r3,r4
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3c: 7c 64 01 d5 addme\. r3,r4
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3c: (7c 64 01 d5|d5 01 64 7c) addme\. r3,r4
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40: 7c 64 05 d4 addmeo r3,r4
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40: (7c 64 05 d4|d4 05 64 7c) addmeo r3,r4
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44: 7c 64 05 d5 addmeo\. r3,r4
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44: (7c 64 05 d5|d5 05 64 7c) addmeo\. r3,r4
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48: 7c 64 2e 14 addo r3,r4,r5
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48: (7c 64 2e 14|14 2e 64 7c) addo r3,r4,r5
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4c: 7c 64 2e 15 addo\. r3,r4,r5
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4c: (7c 64 2e 15|15 2e 64 7c) addo\. r3,r4,r5
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50: 7c 64 01 94 addze r3,r4
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50: (7c 64 01 94|94 01 64 7c) addze r3,r4
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54: 7c 64 01 95 addze\. r3,r4
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54: (7c 64 01 95|95 01 64 7c) addze\. r3,r4
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58: 7c 64 05 94 addzeo r3,r4
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58: (7c 64 05 94|94 05 64 7c) addzeo r3,r4
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5c: 7c 64 05 95 addzeo\. r3,r4
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5c: (7c 64 05 95|95 05 64 7c) addzeo\. r3,r4
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60: 7c 83 28 38 and r3,r4,r5
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60: (7c 83 28 38|38 28 83 7c) and r3,r4,r5
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64: 7c 83 28 39 and\. r3,r4,r5
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64: (7c 83 28 39|39 28 83 7c) and\. r3,r4,r5
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68: 7d cd 78 78 andc r13,r14,r15
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68: (7d cd 78 78|78 78 cd 7d) andc r13,r14,r15
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6c: 7e 30 90 79 andc\. r16,r17,r18
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6c: (7e 30 90 79|79 90 30 7e) andc\. r16,r17,r18
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70: 70 83 de ad andi\. r3,r4,57005
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70: (70 83 de ad|ad de 83 70) andi\. r3,r4,57005
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74: 74 83 de ad andis\. r3,r4,57005
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74: (74 83 de ad|ad de 83 74) andis\. r3,r4,57005
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78: 48 00 00 02 ba 0 <ppc476>
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78: (48 00 00 02|02 00 00 48) ba 0 <ppc476>
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7c: 40 01 00 00 bdnzf gt,7c <ppc476\+0x7c>
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7c: (40 01 00 00|00 00 01 40) bdnzf gt,7c <ppc476\+0x7c>
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80: 40 85 00 02 blea cr1,0 <ppc476>
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80: (40 85 00 02|02 00 85 40) blea cr1,0 <ppc476>
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84: 4d 80 04 20 bltctr
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84: (4d 80 04 20|20 04 80 4d) bltctr
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88: 4c 8a 04 20 bnectr cr2
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88: (4c 8a 04 20|20 04 8a 4c) bnectr cr2
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8c: 4c 86 04 20 bnectr cr1
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8c: (4c 86 04 20|20 04 86 4c) bnectr cr1
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90: 4c 86 04 20 bnectr cr1
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90: (4c 86 04 20|20 04 86 4c) bnectr cr1
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94: 4d 80 04 21 bltctrl
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94: (4d 80 04 21|21 04 80 4d) bltctrl
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98: 4c 8a 04 21 bnectrl cr2
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98: (4c 8a 04 21|21 04 8a 4c) bnectrl cr2
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9c: 4c 86 04 21 bnectrl cr1
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9c: (4c 86 04 21|21 04 86 4c) bnectrl cr1
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a0: 4c 86 04 21 bnectrl cr1
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a0: (4c 86 04 21|21 04 86 4c) bnectrl cr1
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a4: 40 43 00 01 bdzfl so,a4 <ppc476\+0xa4>
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a4: (40 43 00 01|01 00 43 40) bdzfl so,a4 <ppc476\+0xa4>
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a8: 4d 80 00 20 bltlr
|
a8: (4d 80 00 20|20 00 80 4d) bltlr
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ac: 4c 8a 00 20 bnelr cr2
|
ac: (4c 8a 00 20|20 00 8a 4c) bnelr cr2
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b0: 4c 86 00 20 bnelr cr1
|
b0: (4c 86 00 20|20 00 86 4c) bnelr cr1
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b4: 4c 86 00 20 bnelr cr1
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b4: (4c 86 00 20|20 00 86 4c) bnelr cr1
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b8: 4d 80 00 21 bltlrl
|
b8: (4d 80 00 21|21 00 80 4d) bltlrl
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bc: 4c 8a 00 21 bnelrl cr2
|
bc: (4c 8a 00 21|21 00 8a 4c) bnelrl cr2
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c0: 4c 86 00 21 bnelrl cr1
|
c0: (4c 86 00 21|21 00 86 4c) bnelrl cr1
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c4: 4c 86 00 21 bnelrl cr1
|
c4: (4c 86 00 21|21 00 86 4c) bnelrl cr1
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c8: 48 00 00 00 b c8 <ppc476\+0xc8>
|
c8: (48 00 00 00|00 00 00 48) b c8 <ppc476\+0xc8>
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cc: 48 00 00 01 bl cc <ppc476\+0xcc>
|
cc: (48 00 00 01|01 00 00 48) bl cc <ppc476\+0xcc>
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d0: 54 83 00 36 rlwinm r3,r4,0,0,27
|
d0: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27
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d4: 7c 03 20 00 cmpw r3,r4
|
d4: (7c 03 20 00|00 20 03 7c) cmpw r3,r4
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d8: 7f 83 20 00 cmpw cr7,r3,r4
|
d8: (7f 83 20 00|00 20 83 7f) cmpw cr7,r3,r4
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dc: 7c 83 2b f8 cmpb r3,r4,r5
|
dc: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5
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e0: 7c 83 2b f8 cmpb r3,r4,r5
|
e0: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5
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e4: 2c 03 ff 59 cmpwi r3,-167
|
e4: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167
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e8: 2f 83 ff 59 cmpwi cr7,r3,-167
|
e8: (2f 83 ff 59|59 ff 83 2f) cmpwi cr7,r3,-167
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ec: 7c 03 20 40 cmplw r3,r4
|
ec: (7c 03 20 40|40 20 03 7c) cmplw r3,r4
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f0: 7f 83 20 40 cmplw cr7,r3,r4
|
f0: (7f 83 20 40|40 20 83 7f) cmplw cr7,r3,r4
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f4: 28 03 00 a7 cmplwi r3,167
|
f4: (28 03 00 a7|a7 00 03 28) cmplwi r3,167
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f8: 2b 83 00 a7 cmplwi cr7,r3,167
|
f8: (2b 83 00 a7|a7 00 83 2b) cmplwi cr7,r3,167
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fc: 7c 03 20 40 cmplw r3,r4
|
fc: (7c 03 20 40|40 20 03 7c) cmplw r3,r4
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100: 28 03 00 a7 cmplwi r3,167
|
100: (28 03 00 a7|a7 00 03 28) cmplwi r3,167
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104: 7c 03 20 00 cmpw r3,r4
|
104: (7c 03 20 00|00 20 03 7c) cmpw r3,r4
|
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108: 2c 03 ff 59 cmpwi r3,-167
|
108: (2c 03 ff 59|59 ff 03 2c) cmpwi r3,-167
|
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10c: 7d 6a 00 34 cntlzw r10,r11
|
10c: (7d 6a 00 34|34 00 6a 7d) cntlzw r10,r11
|
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110: 7d 6a 00 35 cntlzw\. r10,r11
|
110: (7d 6a 00 35|35 00 6a 7d) cntlzw\. r10,r11
|
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114: 4c 85 32 02 crand 4\*cr1\+lt,4\*cr1\+gt,4\*cr1\+eq
|
114: (4c 85 32 02|02 32 85 4c) crand 4\*cr1\+lt,4\*cr1\+gt,4\*cr1\+eq
|
||||||
118: 4c 64 29 02 crandc so,4\*cr1\+lt,4\*cr1\+gt
|
118: (4c 64 29 02|02 29 64 4c) crandc so,4\*cr1\+lt,4\*cr1\+gt
|
||||||
11c: 4c e0 0a 42 creqv 4\*cr1\+so,lt,gt
|
11c: (4c e0 0a 42|42 0a e0 4c) creqv 4\*cr1\+so,lt,gt
|
||||||
120: 4c 22 19 c2 crnand gt,eq,so
|
120: (4c 22 19 c2|c2 19 22 4c) crnand gt,eq,so
|
||||||
124: 4c 01 10 42 crnor lt,gt,eq
|
124: (4c 01 10 42|42 10 01 4c) crnor lt,gt,eq
|
||||||
128: 4c a6 3b 82 cror 4\*cr1\+gt,4\*cr1\+eq,4\*cr1\+so
|
128: (4c a6 3b 82|82 3b a6 4c) cror 4\*cr1\+gt,4\*cr1\+eq,4\*cr1\+so
|
||||||
12c: 4c 43 23 42 crorc eq,so,4\*cr1\+lt
|
12c: (4c 43 23 42|42 23 43 4c) crorc eq,so,4\*cr1\+lt
|
||||||
130: 4c c7 01 82 crxor 4\*cr1\+eq,4\*cr1\+so,lt
|
130: (4c c7 01 82|82 01 c7 4c) crxor 4\*cr1\+eq,4\*cr1\+so,lt
|
||||||
134: 7c 09 55 ec dcba r9,r10
|
134: (7c 09 55 ec|ec 55 09 7c) dcba r9,r10
|
||||||
138: 7c 06 38 ac dcbf r6,r7
|
138: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7
|
||||||
13c: 7c 06 38 ac dcbf r6,r7
|
13c: (7c 06 38 ac|ac 38 06 7c) dcbf r6,r7
|
||||||
140: 7c 06 3b ac dcbi r6,r7
|
140: (7c 06 3b ac|ac 3b 06 7c) dcbi r6,r7
|
||||||
144: 7c 85 33 0c dcblc 4,r5,r6
|
144: (7c 85 33 0c|0c 33 85 7c) dcblc 4,r5,r6
|
||||||
148: 7c 06 38 6c dcbst r6,r7
|
148: (7c 06 38 6c|6c 38 06 7c) dcbst r6,r7
|
||||||
14c: 7c c0 2a 2c dcbt 0,r5,6
|
14c: (7c c0 2a 2c|2c 2a c0 7c) dcbt 0,r5,6
|
||||||
150: 7c 05 32 2c dcbt r5,r6
|
150: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
|
||||||
154: 7c c8 2a 2c dcbt r8,r5,6
|
154: (7c c8 2a 2c|2c 2a c8 7c) dcbt r8,r5,6
|
||||||
158: 7c e8 49 4c dcbtls 7,r8,r9
|
158: (7c e8 49 4c|4c 49 e8 7c) dcbtls 7,r8,r9
|
||||||
15c: 7c e0 31 ec dcbtst 0,r6,7
|
15c: (7c e0 31 ec|ec 31 e0 7c) dcbtst 0,r6,7
|
||||||
160: 7c 06 39 ec dcbtst r6,r7
|
160: (7c 06 39 ec|ec 39 06 7c) dcbtst r6,r7
|
||||||
164: 7c e9 31 ec dcbtst r9,r6,7
|
164: (7c e9 31 ec|ec 31 e9 7c) dcbtst r9,r6,7
|
||||||
168: 7d 4b 61 0c dcbtstls 10,r11,r12
|
168: (7d 4b 61 0c|0c 61 4b 7d) dcbtstls 10,r11,r12
|
||||||
16c: 7c 01 17 ec dcbz r1,r2
|
16c: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2
|
||||||
170: 7c 05 37 ec dcbz r5,r6
|
170: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6
|
||||||
174: 7c 00 03 8c dccci
|
174: (7c 00 03 8c|8c 03 00 7c) dccci
|
||||||
178: 7c 00 03 8c dccci
|
178: (7c 00 03 8c|8c 03 00 7c) dccci
|
||||||
17c: 7c 00 03 8c dccci
|
17c: (7c 00 03 8c|8c 03 00 7c) dccci
|
||||||
180: 7c 20 03 8c dci 1
|
180: (7c 20 03 8c|8c 03 20 7c) dci 1
|
||||||
184: 7d 4b 63 d6 divw r10,r11,r12
|
184: (7d 4b 63 d6|d6 63 4b 7d) divw r10,r11,r12
|
||||||
188: 7d 6c 6b d7 divw\. r11,r12,r13
|
188: (7d 6c 6b d7|d7 6b 6c 7d) divw\. r11,r12,r13
|
||||||
18c: 7d 4b 67 d6 divwo r10,r11,r12
|
18c: (7d 4b 67 d6|d6 67 4b 7d) divwo r10,r11,r12
|
||||||
190: 7d 6c 6f d7 divwo\. r11,r12,r13
|
190: (7d 6c 6f d7|d7 6f 6c 7d) divwo\. r11,r12,r13
|
||||||
194: 7d 4b 63 96 divwu r10,r11,r12
|
194: (7d 4b 63 96|96 63 4b 7d) divwu r10,r11,r12
|
||||||
198: 7d 6c 6b 97 divwu\. r11,r12,r13
|
198: (7d 6c 6b 97|97 6b 6c 7d) divwu\. r11,r12,r13
|
||||||
19c: 7d 4b 67 96 divwuo r10,r11,r12
|
19c: (7d 4b 67 96|96 67 4b 7d) divwuo r10,r11,r12
|
||||||
1a0: 7d 6c 6f 97 divwuo\. r11,r12,r13
|
1a0: (7d 6c 6f 97|97 6f 6c 7d) divwuo\. r11,r12,r13
|
||||||
1a4: 7c 83 28 9c dlmzb r3,r4,r5
|
1a4: (7c 83 28 9c|9c 28 83 7c) dlmzb r3,r4,r5
|
||||||
1a8: 7c 83 28 9d dlmzb\. r3,r4,r5
|
1a8: (7c 83 28 9d|9d 28 83 7c) dlmzb\. r3,r4,r5
|
||||||
1ac: 7d 6a 62 38 eqv r10,r11,r12
|
1ac: (7d 6a 62 38|38 62 6a 7d) eqv r10,r11,r12
|
||||||
1b0: 7d 6a 62 39 eqv\. r10,r11,r12
|
1b0: (7d 6a 62 39|39 62 6a 7d) eqv\. r10,r11,r12
|
||||||
1b4: 54 83 20 26 rlwinm r3,r4,4,0,19
|
1b4: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19
|
||||||
1b8: 7c 83 07 74 extsb r3,r4
|
1b8: (7c 83 07 74|74 07 83 7c) extsb r3,r4
|
||||||
1bc: 7c 83 07 75 extsb\. r3,r4
|
1bc: (7c 83 07 75|75 07 83 7c) extsb\. r3,r4
|
||||||
1c0: 7c 83 07 34 extsh r3,r4
|
1c0: (7c 83 07 34|34 07 83 7c) extsh r3,r4
|
||||||
1c4: 7c 83 07 35 extsh\. r3,r4
|
1c4: (7c 83 07 35|35 07 83 7c) extsh\. r3,r4
|
||||||
1c8: fe a0 fa 10 fabs f21,f31
|
1c8: (fe a0 fa 10|10 fa a0 fe) fabs f21,f31
|
||||||
1cc: fe a0 fa 11 fabs\. f21,f31
|
1cc: (fe a0 fa 11|11 fa a0 fe) fabs\. f21,f31
|
||||||
1d0: fd 4b 60 2a fadd f10,f11,f12
|
1d0: (fd 4b 60 2a|2a 60 4b fd) fadd f10,f11,f12
|
||||||
1d4: fd 4b 60 2b fadd\. f10,f11,f12
|
1d4: (fd 4b 60 2b|2b 60 4b fd) fadd\. f10,f11,f12
|
||||||
1d8: ed 4b 60 2a fadds f10,f11,f12
|
1d8: (ed 4b 60 2a|2a 60 4b ed) fadds f10,f11,f12
|
||||||
1dc: ed 4b 60 2b fadds\. f10,f11,f12
|
1dc: (ed 4b 60 2b|2b 60 4b ed) fadds\. f10,f11,f12
|
||||||
1e0: fd 40 5e 9c fcfid f10,f11
|
1e0: (fd 40 5e 9c|9c 5e 40 fd) fcfid f10,f11
|
||||||
1e4: fd 40 5e 9d fcfid\. f10,f11
|
1e4: (fd 40 5e 9d|9d 5e 40 fd) fcfid\. f10,f11
|
||||||
1e8: fd 8a 58 40 fcmpo cr3,f10,f11
|
1e8: (fd 8a 58 40|40 58 8a fd) fcmpo cr3,f10,f11
|
||||||
1ec: fd 84 28 00 fcmpu cr3,f4,f5
|
1ec: (fd 84 28 00|00 28 84 fd) fcmpu cr3,f4,f5
|
||||||
1f0: fd 4b 60 10 fcpsgn f10,f11,f12
|
1f0: (fd 4b 60 10|10 60 4b fd) fcpsgn f10,f11,f12
|
||||||
1f4: fd 4b 60 11 fcpsgn\. f10,f11,f12
|
1f4: (fd 4b 60 11|11 60 4b fd) fcpsgn\. f10,f11,f12
|
||||||
1f8: fd 40 5e 5c fctid f10,f11
|
1f8: (fd 40 5e 5c|5c 5e 40 fd) fctid f10,f11
|
||||||
1fc: fd 40 5e 5d fctid\. f10,f11
|
1fc: (fd 40 5e 5d|5d 5e 40 fd) fctid\. f10,f11
|
||||||
200: fd 40 5e 5e fctidz f10,f11
|
200: (fd 40 5e 5e|5e 5e 40 fd) fctidz f10,f11
|
||||||
204: fd 40 5e 5f fctidz\. f10,f11
|
204: (fd 40 5e 5f|5f 5e 40 fd) fctidz\. f10,f11
|
||||||
208: fd 40 58 1c fctiw f10,f11
|
208: (fd 40 58 1c|1c 58 40 fd) fctiw f10,f11
|
||||||
20c: fd 40 58 1d fctiw\. f10,f11
|
20c: (fd 40 58 1d|1d 58 40 fd) fctiw\. f10,f11
|
||||||
210: fd 40 58 1e fctiwz f10,f11
|
210: (fd 40 58 1e|1e 58 40 fd) fctiwz f10,f11
|
||||||
214: fd 40 58 1f fctiwz\. f10,f11
|
214: (fd 40 58 1f|1f 58 40 fd) fctiwz\. f10,f11
|
||||||
218: fd 4b 60 24 fdiv f10,f11,f12
|
218: (fd 4b 60 24|24 60 4b fd) fdiv f10,f11,f12
|
||||||
21c: fd 4b 60 25 fdiv\. f10,f11,f12
|
21c: (fd 4b 60 25|25 60 4b fd) fdiv\. f10,f11,f12
|
||||||
220: ed 4b 60 24 fdivs f10,f11,f12
|
220: (ed 4b 60 24|24 60 4b ed) fdivs f10,f11,f12
|
||||||
224: ed 4b 60 25 fdivs\. f10,f11,f12
|
224: (ed 4b 60 25|25 60 4b ed) fdivs\. f10,f11,f12
|
||||||
228: fd 4b 6b 3a fmadd f10,f11,f12,f13
|
228: (fd 4b 6b 3a|3a 6b 4b fd) fmadd f10,f11,f12,f13
|
||||||
22c: fd 4b 6b 3b fmadd\. f10,f11,f12,f13
|
22c: (fd 4b 6b 3b|3b 6b 4b fd) fmadd\. f10,f11,f12,f13
|
||||||
230: ed 4b 6b 3a fmadds f10,f11,f12,f13
|
230: (ed 4b 6b 3a|3a 6b 4b ed) fmadds f10,f11,f12,f13
|
||||||
234: ed 4b 6b 3b fmadds\. f10,f11,f12,f13
|
234: (ed 4b 6b 3b|3b 6b 4b ed) fmadds\. f10,f11,f12,f13
|
||||||
238: fc 60 20 90 fmr f3,f4
|
238: (fc 60 20 90|90 20 60 fc) fmr f3,f4
|
||||||
23c: fc 60 20 91 fmr\. f3,f4
|
23c: (fc 60 20 91|91 20 60 fc) fmr\. f3,f4
|
||||||
240: fd 4b 6b 38 fmsub f10,f11,f12,f13
|
240: (fd 4b 6b 38|38 6b 4b fd) fmsub f10,f11,f12,f13
|
||||||
244: fd 4b 6b 39 fmsub\. f10,f11,f12,f13
|
244: (fd 4b 6b 39|39 6b 4b fd) fmsub\. f10,f11,f12,f13
|
||||||
248: ed 4b 6b 38 fmsubs f10,f11,f12,f13
|
248: (ed 4b 6b 38|38 6b 4b ed) fmsubs f10,f11,f12,f13
|
||||||
24c: ed 4b 6b 39 fmsubs\. f10,f11,f12,f13
|
24c: (ed 4b 6b 39|39 6b 4b ed) fmsubs\. f10,f11,f12,f13
|
||||||
250: fd 4b 03 32 fmul f10,f11,f12
|
250: (fd 4b 03 32|32 03 4b fd) fmul f10,f11,f12
|
||||||
254: fd 4b 03 33 fmul\. f10,f11,f12
|
254: (fd 4b 03 33|33 03 4b fd) fmul\. f10,f11,f12
|
||||||
258: ed 4b 03 32 fmuls f10,f11,f12
|
258: (ed 4b 03 32|32 03 4b ed) fmuls f10,f11,f12
|
||||||
25c: ed 4b 03 33 fmuls\. f10,f11,f12
|
25c: (ed 4b 03 33|33 03 4b ed) fmuls\. f10,f11,f12
|
||||||
260: fe 80 f1 10 fnabs f20,f30
|
260: (fe 80 f1 10|10 f1 80 fe) fnabs f20,f30
|
||||||
264: fe 80 f1 11 fnabs\. f20,f30
|
264: (fe 80 f1 11|11 f1 80 fe) fnabs\. f20,f30
|
||||||
268: fc 60 20 50 fneg f3,f4
|
268: (fc 60 20 50|50 20 60 fc) fneg f3,f4
|
||||||
26c: fc 60 20 51 fneg\. f3,f4
|
26c: (fc 60 20 51|51 20 60 fc) fneg\. f3,f4
|
||||||
270: fd 4b 6b 3e fnmadd f10,f11,f12,f13
|
270: (fd 4b 6b 3e|3e 6b 4b fd) fnmadd f10,f11,f12,f13
|
||||||
274: fd 4b 6b 3f fnmadd\. f10,f11,f12,f13
|
274: (fd 4b 6b 3f|3f 6b 4b fd) fnmadd\. f10,f11,f12,f13
|
||||||
278: ed 4b 6b 3e fnmadds f10,f11,f12,f13
|
278: (ed 4b 6b 3e|3e 6b 4b ed) fnmadds f10,f11,f12,f13
|
||||||
27c: ed 4b 6b 3f fnmadds\. f10,f11,f12,f13
|
27c: (ed 4b 6b 3f|3f 6b 4b ed) fnmadds\. f10,f11,f12,f13
|
||||||
280: fd 4b 6b 3c fnmsub f10,f11,f12,f13
|
280: (fd 4b 6b 3c|3c 6b 4b fd) fnmsub f10,f11,f12,f13
|
||||||
284: fd 4b 6b 3d fnmsub\. f10,f11,f12,f13
|
284: (fd 4b 6b 3d|3d 6b 4b fd) fnmsub\. f10,f11,f12,f13
|
||||||
288: ed 4b 6b 3c fnmsubs f10,f11,f12,f13
|
288: (ed 4b 6b 3c|3c 6b 4b ed) fnmsubs f10,f11,f12,f13
|
||||||
28c: ed 4b 6b 3d fnmsubs\. f10,f11,f12,f13
|
28c: (ed 4b 6b 3d|3d 6b 4b ed) fnmsubs\. f10,f11,f12,f13
|
||||||
290: fd c0 78 30 fre f14,f15
|
290: (fd c0 78 30|30 78 c0 fd) fre f14,f15
|
||||||
294: fd c0 78 31 fre\. f14,f15
|
294: (fd c0 78 31|31 78 c0 fd) fre\. f14,f15
|
||||||
298: ed c0 78 30 fres f14,f15
|
298: (ed c0 78 30|30 78 c0 ed) fres f14,f15
|
||||||
29c: ed c0 78 31 fres\. f14,f15
|
29c: (ed c0 78 31|31 78 c0 ed) fres\. f14,f15
|
||||||
2a0: fd 40 5b d0 frim f10,f11
|
2a0: (fd 40 5b d0|d0 5b 40 fd) frim f10,f11
|
||||||
2a4: fd 40 5b d1 frim\. f10,f11
|
2a4: (fd 40 5b d1|d1 5b 40 fd) frim\. f10,f11
|
||||||
2a8: fd 40 5b 10 frin f10,f11
|
2a8: (fd 40 5b 10|10 5b 40 fd) frin f10,f11
|
||||||
2ac: fd 40 5b 11 frin\. f10,f11
|
2ac: (fd 40 5b 11|11 5b 40 fd) frin\. f10,f11
|
||||||
2b0: fd 40 5b 90 frip f10,f11
|
2b0: (fd 40 5b 90|90 5b 40 fd) frip f10,f11
|
||||||
2b4: fd 40 5b 91 frip\. f10,f11
|
2b4: (fd 40 5b 91|91 5b 40 fd) frip\. f10,f11
|
||||||
2b8: fd 40 5b 50 friz f10,f11
|
2b8: (fd 40 5b 50|50 5b 40 fd) friz f10,f11
|
||||||
2bc: fd 40 5b 51 friz\. f10,f11
|
2bc: (fd 40 5b 51|51 5b 40 fd) friz\. f10,f11
|
||||||
2c0: fc c0 38 18 frsp f6,f7
|
2c0: (fc c0 38 18|18 38 c0 fc) frsp f6,f7
|
||||||
2c4: fd 00 48 19 frsp\. f8,f9
|
2c4: (fd 00 48 19|19 48 00 fd) frsp\. f8,f9
|
||||||
2c8: fd c0 78 34 frsqrte f14,f15
|
2c8: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15
|
||||||
2cc: fd c0 78 35 frsqrte\. f14,f15
|
2cc: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15
|
||||||
2d0: ed c0 78 34 frsqrtes f14,f15
|
2d0: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15
|
||||||
2d4: ed c0 78 35 frsqrtes\. f14,f15
|
2d4: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15
|
||||||
2d8: fd 4b 6b 2e fsel f10,f11,f12,f13
|
2d8: (fd 4b 6b 2e|2e 6b 4b fd) fsel f10,f11,f12,f13
|
||||||
2dc: fd 4b 6b 2f fsel\. f10,f11,f12,f13
|
2dc: (fd 4b 6b 2f|2f 6b 4b fd) fsel\. f10,f11,f12,f13
|
||||||
2e0: fd 40 58 2c fsqrt f10,f11
|
2e0: (fd 40 58 2c|2c 58 40 fd) fsqrt f10,f11
|
||||||
2e4: fd 40 58 2d fsqrt\. f10,f11
|
2e4: (fd 40 58 2d|2d 58 40 fd) fsqrt\. f10,f11
|
||||||
2e8: ed 40 58 2c fsqrts f10,f11
|
2e8: (ed 40 58 2c|2c 58 40 ed) fsqrts f10,f11
|
||||||
2ec: ed 40 58 2d fsqrts\. f10,f11
|
2ec: (ed 40 58 2d|2d 58 40 ed) fsqrts\. f10,f11
|
||||||
2f0: fd 4b 60 28 fsub f10,f11,f12
|
2f0: (fd 4b 60 28|28 60 4b fd) fsub f10,f11,f12
|
||||||
2f4: fd 4b 60 29 fsub\. f10,f11,f12
|
2f4: (fd 4b 60 29|29 60 4b fd) fsub\. f10,f11,f12
|
||||||
2f8: ed 4b 60 28 fsubs f10,f11,f12
|
2f8: (ed 4b 60 28|28 60 4b ed) fsubs f10,f11,f12
|
||||||
2fc: ed 4b 60 29 fsubs\. f10,f11,f12
|
2fc: (ed 4b 60 29|29 60 4b ed) fsubs\. f10,f11,f12
|
||||||
300: 7c 03 27 ac icbi r3,r4
|
300: (7c 03 27 ac|ac 27 03 7c) icbi r3,r4
|
||||||
304: 7e 11 91 cc icblc 16,r17,r18
|
304: (7e 11 91 cc|cc 91 11 7e) icblc 16,r17,r18
|
||||||
308: 7c a8 48 2c icbt 5,r8,r9
|
308: (7c a8 48 2c|2c 48 a8 7c) icbt 5,r8,r9
|
||||||
30c: 7d ae 7b cc icbtls 13,r14,r15
|
30c: (7d ae 7b cc|cc 7b ae 7d) icbtls 13,r14,r15
|
||||||
310: 7c 00 07 8c iccci
|
310: (7c 00 07 8c|8c 07 00 7c) iccci
|
||||||
314: 7c 00 07 8c iccci
|
314: (7c 00 07 8c|8c 07 00 7c) iccci
|
||||||
318: 7c 00 07 8c iccci
|
318: (7c 00 07 8c|8c 07 00 7c) iccci
|
||||||
31c: 7c 20 07 8c ici 1
|
31c: (7c 20 07 8c|8c 07 20 7c) ici 1
|
||||||
320: 7c 03 27 cc icread r3,r4
|
320: (7c 03 27 cc|cc 27 03 7c) icread r3,r4
|
||||||
324: 50 83 65 36 rlwimi r3,r4,12,20,27
|
324: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27
|
||||||
328: 7c 43 27 1e isel r2,r3,r4,28
|
328: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28
|
||||||
32c: 4c 00 01 2c isync
|
32c: (4c 00 01 2c|2c 01 00 4c) isync
|
||||||
330: 89 21 00 00 lbz r9,0\(r1\)
|
330: (89 21 00 00|00 00 21 89) lbz r9,0\(r1\)
|
||||||
334: 8d 41 00 01 lbzu r10,1\(r1\)
|
334: (8d 41 00 01|01 00 41 8d) lbzu r10,1\(r1\)
|
||||||
338: 7e 95 b0 ee lbzux r20,r21,r22
|
338: (7e 95 b0 ee|ee b0 95 7e) lbzux r20,r21,r22
|
||||||
33c: 7c 64 28 ae lbzx r3,r4,r5
|
33c: (7c 64 28 ae|ae 28 64 7c) lbzx r3,r4,r5
|
||||||
340: ca a1 00 08 lfd f21,8\(r1\)
|
340: (ca a1 00 08|08 00 a1 ca) lfd f21,8\(r1\)
|
||||||
344: ce c1 00 10 lfdu f22,16\(r1\)
|
344: (ce c1 00 10|10 00 c1 ce) lfdu f22,16\(r1\)
|
||||||
348: 7e 95 b4 ee lfdux f20,r21,r22
|
348: (7e 95 b4 ee|ee b4 95 7e) lfdux f20,r21,r22
|
||||||
34c: 7d ae 7c ae lfdx f13,r14,r15
|
34c: (7d ae 7c ae|ae 7c ae 7d) lfdx f13,r14,r15
|
||||||
350: 7d 43 26 ae lfiwax f10,r3,r4
|
350: (7d 43 26 ae|ae 26 43 7d) lfiwax f10,r3,r4
|
||||||
354: c2 61 00 00 lfs f19,0\(r1\)
|
354: (c2 61 00 00|00 00 61 c2) lfs f19,0\(r1\)
|
||||||
358: c6 81 00 04 lfsu f20,4\(r1\)
|
358: (c6 81 00 04|04 00 81 c6) lfsu f20,4\(r1\)
|
||||||
35c: 7d 4b 64 6e lfsux f10,r11,r12
|
35c: (7d 4b 64 6e|6e 64 4b 7d) lfsux f10,r11,r12
|
||||||
360: 7d 4b 64 2e lfsx f10,r11,r12
|
360: (7d 4b 64 2e|2e 64 4b 7d) lfsx f10,r11,r12
|
||||||
364: a9 e1 00 06 lha r15,6\(r1\)
|
364: (a9 e1 00 06|06 00 e1 a9) lha r15,6\(r1\)
|
||||||
368: ae 01 00 08 lhau r16,8\(r1\)
|
368: (ae 01 00 08|08 00 01 ae) lhau r16,8\(r1\)
|
||||||
36c: 7d 2a 5a ee lhaux r9,r10,r11
|
36c: (7d 2a 5a ee|ee 5a 2a 7d) lhaux r9,r10,r11
|
||||||
370: 7d 2a 5a ae lhax r9,r10,r11
|
370: (7d 2a 5a ae|ae 5a 2a 7d) lhax r9,r10,r11
|
||||||
374: 7c 64 2e 2c lhbrx r3,r4,r5
|
374: (7c 64 2e 2c|2c 2e 64 7c) lhbrx r3,r4,r5
|
||||||
378: a1 a1 00 00 lhz r13,0\(r1\)
|
378: (a1 a1 00 00|00 00 a1 a1) lhz r13,0\(r1\)
|
||||||
37c: a5 c1 00 02 lhzu r14,2\(r1\)
|
37c: (a5 c1 00 02|02 00 c1 a5) lhzu r14,2\(r1\)
|
||||||
380: 7e 96 c2 6e lhzux r20,r22,r24
|
380: (7e 96 c2 6e|6e c2 96 7e) lhzux r20,r22,r24
|
||||||
384: 7e f8 ca 2e lhzx r23,r24,r25
|
384: (7e f8 ca 2e|2e ca f8 7e) lhzx r23,r24,r25
|
||||||
388: b8 61 ff f0 lmw r3,-16\(r1\)
|
388: (b8 61 ff f0|f0 ff 61 b8) lmw r3,-16\(r1\)
|
||||||
38c: 7c a4 84 aa lswi r5,r4,16
|
38c: (7c a4 84 aa|aa 84 a4 7c) lswi r5,r4,16
|
||||||
390: 7c 64 2c 2a lswx r3,r4,r5
|
390: (7c 64 2c 2a|2a 2c 64 7c) lswx r3,r4,r5
|
||||||
394: 7c 64 28 28 lwarx r3,r4,r5
|
394: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5
|
||||||
398: 7c 64 28 28 lwarx r3,r4,r5
|
398: (7c 64 28 28|28 28 64 7c) lwarx r3,r4,r5
|
||||||
39c: 7c 64 28 29 lwarx r3,r4,r5,1
|
39c: (7c 64 28 29|29 28 64 7c) lwarx r3,r4,r5,1
|
||||||
3a0: 7c 64 2c 2c lwbrx r3,r4,r5
|
3a0: (7c 64 2c 2c|2c 2c 64 7c) lwbrx r3,r4,r5
|
||||||
3a4: 80 c7 00 00 lwz r6,0\(r7\)
|
3a4: (80 c7 00 00|00 00 c7 80) lwz r6,0\(r7\)
|
||||||
3a8: 84 61 00 10 lwzu r3,16\(r1\)
|
3a8: (84 61 00 10|10 00 61 84) lwzu r3,16\(r1\)
|
||||||
3ac: 7c 64 28 6e lwzux r3,r4,r5
|
3ac: (7c 64 28 6e|6e 28 64 7c) lwzux r3,r4,r5
|
||||||
3b0: 7c 64 28 2e lwzx r3,r4,r5
|
3b0: (7c 64 28 2e|2e 28 64 7c) lwzx r3,r4,r5
|
||||||
3b4: 10 64 29 58 macchw r3,r4,r5
|
3b4: (10 64 29 58|58 29 64 10) macchw r3,r4,r5
|
||||||
3b8: 10 64 29 59 macchw\. r3,r4,r5
|
3b8: (10 64 29 59|59 29 64 10) macchw\. r3,r4,r5
|
||||||
3bc: 10 64 2d 58 macchwo r3,r4,r5
|
3bc: (10 64 2d 58|58 2d 64 10) macchwo r3,r4,r5
|
||||||
3c0: 10 64 2d 59 macchwo\. r3,r4,r5
|
3c0: (10 64 2d 59|59 2d 64 10) macchwo\. r3,r4,r5
|
||||||
3c4: 10 64 29 d8 macchws r3,r4,r5
|
3c4: (10 64 29 d8|d8 29 64 10) macchws r3,r4,r5
|
||||||
3c8: 10 64 29 d9 macchws\. r3,r4,r5
|
3c8: (10 64 29 d9|d9 29 64 10) macchws\. r3,r4,r5
|
||||||
3cc: 10 64 2d d8 macchwso r3,r4,r5
|
3cc: (10 64 2d d8|d8 2d 64 10) macchwso r3,r4,r5
|
||||||
3d0: 10 64 2d d9 macchwso\. r3,r4,r5
|
3d0: (10 64 2d d9|d9 2d 64 10) macchwso\. r3,r4,r5
|
||||||
3d4: 10 64 29 98 macchwsu r3,r4,r5
|
3d4: (10 64 29 98|98 29 64 10) macchwsu r3,r4,r5
|
||||||
3d8: 10 64 29 99 macchwsu\. r3,r4,r5
|
3d8: (10 64 29 99|99 29 64 10) macchwsu\. r3,r4,r5
|
||||||
3dc: 10 64 2d 98 macchwsuo r3,r4,r5
|
3dc: (10 64 2d 98|98 2d 64 10) macchwsuo r3,r4,r5
|
||||||
3e0: 10 64 2d 99 macchwsuo\. r3,r4,r5
|
3e0: (10 64 2d 99|99 2d 64 10) macchwsuo\. r3,r4,r5
|
||||||
3e4: 10 64 29 18 macchwu r3,r4,r5
|
3e4: (10 64 29 18|18 29 64 10) macchwu r3,r4,r5
|
||||||
3e8: 10 64 29 19 macchwu\. r3,r4,r5
|
3e8: (10 64 29 19|19 29 64 10) macchwu\. r3,r4,r5
|
||||||
3ec: 10 64 2d 18 macchwuo r3,r4,r5
|
3ec: (10 64 2d 18|18 2d 64 10) macchwuo r3,r4,r5
|
||||||
3f0: 10 64 2d 19 macchwuo\. r3,r4,r5
|
3f0: (10 64 2d 19|19 2d 64 10) macchwuo\. r3,r4,r5
|
||||||
3f4: 10 64 28 58 machhw r3,r4,r5
|
3f4: (10 64 28 58|58 28 64 10) machhw r3,r4,r5
|
||||||
3f8: 10 64 28 59 machhw\. r3,r4,r5
|
3f8: (10 64 28 59|59 28 64 10) machhw\. r3,r4,r5
|
||||||
3fc: 10 64 2c 58 machhwo r3,r4,r5
|
3fc: (10 64 2c 58|58 2c 64 10) machhwo r3,r4,r5
|
||||||
400: 10 64 2c 59 machhwo\. r3,r4,r5
|
400: (10 64 2c 59|59 2c 64 10) machhwo\. r3,r4,r5
|
||||||
404: 10 64 28 d8 machhws r3,r4,r5
|
404: (10 64 28 d8|d8 28 64 10) machhws r3,r4,r5
|
||||||
408: 10 64 28 d9 machhws\. r3,r4,r5
|
408: (10 64 28 d9|d9 28 64 10) machhws\. r3,r4,r5
|
||||||
40c: 10 64 2c d8 machhwso r3,r4,r5
|
40c: (10 64 2c d8|d8 2c 64 10) machhwso r3,r4,r5
|
||||||
410: 10 64 2c d9 machhwso\. r3,r4,r5
|
410: (10 64 2c d9|d9 2c 64 10) machhwso\. r3,r4,r5
|
||||||
414: 10 64 28 98 machhwsu r3,r4,r5
|
414: (10 64 28 98|98 28 64 10) machhwsu r3,r4,r5
|
||||||
418: 10 64 28 99 machhwsu\. r3,r4,r5
|
418: (10 64 28 99|99 28 64 10) machhwsu\. r3,r4,r5
|
||||||
41c: 10 64 2c 98 machhwsuo r3,r4,r5
|
41c: (10 64 2c 98|98 2c 64 10) machhwsuo r3,r4,r5
|
||||||
420: 10 64 2c 99 machhwsuo\. r3,r4,r5
|
420: (10 64 2c 99|99 2c 64 10) machhwsuo\. r3,r4,r5
|
||||||
424: 10 64 28 18 machhwu r3,r4,r5
|
424: (10 64 28 18|18 28 64 10) machhwu r3,r4,r5
|
||||||
428: 10 64 28 19 machhwu\. r3,r4,r5
|
428: (10 64 28 19|19 28 64 10) machhwu\. r3,r4,r5
|
||||||
42c: 10 64 2c 18 machhwuo r3,r4,r5
|
42c: (10 64 2c 18|18 2c 64 10) machhwuo r3,r4,r5
|
||||||
430: 10 64 2c 19 machhwuo\. r3,r4,r5
|
430: (10 64 2c 19|19 2c 64 10) machhwuo\. r3,r4,r5
|
||||||
434: 10 64 2b 58 maclhw r3,r4,r5
|
434: (10 64 2b 58|58 2b 64 10) maclhw r3,r4,r5
|
||||||
438: 10 64 2b 59 maclhw\. r3,r4,r5
|
438: (10 64 2b 59|59 2b 64 10) maclhw\. r3,r4,r5
|
||||||
43c: 10 64 2f 58 maclhwo r3,r4,r5
|
43c: (10 64 2f 58|58 2f 64 10) maclhwo r3,r4,r5
|
||||||
440: 10 64 2f 59 maclhwo\. r3,r4,r5
|
440: (10 64 2f 59|59 2f 64 10) maclhwo\. r3,r4,r5
|
||||||
444: 10 64 2b d8 maclhws r3,r4,r5
|
444: (10 64 2b d8|d8 2b 64 10) maclhws r3,r4,r5
|
||||||
448: 10 64 2b d9 maclhws\. r3,r4,r5
|
448: (10 64 2b d9|d9 2b 64 10) maclhws\. r3,r4,r5
|
||||||
44c: 10 64 2f d8 maclhwso r3,r4,r5
|
44c: (10 64 2f d8|d8 2f 64 10) maclhwso r3,r4,r5
|
||||||
450: 10 64 2f d9 maclhwso\. r3,r4,r5
|
450: (10 64 2f d9|d9 2f 64 10) maclhwso\. r3,r4,r5
|
||||||
454: 10 64 2b 98 maclhwsu r3,r4,r5
|
454: (10 64 2b 98|98 2b 64 10) maclhwsu r3,r4,r5
|
||||||
458: 10 64 2b 99 maclhwsu\. r3,r4,r5
|
458: (10 64 2b 99|99 2b 64 10) maclhwsu\. r3,r4,r5
|
||||||
45c: 10 64 2f 98 maclhwsuo r3,r4,r5
|
45c: (10 64 2f 98|98 2f 64 10) maclhwsuo r3,r4,r5
|
||||||
460: 10 64 2f 99 maclhwsuo\. r3,r4,r5
|
460: (10 64 2f 99|99 2f 64 10) maclhwsuo\. r3,r4,r5
|
||||||
464: 10 64 2b 18 maclhwu r3,r4,r5
|
464: (10 64 2b 18|18 2b 64 10) maclhwu r3,r4,r5
|
||||||
468: 10 64 2b 19 maclhwu\. r3,r4,r5
|
468: (10 64 2b 19|19 2b 64 10) maclhwu\. r3,r4,r5
|
||||||
46c: 10 64 2f 18 maclhwuo r3,r4,r5
|
46c: (10 64 2f 18|18 2f 64 10) maclhwuo r3,r4,r5
|
||||||
470: 10 64 2f 19 maclhwuo\. r3,r4,r5
|
470: (10 64 2f 19|19 2f 64 10) maclhwuo\. r3,r4,r5
|
||||||
474: 7c 00 06 ac mbar
|
474: (7c 00 06 ac|ac 06 00 7c) mbar
|
||||||
478: 7c 00 06 ac mbar
|
478: (7c 00 06 ac|ac 06 00 7c) mbar
|
||||||
47c: 7c 20 06 ac mbar 1
|
47c: (7c 20 06 ac|ac 06 20 7c) mbar 1
|
||||||
480: 4c 04 00 00 mcrf cr0,cr1
|
480: (4c 04 00 00|00 00 04 4c) mcrf cr0,cr1
|
||||||
484: fd 90 00 80 mcrfs cr3,cr4
|
484: (fd 90 00 80|80 00 90 fd) mcrfs cr3,cr4
|
||||||
488: 7d 80 04 00 mcrxr cr3
|
488: (7d 80 04 00|00 04 80 7d) mcrxr cr3
|
||||||
48c: 7c 60 00 26 mfcr r3
|
48c: (7c 60 00 26|26 00 60 7c) mfcr r3
|
||||||
490: 7c 60 00 26 mfcr r3
|
490: (7c 60 00 26|26 00 60 7c) mfcr r3
|
||||||
494: 7c aa 3a 86 mfdcr r5,234
|
494: (7c aa 3a 86|86 3a aa 7c) mfdcr r5,234
|
||||||
498: 7c 64 02 46 mfdcrux r3,r4
|
498: (7c 64 02 46|46 02 64 7c) mfdcrux r3,r4
|
||||||
49c: 7c 85 02 06 mfdcrx r4,r5
|
49c: (7c 85 02 06|06 02 85 7c) mfdcrx r4,r5
|
||||||
4a0: ff c0 04 8e mffs f30
|
4a0: (ff c0 04 8e|8e 04 c0 ff) mffs f30
|
||||||
4a4: ff e0 04 8f mffs\. f31
|
4a4: (ff e0 04 8f|8f 04 e0 ff) mffs\. f31
|
||||||
4a8: 7e 60 00 a6 mfmsr r19
|
4a8: (7e 60 00 a6|a6 00 60 7e) mfmsr r19
|
||||||
4ac: 7c 78 00 26 mfocrf r3,128
|
4ac: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
|
||||||
4b0: 7c 60 22 a6 mfspr r3,128
|
4b0: (7c 60 22 a6|a6 22 60 7c) mfspr r3,128
|
||||||
4b4: 7c 6c 42 e6 mftbl r3
|
4b4: (7c 6c 42 e6|e6 42 6c 7c) mftbl r3
|
||||||
4b8: 7c 00 04 ac msync
|
4b8: (7c 00 04 ac|ac 04 00 7c) msync
|
||||||
4bc: 7c 78 01 20 mtocrf 128,r3
|
4bc: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
|
||||||
4c0: 7c 6f f1 20 mtcr r3
|
4c0: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
|
||||||
4c4: 7d 10 6b 86 mtdcr 432,r8
|
4c4: (7d 10 6b 86|86 6b 10 7d) mtdcr 432,r8
|
||||||
4c8: 7c 83 03 46 mtdcrux r3,r4
|
4c8: (7c 83 03 46|46 03 83 7c) mtdcrux r3,r4
|
||||||
4cc: 7c e6 03 06 mtdcrx r6,r7
|
4cc: (7c e6 03 06|06 03 e6 7c) mtdcrx r6,r7
|
||||||
4d0: fc 60 00 8c mtfsb0 so
|
4d0: (fc 60 00 8c|8c 00 60 fc) mtfsb0 so
|
||||||
4d4: fc 60 00 8d mtfsb0\. so
|
4d4: (fc 60 00 8d|8d 00 60 fc) mtfsb0\. so
|
||||||
4d8: fc 60 00 4c mtfsb1 so
|
4d8: (fc 60 00 4c|4c 00 60 fc) mtfsb1 so
|
||||||
4dc: fc 60 00 4d mtfsb1\. so
|
4dc: (fc 60 00 4d|4d 00 60 fc) mtfsb1\. so
|
||||||
4e0: fc 0c 55 8e mtfsf 6,f10
|
4e0: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10
|
||||||
4e4: fc 0c 55 8e mtfsf 6,f10
|
4e4: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10
|
||||||
4e8: fc 0d 55 8e mtfsf 6,f10,0,1
|
4e8: (fc 0d 55 8e|8e 55 0d fc) mtfsf 6,f10,0,1
|
||||||
4ec: fe 0c 55 8e mtfsf 6,f10,1,0
|
4ec: (fe 0c 55 8e|8e 55 0c fe) mtfsf 6,f10,1,0
|
||||||
4f0: fc 0c 5d 8f mtfsf\. 6,f11
|
4f0: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11
|
||||||
4f4: fc 0c 5d 8f mtfsf\. 6,f11
|
4f4: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf\. 6,f11
|
||||||
4f8: fc 0d 5d 8f mtfsf\. 6,f11,0,1
|
4f8: (fc 0d 5d 8f|8f 5d 0d fc) mtfsf\. 6,f11,0,1
|
||||||
4fc: fe 0c 5d 8f mtfsf\. 6,f11,1,0
|
4fc: (fe 0c 5d 8f|8f 5d 0c fe) mtfsf\. 6,f11,1,0
|
||||||
500: ff 00 01 0c mtfsfi 6,0
|
500: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
|
||||||
504: ff 00 01 0c mtfsfi 6,0
|
504: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
|
||||||
508: ff 00 01 0c mtfsfi 6,0
|
508: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
|
||||||
50c: ff 01 01 0c mtfsfi 6,0,1
|
50c: (ff 01 01 0c|0c 01 01 ff) mtfsfi 6,0,1
|
||||||
510: ff 00 f1 0d mtfsfi\. 6,15
|
510: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15
|
||||||
514: ff 00 f1 0d mtfsfi\. 6,15
|
514: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15
|
||||||
518: ff 00 f1 0d mtfsfi\. 6,15
|
518: (ff 00 f1 0d|0d f1 00 ff) mtfsfi\. 6,15
|
||||||
51c: ff 01 f1 0d mtfsfi\. 6,15,1
|
51c: (ff 01 f1 0d|0d f1 01 ff) mtfsfi\. 6,15,1
|
||||||
520: 7d 40 01 24 mtmsr r10
|
520: (7d 40 01 24|24 01 40 7d) mtmsr r10
|
||||||
524: 7c 78 01 20 mtocrf 128,r3
|
524: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
|
||||||
528: 7c 60 23 a6 mtspr 128,r3
|
528: (7c 60 23 a6|a6 23 60 7c) mtspr 128,r3
|
||||||
52c: 10 64 29 50 mulchw r3,r4,r5
|
52c: (10 64 29 50|50 29 64 10) mulchw r3,r4,r5
|
||||||
530: 10 64 29 51 mulchw\. r3,r4,r5
|
530: (10 64 29 51|51 29 64 10) mulchw\. r3,r4,r5
|
||||||
534: 10 64 29 10 mulchwu r3,r4,r5
|
534: (10 64 29 10|10 29 64 10) mulchwu r3,r4,r5
|
||||||
538: 10 64 29 11 mulchwu\. r3,r4,r5
|
538: (10 64 29 11|11 29 64 10) mulchwu\. r3,r4,r5
|
||||||
53c: 10 64 28 50 mulhhw r3,r4,r5
|
53c: (10 64 28 50|50 28 64 10) mulhhw r3,r4,r5
|
||||||
540: 10 64 28 51 mulhhw\. r3,r4,r5
|
540: (10 64 28 51|51 28 64 10) mulhhw\. r3,r4,r5
|
||||||
544: 10 64 28 10 mulhhwu r3,r4,r5
|
544: (10 64 28 10|10 28 64 10) mulhhwu r3,r4,r5
|
||||||
548: 10 64 28 11 mulhhwu\. r3,r4,r5
|
548: (10 64 28 11|11 28 64 10) mulhhwu\. r3,r4,r5
|
||||||
54c: 7c 64 28 96 mulhw r3,r4,r5
|
54c: (7c 64 28 96|96 28 64 7c) mulhw r3,r4,r5
|
||||||
550: 7c 64 28 97 mulhw\. r3,r4,r5
|
550: (7c 64 28 97|97 28 64 7c) mulhw\. r3,r4,r5
|
||||||
554: 7c 64 28 16 mulhwu r3,r4,r5
|
554: (7c 64 28 16|16 28 64 7c) mulhwu r3,r4,r5
|
||||||
558: 7c 64 28 17 mulhwu\. r3,r4,r5
|
558: (7c 64 28 17|17 28 64 7c) mulhwu\. r3,r4,r5
|
||||||
55c: 10 64 2b 50 mullhw r3,r4,r5
|
55c: (10 64 2b 50|50 2b 64 10) mullhw r3,r4,r5
|
||||||
560: 10 64 2b 51 mullhw\. r3,r4,r5
|
560: (10 64 2b 51|51 2b 64 10) mullhw\. r3,r4,r5
|
||||||
564: 10 64 2b 10 mullhwu r3,r4,r5
|
564: (10 64 2b 10|10 2b 64 10) mullhwu r3,r4,r5
|
||||||
568: 10 64 2b 11 mullhwu\. r3,r4,r5
|
568: (10 64 2b 11|11 2b 64 10) mullhwu\. r3,r4,r5
|
||||||
56c: 1c 64 00 05 mulli r3,r4,5
|
56c: (1c 64 00 05|05 00 64 1c) mulli r3,r4,5
|
||||||
570: 7c 64 29 d6 mullw r3,r4,r5
|
570: (7c 64 29 d6|d6 29 64 7c) mullw r3,r4,r5
|
||||||
574: 7c 64 29 d7 mullw\. r3,r4,r5
|
574: (7c 64 29 d7|d7 29 64 7c) mullw\. r3,r4,r5
|
||||||
578: 7c 64 2d d6 mullwo r3,r4,r5
|
578: (7c 64 2d d6|d6 2d 64 7c) mullwo r3,r4,r5
|
||||||
57c: 7c 64 2d d7 mullwo\. r3,r4,r5
|
57c: (7c 64 2d d7|d7 2d 64 7c) mullwo\. r3,r4,r5
|
||||||
580: 7f bc f3 b8 nand r28,r29,r30
|
580: (7f bc f3 b8|b8 f3 bc 7f) nand r28,r29,r30
|
||||||
584: 7f bc f3 b9 nand\. r28,r29,r30
|
584: (7f bc f3 b9|b9 f3 bc 7f) nand\. r28,r29,r30
|
||||||
588: 7c 64 00 d0 neg r3,r4
|
588: (7c 64 00 d0|d0 00 64 7c) neg r3,r4
|
||||||
58c: 7c 64 00 d1 neg\. r3,r4
|
58c: (7c 64 00 d1|d1 00 64 7c) neg\. r3,r4
|
||||||
590: 7e 11 04 d0 nego r16,r17
|
590: (7e 11 04 d0|d0 04 11 7e) nego r16,r17
|
||||||
594: 7e 53 04 d1 nego\. r18,r19
|
594: (7e 53 04 d1|d1 04 53 7e) nego\. r18,r19
|
||||||
598: 10 64 29 5c nmacchw r3,r4,r5
|
598: (10 64 29 5c|5c 29 64 10) nmacchw r3,r4,r5
|
||||||
59c: 10 64 29 5d nmacchw\. r3,r4,r5
|
59c: (10 64 29 5d|5d 29 64 10) nmacchw\. r3,r4,r5
|
||||||
5a0: 10 64 2d 5c nmacchwo r3,r4,r5
|
5a0: (10 64 2d 5c|5c 2d 64 10) nmacchwo r3,r4,r5
|
||||||
5a4: 10 64 2d 5d nmacchwo\. r3,r4,r5
|
5a4: (10 64 2d 5d|5d 2d 64 10) nmacchwo\. r3,r4,r5
|
||||||
5a8: 10 64 29 dc nmacchws r3,r4,r5
|
5a8: (10 64 29 dc|dc 29 64 10) nmacchws r3,r4,r5
|
||||||
5ac: 10 64 29 dd nmacchws\. r3,r4,r5
|
5ac: (10 64 29 dd|dd 29 64 10) nmacchws\. r3,r4,r5
|
||||||
5b0: 10 64 2d dc nmacchwso r3,r4,r5
|
5b0: (10 64 2d dc|dc 2d 64 10) nmacchwso r3,r4,r5
|
||||||
5b4: 10 64 2d dd nmacchwso\. r3,r4,r5
|
5b4: (10 64 2d dd|dd 2d 64 10) nmacchwso\. r3,r4,r5
|
||||||
5b8: 10 64 28 5c nmachhw r3,r4,r5
|
5b8: (10 64 28 5c|5c 28 64 10) nmachhw r3,r4,r5
|
||||||
5bc: 10 64 28 5d nmachhw\. r3,r4,r5
|
5bc: (10 64 28 5d|5d 28 64 10) nmachhw\. r3,r4,r5
|
||||||
5c0: 10 64 2c 5c nmachhwo r3,r4,r5
|
5c0: (10 64 2c 5c|5c 2c 64 10) nmachhwo r3,r4,r5
|
||||||
5c4: 10 64 2c 5d nmachhwo\. r3,r4,r5
|
5c4: (10 64 2c 5d|5d 2c 64 10) nmachhwo\. r3,r4,r5
|
||||||
5c8: 10 64 28 dc nmachhws r3,r4,r5
|
5c8: (10 64 28 dc|dc 28 64 10) nmachhws r3,r4,r5
|
||||||
5cc: 10 64 28 dd nmachhws\. r3,r4,r5
|
5cc: (10 64 28 dd|dd 28 64 10) nmachhws\. r3,r4,r5
|
||||||
5d0: 10 64 2c dc nmachhwso r3,r4,r5
|
5d0: (10 64 2c dc|dc 2c 64 10) nmachhwso r3,r4,r5
|
||||||
5d4: 10 64 2c dd nmachhwso\. r3,r4,r5
|
5d4: (10 64 2c dd|dd 2c 64 10) nmachhwso\. r3,r4,r5
|
||||||
5d8: 10 64 2b 5c nmaclhw r3,r4,r5
|
5d8: (10 64 2b 5c|5c 2b 64 10) nmaclhw r3,r4,r5
|
||||||
5dc: 10 64 2b 5d nmaclhw\. r3,r4,r5
|
5dc: (10 64 2b 5d|5d 2b 64 10) nmaclhw\. r3,r4,r5
|
||||||
5e0: 10 64 2f 5c nmaclhwo r3,r4,r5
|
5e0: (10 64 2f 5c|5c 2f 64 10) nmaclhwo r3,r4,r5
|
||||||
5e4: 10 64 2f 5d nmaclhwo\. r3,r4,r5
|
5e4: (10 64 2f 5d|5d 2f 64 10) nmaclhwo\. r3,r4,r5
|
||||||
5e8: 10 64 2b dc nmaclhws r3,r4,r5
|
5e8: (10 64 2b dc|dc 2b 64 10) nmaclhws r3,r4,r5
|
||||||
5ec: 10 64 2b dd nmaclhws\. r3,r4,r5
|
5ec: (10 64 2b dd|dd 2b 64 10) nmaclhws\. r3,r4,r5
|
||||||
5f0: 10 64 2f dc nmaclhwso r3,r4,r5
|
5f0: (10 64 2f dc|dc 2f 64 10) nmaclhwso r3,r4,r5
|
||||||
5f4: 10 64 2f dd nmaclhwso\. r3,r4,r5
|
5f4: (10 64 2f dd|dd 2f 64 10) nmaclhwso\. r3,r4,r5
|
||||||
5f8: 7e b4 b0 f8 nor r20,r21,r22
|
5f8: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22
|
||||||
5fc: 7e b4 b0 f9 nor\. r20,r21,r22
|
5fc: (7e b4 b0 f9|f9 b0 b4 7e) nor\. r20,r21,r22
|
||||||
600: 7c 40 23 78 or r0,r2,r4
|
600: (7c 40 23 78|78 23 40 7c) or r0,r2,r4
|
||||||
604: 7d cc 83 79 or\. r12,r14,r16
|
604: (7d cc 83 79|79 83 cc 7d) or\. r12,r14,r16
|
||||||
608: 7e 0f 8b 38 orc r15,r16,r17
|
608: (7e 0f 8b 38|38 8b 0f 7e) orc r15,r16,r17
|
||||||
60c: 7e 72 a3 39 orc\. r18,r19,r20
|
60c: (7e 72 a3 39|39 a3 72 7e) orc\. r18,r19,r20
|
||||||
610: 60 21 00 00 ori r1,r1,0
|
610: (60 21 00 00|00 00 21 60) ori r1,r1,0
|
||||||
614: 64 83 de ad oris r3,r4,57005
|
614: (64 83 de ad|ad de 83 64) oris r3,r4,57005
|
||||||
618: 7c 83 00 f4 popcntb r3,r4
|
618: (7c 83 00 f4|f4 00 83 7c) popcntb r3,r4
|
||||||
61c: 7c 83 01 34 prtyw r3,r4
|
61c: (7c 83 01 34|34 01 83 7c) prtyw r3,r4
|
||||||
620: 4c 00 00 66 rfci
|
620: (4c 00 00 66|66 00 00 4c) rfci
|
||||||
624: 4c 00 00 64 rfi
|
624: (4c 00 00 64|64 00 00 4c) rfi
|
||||||
628: 4c 00 00 4c rfmci
|
628: (4c 00 00 4c|4c 00 00 4c) rfmci
|
||||||
62c: 50 83 65 36 rlwimi r3,r4,12,20,27
|
62c: (50 83 65 36|36 65 83 50) rlwimi r3,r4,12,20,27
|
||||||
630: 50 83 65 37 rlwimi\. r3,r4,12,20,27
|
630: (50 83 65 37|37 65 83 50) rlwimi\. r3,r4,12,20,27
|
||||||
634: 54 83 00 36 rlwinm r3,r4,0,0,27
|
634: (54 83 00 36|36 00 83 54) rlwinm r3,r4,0,0,27
|
||||||
638: 54 83 d1 be rlwinm r3,r4,26,6,31
|
638: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31
|
||||||
63c: 54 83 20 26 rlwinm r3,r4,4,0,19
|
63c: (54 83 20 26|26 20 83 54) rlwinm r3,r4,4,0,19
|
||||||
640: 54 83 00 37 rlwinm\. r3,r4,0,0,27
|
640: (54 83 00 37|37 00 83 54) rlwinm\. r3,r4,0,0,27
|
||||||
644: 5c 83 28 3e rotlw r3,r4,r5
|
644: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5
|
||||||
648: 5c 83 28 3f rotlw\. r3,r4,r5
|
648: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5
|
||||||
64c: 5c 83 28 3e rotlw r3,r4,r5
|
64c: (5c 83 28 3e|3e 28 83 5c) rotlw r3,r4,r5
|
||||||
650: 5c 83 28 3f rotlw\. r3,r4,r5
|
650: (5c 83 28 3f|3f 28 83 5c) rotlw\. r3,r4,r5
|
||||||
654: 44 00 00 02 sc
|
654: (44 00 00 02|02 00 00 44) sc
|
||||||
658: 7c 83 28 30 slw r3,r4,r5
|
658: (7c 83 28 30|30 28 83 7c) slw r3,r4,r5
|
||||||
65c: 7c 83 28 31 slw\. r3,r4,r5
|
65c: (7c 83 28 31|31 28 83 7c) slw\. r3,r4,r5
|
||||||
660: 7c 83 2e 30 sraw r3,r4,r5
|
660: (7c 83 2e 30|30 2e 83 7c) sraw r3,r4,r5
|
||||||
664: 7c 83 2e 31 sraw\. r3,r4,r5
|
664: (7c 83 2e 31|31 2e 83 7c) sraw\. r3,r4,r5
|
||||||
668: 7c 83 86 70 srawi r3,r4,16
|
668: (7c 83 86 70|70 86 83 7c) srawi r3,r4,16
|
||||||
66c: 7c 83 86 71 srawi\. r3,r4,16
|
66c: (7c 83 86 71|71 86 83 7c) srawi\. r3,r4,16
|
||||||
670: 7c 83 2c 30 srw r3,r4,r5
|
670: (7c 83 2c 30|30 2c 83 7c) srw r3,r4,r5
|
||||||
674: 7c 83 2c 31 srw\. r3,r4,r5
|
674: (7c 83 2c 31|31 2c 83 7c) srw\. r3,r4,r5
|
||||||
678: 54 83 d1 be rlwinm r3,r4,26,6,31
|
678: (54 83 d1 be|be d1 83 54) rlwinm r3,r4,26,6,31
|
||||||
67c: 99 61 00 02 stb r11,2\(r1\)
|
67c: (99 61 00 02|02 00 61 99) stb r11,2\(r1\)
|
||||||
680: 9d 81 00 03 stbu r12,3\(r1\)
|
680: (9d 81 00 03|03 00 81 9d) stbu r12,3\(r1\)
|
||||||
684: 7d ae 79 ee stbux r13,r14,r15
|
684: (7d ae 79 ee|ee 79 ae 7d) stbux r13,r14,r15
|
||||||
688: 7c 64 29 ae stbx r3,r4,r5
|
688: (7c 64 29 ae|ae 29 64 7c) stbx r3,r4,r5
|
||||||
68c: db 21 00 20 stfd f25,32\(r1\)
|
68c: (db 21 00 20|20 00 21 db) stfd f25,32\(r1\)
|
||||||
690: df 41 00 28 stfdu f26,40\(r1\)
|
690: (df 41 00 28|28 00 41 df) stfdu f26,40\(r1\)
|
||||||
694: 7c 01 15 ee stfdux f0,r1,r2
|
694: (7c 01 15 ee|ee 15 01 7c) stfdux f0,r1,r2
|
||||||
698: 7f be fd ae stfdx f29,r30,r31
|
698: (7f be fd ae|ae fd be 7f) stfdx f29,r30,r31
|
||||||
69c: 7d 43 27 ae stfiwx f10,r3,r4
|
69c: (7d 43 27 ae|ae 27 43 7d) stfiwx f10,r3,r4
|
||||||
6a0: d2 e1 00 14 stfs f23,20\(r1\)
|
6a0: (d2 e1 00 14|14 00 e1 d2) stfs f23,20\(r1\)
|
||||||
6a4: d7 01 00 18 stfsu f24,24\(r1\)
|
6a4: (d7 01 00 18|18 00 01 d7) stfsu f24,24\(r1\)
|
||||||
6a8: 7f 5b e5 6e stfsux f26,r27,r28
|
6a8: (7f 5b e5 6e|6e e5 5b 7f) stfsux f26,r27,r28
|
||||||
6ac: 7e f8 cd 2e stfsx f23,r24,r25
|
6ac: (7e f8 cd 2e|2e cd f8 7e) stfsx f23,r24,r25
|
||||||
6b0: b2 21 00 0a sth r17,10\(r1\)
|
6b0: (b2 21 00 0a|0a 00 21 b2) sth r17,10\(r1\)
|
||||||
6b4: 7c c7 47 2c sthbrx r6,r7,r8
|
6b4: (7c c7 47 2c|2c 47 c7 7c) sthbrx r6,r7,r8
|
||||||
6b8: b6 41 00 0c sthu r18,12\(r1\)
|
6b8: (b6 41 00 0c|0c 00 41 b6) sthu r18,12\(r1\)
|
||||||
6bc: 7e b6 bb 6e sthux r21,r22,r23
|
6bc: (7e b6 bb 6e|6e bb b6 7e) sthux r21,r22,r23
|
||||||
6c0: 7d 8d 73 2e sthx r12,r13,r14
|
6c0: (7d 8d 73 2e|2e 73 8d 7d) sthx r12,r13,r14
|
||||||
6c4: bc c1 ff f0 stmw r6,-16\(r1\)
|
6c4: (bc c1 ff f0|f0 ff c1 bc) stmw r6,-16\(r1\)
|
||||||
6c8: 7c 64 85 aa stswi r3,r4,16
|
6c8: (7c 64 85 aa|aa 85 64 7c) stswi r3,r4,16
|
||||||
6cc: 7c 64 2d 2a stswx r3,r4,r5
|
6cc: (7c 64 2d 2a|2a 2d 64 7c) stswx r3,r4,r5
|
||||||
6d0: 90 c7 ff f0 stw r6,-16\(r7\)
|
6d0: (90 c7 ff f0|f0 ff c7 90) stw r6,-16\(r7\)
|
||||||
6d4: 7c 64 2d 2c stwbrx r3,r4,r5
|
6d4: (7c 64 2d 2c|2c 2d 64 7c) stwbrx r3,r4,r5
|
||||||
6d8: 7c 64 29 2d stwcx\. r3,r4,r5
|
6d8: (7c 64 29 2d|2d 29 64 7c) stwcx\. r3,r4,r5
|
||||||
6dc: 94 61 00 10 stwu r3,16\(r1\)
|
6dc: (94 61 00 10|10 00 61 94) stwu r3,16\(r1\)
|
||||||
6e0: 7c 64 29 6e stwux r3,r4,r5
|
6e0: (7c 64 29 6e|6e 29 64 7c) stwux r3,r4,r5
|
||||||
6e4: 7c 64 29 2e stwx r3,r4,r5
|
6e4: (7c 64 29 2e|2e 29 64 7c) stwx r3,r4,r5
|
||||||
6e8: 7c 64 28 50 subf r3,r4,r5
|
6e8: (7c 64 28 50|50 28 64 7c) subf r3,r4,r5
|
||||||
6ec: 7c 64 28 51 subf\. r3,r4,r5
|
6ec: (7c 64 28 51|51 28 64 7c) subf\. r3,r4,r5
|
||||||
6f0: 7c 64 28 10 subfc r3,r4,r5
|
6f0: (7c 64 28 10|10 28 64 7c) subfc r3,r4,r5
|
||||||
6f4: 7c 64 28 11 subfc\. r3,r4,r5
|
6f4: (7c 64 28 11|11 28 64 7c) subfc\. r3,r4,r5
|
||||||
6f8: 7c 64 2c 10 subfco r3,r4,r5
|
6f8: (7c 64 2c 10|10 2c 64 7c) subfco r3,r4,r5
|
||||||
6fc: 7c 64 2c 11 subfco\. r3,r4,r5
|
6fc: (7c 64 2c 11|11 2c 64 7c) subfco\. r3,r4,r5
|
||||||
700: 7c 64 29 10 subfe r3,r4,r5
|
700: (7c 64 29 10|10 29 64 7c) subfe r3,r4,r5
|
||||||
704: 7c 64 29 11 subfe\. r3,r4,r5
|
704: (7c 64 29 11|11 29 64 7c) subfe\. r3,r4,r5
|
||||||
708: 7c 64 2d 10 subfeo r3,r4,r5
|
708: (7c 64 2d 10|10 2d 64 7c) subfeo r3,r4,r5
|
||||||
70c: 7c 64 2d 11 subfeo\. r3,r4,r5
|
70c: (7c 64 2d 11|11 2d 64 7c) subfeo\. r3,r4,r5
|
||||||
710: 20 64 00 05 subfic r3,r4,5
|
710: (20 64 00 05|05 00 64 20) subfic r3,r4,5
|
||||||
714: 7c 64 01 d0 subfme r3,r4
|
714: (7c 64 01 d0|d0 01 64 7c) subfme r3,r4
|
||||||
718: 7c 64 01 d1 subfme\. r3,r4
|
718: (7c 64 01 d1|d1 01 64 7c) subfme\. r3,r4
|
||||||
71c: 7c 64 05 d0 subfmeo r3,r4
|
71c: (7c 64 05 d0|d0 05 64 7c) subfmeo r3,r4
|
||||||
720: 7c 64 05 d1 subfmeo\. r3,r4
|
720: (7c 64 05 d1|d1 05 64 7c) subfmeo\. r3,r4
|
||||||
724: 7c 64 2c 50 subfo r3,r4,r5
|
724: (7c 64 2c 50|50 2c 64 7c) subfo r3,r4,r5
|
||||||
728: 7c 64 2c 51 subfo\. r3,r4,r5
|
728: (7c 64 2c 51|51 2c 64 7c) subfo\. r3,r4,r5
|
||||||
72c: 7c 64 01 90 subfze r3,r4
|
72c: (7c 64 01 90|90 01 64 7c) subfze r3,r4
|
||||||
730: 7c 64 01 91 subfze\. r3,r4
|
730: (7c 64 01 91|91 01 64 7c) subfze\. r3,r4
|
||||||
734: 7c 64 05 90 subfzeo r3,r4
|
734: (7c 64 05 90|90 05 64 7c) subfzeo r3,r4
|
||||||
738: 7c 64 05 91 subfzeo\. r3,r4
|
738: (7c 64 05 91|91 05 64 7c) subfzeo\. r3,r4
|
||||||
73c: 7c 07 46 24 tlbivax r7,r8
|
73c: (7c 07 46 24|24 46 07 7c) tlbivax r7,r8
|
||||||
740: 7c 22 3f 64 tlbre r1,r2,7
|
740: (7c 22 3f 64|64 3f 22 7c) tlbre r1,r2,7
|
||||||
744: 7c 0b 67 24 tlbsx r11,r12
|
744: (7c 0b 67 24|24 67 0b 7c) tlbsx r11,r12
|
||||||
748: 7d 8d 77 24 tlbsx r12,r13,r14
|
748: (7d 8d 77 24|24 77 8d 7d) tlbsx r12,r13,r14
|
||||||
74c: 7d 8d 77 25 tlbsx\. r12,r13,r14
|
74c: (7d 8d 77 25|25 77 8d 7d) tlbsx\. r12,r13,r14
|
||||||
750: 7c 00 04 6c tlbsync
|
750: (7c 00 04 6c|6c 04 00 7c) tlbsync
|
||||||
754: 7c 00 07 a4 tlbwe
|
754: (7c 00 07 a4|a4 07 00 7c) tlbwe
|
||||||
758: 7c 00 07 a4 tlbwe
|
758: (7c 00 07 a4|a4 07 00 7c) tlbwe
|
||||||
75c: 7c 21 0f a4 tlbwe r1,r1,1
|
75c: (7c 21 0f a4|a4 0f 21 7c) tlbwe r1,r1,1
|
||||||
760: 7f e0 00 08 trap
|
760: (7f e0 00 08|08 00 e0 7f) trap
|
||||||
764: 7f e0 00 08 trap
|
764: (7f e0 00 08|08 00 e0 7f) trap
|
||||||
768: 7c 83 20 08 tweq r3,r4
|
768: (7c 83 20 08|08 20 83 7c) tweq r3,r4
|
||||||
76c: 7c a3 20 08 twlge r3,r4
|
76c: (7c a3 20 08|08 20 a3 7c) twlge r3,r4
|
||||||
770: 7c 83 20 08 tweq r3,r4
|
770: (7c 83 20 08|08 20 83 7c) tweq r3,r4
|
||||||
774: 0d 03 00 0f twgti r3,15
|
774: (0d 03 00 0f|0f 00 03 0d) twgti r3,15
|
||||||
778: 0c c3 00 0f twllei r3,15
|
778: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15
|
||||||
77c: 0d 03 00 0f twgti r3,15
|
77c: (0d 03 00 0f|0f 00 03 0d) twgti r3,15
|
||||||
780: 7c a3 20 08 twlge r3,r4
|
780: (7c a3 20 08|08 20 a3 7c) twlge r3,r4
|
||||||
784: 0c c3 00 0f twllei r3,15
|
784: (0c c3 00 0f|0f 00 c3 0c) twllei r3,15
|
||||||
788: 7c 60 01 06 wrtee r3
|
788: (7c 60 01 06|06 01 60 7c) wrtee r3
|
||||||
78c: 7c 00 81 46 wrteei 1
|
78c: (7c 00 81 46|46 81 00 7c) wrteei 1
|
||||||
790: 7f dd fa 78 xor r29,r30,r31
|
790: (7f dd fa 78|78 fa dd 7f) xor r29,r30,r31
|
||||||
794: 7f dd fa 79 xor\. r29,r30,r31
|
794: (7f dd fa 79|79 fa dd 7f) xor\. r29,r30,r31
|
||||||
798: 68 83 de ad xori r3,r4,57005
|
798: (68 83 de ad|ad de 83 68) xori r3,r4,57005
|
||||||
79c: 6c 83 de ad xoris r3,r4,57005
|
79c: (6c 83 de ad|ad de 83 6c) xoris r3,r4,57005
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section ".text"
|
.text
|
||||||
ppc476:
|
ppc476:
|
||||||
add 3,4,5
|
add 3,4,5
|
||||||
add. 3,4,5
|
add. 3,4,5
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
@ -1,4 +1,4 @@
|
|||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
add. 4,5,6
|
add. 4,5,6
|
||||||
add 4,5,6
|
add 4,5,6
|
||||||
|
|||||||
@ -2,205 +2,206 @@
|
|||||||
#objdump: -dr
|
#objdump: -dr
|
||||||
#name: AltiVec tests
|
#name: AltiVec tests
|
||||||
|
|
||||||
.*: +file format elf32-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
00000000 <start>:
|
00000000 <start>:
|
||||||
0: 7c 60 06 6c dss 3
|
0: (7c 60 06 6c|6c 06 60 7c) dss 3
|
||||||
4: 7e 00 06 6c dssall
|
4: (7e 00 06 6c|6c 06 00 7e) dssall
|
||||||
8: 7c 25 22 ac dst r5,r4,1
|
8: (7c 25 22 ac|ac 22 25 7c) dst r5,r4,1
|
||||||
c: 7e 08 3a ac dstt r8,r7,0
|
c: (7e 08 3a ac|ac 3a 08 7e) dstt r8,r7,0
|
||||||
10: 7c 65 32 ec dstst r5,r6,3
|
10: (7c 65 32 ec|ec 32 65 7c) dstst r5,r6,3
|
||||||
14: 7e 44 2a ec dststt r4,r5,2
|
14: (7e 44 2a ec|ec 2a 44 7e) dststt r4,r5,2
|
||||||
18: 7f d6 c0 0e lvebx v30,r22,r24
|
18: (7f d6 c0 0e|0e c0 d6 7f) lvebx v30,r22,r24
|
||||||
1c: 7e a0 c0 0e lvebx v21,0,r24
|
1c: (7e a0 c0 0e|0e c0 a0 7e) lvebx v21,0,r24
|
||||||
20: 7d 50 10 4e lvehx v10,r16,r2
|
20: (7d 50 10 4e|4e 10 50 7d) lvehx v10,r16,r2
|
||||||
24: 7e 80 b8 4e lvehx v20,0,r23
|
24: (7e 80 b8 4e|4e b8 80 7e) lvehx v20,0,r23
|
||||||
28: 7e 24 90 8e lvewx v17,r4,r18
|
28: (7e 24 90 8e|8e 90 24 7e) lvewx v17,r4,r18
|
||||||
2c: 7e e0 40 8e lvewx v23,0,r8
|
2c: (7e e0 40 8e|8e 40 e0 7e) lvewx v23,0,r8
|
||||||
30: 7c c0 c8 0c lvsl v6,0,r25
|
30: (7c c0 c8 0c|0c c8 c0 7c) lvsl v6,0,r25
|
||||||
34: 7c 40 30 0c lvsl v2,0,r6
|
34: (7c 40 30 0c|0c 30 40 7c) lvsl v2,0,r6
|
||||||
38: 7e d0 60 4c lvsr v22,r16,r12
|
38: (7e d0 60 4c|4c 60 d0 7e) lvsr v22,r16,r12
|
||||||
3c: 7c 00 e8 4c lvsr v0,0,r29
|
3c: (7c 00 e8 4c|4c e8 00 7c) lvsr v0,0,r29
|
||||||
40: 7d e5 6a ce lvxl v15,r5,r13
|
40: (7d e5 6a ce|ce 6a e5 7d) lvxl v15,r5,r13
|
||||||
44: 7e 60 ba ce lvxl v19,0,r23
|
44: (7e 60 ba ce|ce ba 60 7e) lvxl v19,0,r23
|
||||||
48: 7e c1 10 ce lvx v22,r1,r2
|
48: (7e c1 10 ce|ce 10 c1 7e) lvx v22,r1,r2
|
||||||
4c: 7e 40 88 ce lvx v18,0,r17
|
4c: (7e 40 88 ce|ce 88 40 7e) lvx v18,0,r17
|
||||||
50: 7f e0 42 a6 mfvrsave r31
|
50: (7f e0 42 a6|a6 42 e0 7f) mfvrsave r31
|
||||||
54: 13 00 06 04 mfvscr v24
|
54: (13 00 06 04|04 06 00 13) mfvscr v24
|
||||||
58: 7d 40 43 a6 mtvrsave r10
|
58: (7d 40 43 a6|a6 43 40 7d) mtvrsave r10
|
||||||
5c: 10 00 ce 44 mtvscr v25
|
5c: (10 00 ce 44|44 ce 00 10) mtvscr v25
|
||||||
60: 7e 5b 51 0e stvebx v18,r27,r10
|
60: (7e 5b 51 0e|0e 51 5b 7e) stvebx v18,r27,r10
|
||||||
64: 7e 00 31 0e stvebx v16,0,r6
|
64: (7e 00 31 0e|0e 31 00 7e) stvebx v16,0,r6
|
||||||
68: 7e 2d 81 4e stvehx v17,r13,r16
|
68: (7e 2d 81 4e|4e 81 2d 7e) stvehx v17,r13,r16
|
||||||
6c: 7e e0 a1 4e stvehx v23,0,r20
|
6c: (7e e0 a1 4e|4e a1 e0 7e) stvehx v23,0,r20
|
||||||
70: 7d 73 f9 8e stvewx v11,r19,r31
|
70: (7d 73 f9 8e|8e f9 73 7d) stvewx v11,r19,r31
|
||||||
74: 7f e0 09 8e stvewx v31,0,r1
|
74: (7f e0 09 8e|8e 09 e0 7f) stvewx v31,0,r1
|
||||||
78: 7f 55 8b ce stvxl v26,r21,r17
|
78: (7f 55 8b ce|ce 8b 55 7f) stvxl v26,r21,r17
|
||||||
7c: 7d a0 b3 ce stvxl v13,0,r22
|
7c: (7d a0 b3 ce|ce b3 a0 7d) stvxl v13,0,r22
|
||||||
80: 7d 7f f9 ce stvx v11,r31,r31
|
80: (7d 7f f9 ce|ce f9 7f 7d) stvx v11,r31,r31
|
||||||
84: 7f c0 81 ce stvx v30,0,r16
|
84: (7f c0 81 ce|ce 81 c0 7f) stvx v30,0,r16
|
||||||
88: 13 07 e1 80 vaddcuw v24,v7,v28
|
88: (13 07 e1 80|80 e1 07 13) vaddcuw v24,v7,v28
|
||||||
8c: 10 7e 58 0a vaddfp v3,v30,v11
|
8c: (10 7e 58 0a|0a 58 7e 10) vaddfp v3,v30,v11
|
||||||
90: 11 1c 4b 00 vaddsbs v8,v28,v9
|
90: (11 1c 4b 00|00 4b 1c 11) vaddsbs v8,v28,v9
|
||||||
94: 10 e5 23 40 vaddshs v7,v5,v4
|
94: (10 e5 23 40|40 23 e5 10) vaddshs v7,v5,v4
|
||||||
98: 12 da db 80 vaddsws v22,v26,v27
|
98: (12 da db 80|80 db da 12) vaddsws v22,v26,v27
|
||||||
9c: 12 0e e0 00 vaddubm v16,v14,v28
|
9c: (12 0e e0 00|00 e0 0e 12) vaddubm v16,v14,v28
|
||||||
a0: 10 c1 ca 00 vaddubs v6,v1,v25
|
a0: (10 c1 ca 00|00 ca c1 10) vaddubs v6,v1,v25
|
||||||
a4: 10 44 30 40 vadduhm v2,v4,v6
|
a4: (10 44 30 40|40 30 44 10) vadduhm v2,v4,v6
|
||||||
a8: 13 55 42 40 vadduhs v26,v21,v8
|
a8: (13 55 42 40|40 42 55 13) vadduhs v26,v21,v8
|
||||||
ac: 13 bf 08 80 vadduwm v29,v31,v1
|
ac: (13 bf 08 80|80 08 bf 13) vadduwm v29,v31,v1
|
||||||
b0: 12 ed 22 80 vadduws v23,v13,v4
|
b0: (12 ed 22 80|80 22 ed 12) vadduws v23,v13,v4
|
||||||
b4: 13 d0 4c 44 vandc v30,v16,v9
|
b4: (13 d0 4c 44|44 4c d0 13) vandc v30,v16,v9
|
||||||
b8: 10 6d dc 04 vand v3,v13,v27
|
b8: (10 6d dc 04|04 dc 6d 10) vand v3,v13,v27
|
||||||
bc: 10 86 8d 02 vavgsb v4,v6,v17
|
bc: (10 86 8d 02|02 8d 86 10) vavgsb v4,v6,v17
|
||||||
c0: 12 fc 9d 42 vavgsh v23,v28,v19
|
c0: (12 fc 9d 42|42 9d fc 12) vavgsh v23,v28,v19
|
||||||
c4: 11 0f fd 82 vavgsw v8,v15,v31
|
c4: (11 0f fd 82|82 fd 0f 11) vavgsw v8,v15,v31
|
||||||
c8: 10 c7 cc 02 vavgub v6,v7,v25
|
c8: (10 c7 cc 02|02 cc c7 10) vavgub v6,v7,v25
|
||||||
cc: 13 36 54 42 vavguh v25,v22,v10
|
cc: (13 36 54 42|42 54 36 13) vavguh v25,v22,v10
|
||||||
d0: 10 77 ec 82 vavguw v3,v23,v29
|
d0: (10 77 ec 82|82 ec 77 10) vavguw v3,v23,v29
|
||||||
d4: 11 c6 13 ca vctsxs v14,v2,6
|
d4: (11 c6 13 ca|ca 13 c6 11) vctsxs v14,v2,6
|
||||||
d8: 11 34 fb 8a vctuxs v9,v31,20
|
d8: (11 34 fb 8a|8a fb 34 11) vctuxs v9,v31,20
|
||||||
dc: 13 03 f3 4a vcfsx v24,v30,3
|
dc: (13 03 f3 4a|4a f3 03 13) vcfsx v24,v30,3
|
||||||
e0: 12 3d ab 0a vcfux v17,v21,29
|
e0: (12 3d ab 0a|0a ab 3d 12) vcfux v17,v21,29
|
||||||
e4: 12 5c 03 c6 vcmpbfp v18,v28,v0
|
e4: (12 5c 03 c6|c6 03 5c 12) vcmpbfp v18,v28,v0
|
||||||
e8: 12 7a 1f c6 vcmpbfp\. v19,v26,v3
|
e8: (12 7a 1f c6|c6 1f 7a 12) vcmpbfp\. v19,v26,v3
|
||||||
ec: 12 02 58 c6 vcmpeqfp v16,v2,v11
|
ec: (12 02 58 c6|c6 58 02 12) vcmpeqfp v16,v2,v11
|
||||||
f0: 12 ed 6c c6 vcmpeqfp\. v23,v13,v13
|
f0: (12 ed 6c c6|c6 6c ed 12) vcmpeqfp\. v23,v13,v13
|
||||||
f4: 13 33 50 06 vcmpequb v25,v19,v10
|
f4: (13 33 50 06|06 50 33 13) vcmpequb v25,v19,v10
|
||||||
f8: 12 4b 14 06 vcmpequb\. v18,v11,v2
|
f8: (12 4b 14 06|06 14 4b 12) vcmpequb\. v18,v11,v2
|
||||||
fc: 11 39 38 46 vcmpequh v9,v25,v7
|
fc: (11 39 38 46|46 38 39 11) vcmpequh v9,v25,v7
|
||||||
100: 11 d8 ac 46 vcmpequh\. v14,v24,v21
|
100: (11 d8 ac 46|46 ac d8 11) vcmpequh\. v14,v24,v21
|
||||||
104: 13 0c 28 86 vcmpequw v24,v12,v5
|
104: (13 0c 28 86|86 28 0c 13) vcmpequw v24,v12,v5
|
||||||
108: 12 70 0c 86 vcmpequw\. v19,v16,v1
|
108: (12 70 0c 86|86 0c 70 12) vcmpequw\. v19,v16,v1
|
||||||
10c: 12 f1 81 c6 vcmpgefp v23,v17,v16
|
10c: (12 f1 81 c6|c6 81 f1 12) vcmpgefp v23,v17,v16
|
||||||
110: 12 7d 8d c6 vcmpgefp\. v19,v29,v17
|
110: (12 7d 8d c6|c6 8d 7d 12) vcmpgefp\. v19,v29,v17
|
||||||
114: 12 1c 6a c6 vcmpgtfp v16,v28,v13
|
114: (12 1c 6a c6|c6 6a 1c 12) vcmpgtfp v16,v28,v13
|
||||||
118: 11 d8 3e c6 vcmpgtfp\. v14,v24,v7
|
118: (11 d8 3e c6|c6 3e d8 11) vcmpgtfp\. v14,v24,v7
|
||||||
11c: 12 16 33 06 vcmpgtsb v16,v22,v6
|
11c: (12 16 33 06|06 33 16 12) vcmpgtsb v16,v22,v6
|
||||||
120: 10 4c 77 06 vcmpgtsb\. v2,v12,v14
|
120: (10 4c 77 06|06 77 4c 10) vcmpgtsb\. v2,v12,v14
|
||||||
124: 13 83 eb 46 vcmpgtsh v28,v3,v29
|
124: (13 83 eb 46|46 eb 83 13) vcmpgtsh v28,v3,v29
|
||||||
128: 12 13 6f 46 vcmpgtsh\. v16,v19,v13
|
128: (12 13 6f 46|46 6f 13 12) vcmpgtsh\. v16,v19,v13
|
||||||
12c: 11 e0 2b 86 vcmpgtsw v15,v0,v5
|
12c: (11 e0 2b 86|86 2b e0 11) vcmpgtsw v15,v0,v5
|
||||||
130: 12 ad 07 86 vcmpgtsw\. v21,v13,v0
|
130: (12 ad 07 86|86 07 ad 12) vcmpgtsw\. v21,v13,v0
|
||||||
134: 10 aa f2 06 vcmpgtub v5,v10,v30
|
134: (10 aa f2 06|06 f2 aa 10) vcmpgtub v5,v10,v30
|
||||||
138: 10 ed 56 06 vcmpgtub\. v7,v13,v10
|
138: (10 ed 56 06|06 56 ed 10) vcmpgtub\. v7,v13,v10
|
||||||
13c: 13 0f 82 46 vcmpgtuh v24,v15,v16
|
13c: (13 0f 82 46|46 82 0f 13) vcmpgtuh v24,v15,v16
|
||||||
140: 13 35 de 46 vcmpgtuh\. v25,v21,v27
|
140: (13 35 de 46|46 de 35 13) vcmpgtuh\. v25,v21,v27
|
||||||
144: 12 3b 32 86 vcmpgtuw v17,v27,v6
|
144: (12 3b 32 86|86 32 3b 12) vcmpgtuw v17,v27,v6
|
||||||
148: 11 15 de 86 vcmpgtuw\. v8,v21,v27
|
148: (11 15 de 86|86 de 15 11) vcmpgtuw\. v8,v21,v27
|
||||||
14c: 10 2e 0b 4a vcfsx v1,v1,14
|
14c: (10 2e 0b 4a|4a 0b 2e 10) vcfsx v1,v1,14
|
||||||
150: 10 99 7b ca vctsxs v4,v15,25
|
150: (10 99 7b ca|ca 7b 99 10) vctsxs v4,v15,25
|
||||||
154: 13 8e bb 8a vctuxs v28,v23,14
|
154: (13 8e bb 8a|8a bb 8e 13) vctuxs v28,v23,14
|
||||||
158: 10 c0 33 0a vcfux v6,v6,0
|
158: (10 c0 33 0a|0a 33 c0 10) vcfux v6,v6,0
|
||||||
15c: 10 00 41 8a vexptefp v0,v8
|
15c: (10 00 41 8a|8a 41 00 10) vexptefp v0,v8
|
||||||
160: 12 c0 d9 ca vlogefp v22,v27
|
160: (12 c0 d9 ca|ca d9 c0 12) vlogefp v22,v27
|
||||||
164: 12 f2 91 6e vmaddfp v23,v18,v5,v18
|
164: (12 f2 91 6e|6e 91 f2 12) vmaddfp v23,v18,v5,v18
|
||||||
168: 11 ad dc 0a vmaxfp v13,v13,v27
|
168: (11 ad dc 0a|0a dc ad 11) vmaxfp v13,v13,v27
|
||||||
16c: 11 17 71 02 vmaxsb v8,v23,v14
|
16c: (11 17 71 02|02 71 17 11) vmaxsb v8,v23,v14
|
||||||
170: 12 71 01 42 vmaxsh v19,v17,v0
|
170: (12 71 01 42|42 01 71 12) vmaxsh v19,v17,v0
|
||||||
174: 12 63 b1 82 vmaxsw v19,v3,v22
|
174: (12 63 b1 82|82 b1 63 12) vmaxsw v19,v3,v22
|
||||||
178: 12 fe e0 02 vmaxub v23,v30,v28
|
178: (12 fe e0 02|02 e0 fe 12) vmaxub v23,v30,v28
|
||||||
17c: 11 34 b8 42 vmaxuh v9,v20,v23
|
17c: (11 34 b8 42|42 b8 34 11) vmaxuh v9,v20,v23
|
||||||
180: 12 b3 08 82 vmaxuw v21,v19,v1
|
180: (12 b3 08 82|82 08 b3 12) vmaxuw v21,v19,v1
|
||||||
184: 12 cd 2d a0 vmhaddshs v22,v13,v5,v22
|
184: (12 cd 2d a0|a0 2d cd 12) vmhaddshs v22,v13,v5,v22
|
||||||
188: 13 e0 1c a1 vmhraddshs v31,v0,v3,v18
|
188: (13 e0 1c a1|a1 1c e0 13) vmhraddshs v31,v0,v3,v18
|
||||||
18c: 10 55 c4 4a vminfp v2,v21,v24
|
18c: (10 55 c4 4a|4a c4 55 10) vminfp v2,v21,v24
|
||||||
190: 12 86 53 02 vminsb v20,v6,v10
|
190: (12 86 53 02|02 53 86 12) vminsb v20,v6,v10
|
||||||
194: 12 5b d3 42 vminsh v18,v27,v26
|
194: (12 5b d3 42|42 d3 5b 12) vminsh v18,v27,v26
|
||||||
198: 10 64 0b 82 vminsw v3,v4,v1
|
198: (10 64 0b 82|82 0b 64 10) vminsw v3,v4,v1
|
||||||
19c: 10 e0 6a 02 vminub v7,v0,v13
|
19c: (10 e0 6a 02|02 6a e0 10) vminub v7,v0,v13
|
||||||
1a0: 10 0c 32 42 vminuh v0,v12,v6
|
1a0: (10 0c 32 42|42 32 0c 10) vminuh v0,v12,v6
|
||||||
1a4: 10 c3 0a 82 vminuw v6,v3,v1
|
1a4: (10 c3 0a 82|82 0a c3 10) vminuw v6,v3,v1
|
||||||
1a8: 10 7d 1e a2 vmladduhm v3,v29,v3,v26
|
1a8: (10 7d 1e a2|a2 1e 7d 10) vmladduhm v3,v29,v3,v26
|
||||||
1ac: 12 a5 f8 0c vmrghb v21,v5,v31
|
1ac: (12 a5 f8 0c|0c f8 a5 12) vmrghb v21,v5,v31
|
||||||
1b0: 12 b8 00 4c vmrghh v21,v24,v0
|
1b0: (12 b8 00 4c|4c 00 b8 12) vmrghh v21,v24,v0
|
||||||
1b4: 12 00 b0 8c vmrghw v16,v0,v22
|
1b4: (12 00 b0 8c|8c b0 00 12) vmrghw v16,v0,v22
|
||||||
1b8: 10 31 81 0c vmrglb v1,v17,v16
|
1b8: (10 31 81 0c|0c 81 31 10) vmrglb v1,v17,v16
|
||||||
1bc: 11 c8 79 4c vmrglh v14,v8,v15
|
1bc: (11 c8 79 4c|4c 79 c8 11) vmrglh v14,v8,v15
|
||||||
1c0: 13 f5 29 8c vmrglw v31,v21,v5
|
1c0: (13 f5 29 8c|8c 29 f5 13) vmrglw v31,v21,v5
|
||||||
1c4: 13 09 4c 84 vmr v24,v9
|
1c4: (13 09 4c 84|84 4c 09 13) vmr v24,v9
|
||||||
1c8: 13 09 4c 84 vmr v24,v9
|
1c8: (13 09 4c 84|84 4c 09 13) vmr v24,v9
|
||||||
1cc: 10 18 7d e5 vmsummbm v0,v24,v15,v23
|
1cc: (10 18 7d e5|e5 7d 18 10) vmsummbm v0,v24,v15,v23
|
||||||
1d0: 10 24 3e 68 vmsumshm v1,v4,v7,v25
|
1d0: (10 24 3e 68|68 3e 24 10) vmsumshm v1,v4,v7,v25
|
||||||
1d4: 11 28 6f e9 vmsumshs v9,v8,v13,v31
|
1d4: (11 28 6f e9|e9 6f 28 11) vmsumshs v9,v8,v13,v31
|
||||||
1d8: 12 ff 67 a4 vmsumubm v23,v31,v12,v30
|
1d8: (12 ff 67 a4|a4 67 ff 12) vmsumubm v23,v31,v12,v30
|
||||||
1dc: 13 a0 d5 66 vmsumuhm v29,v0,v26,v21
|
1dc: (13 a0 d5 66|66 d5 a0 13) vmsumuhm v29,v0,v26,v21
|
||||||
1e0: 13 6e c9 67 vmsumuhs v27,v14,v25,v5
|
1e0: (13 6e c9 67|67 c9 6e 13) vmsumuhs v27,v14,v25,v5
|
||||||
1e4: 11 59 73 08 vmulesb v10,v25,v14
|
1e4: (11 59 73 08|08 73 59 11) vmulesb v10,v25,v14
|
||||||
1e8: 10 32 43 48 vmulesh v1,v18,v8
|
1e8: (10 32 43 48|48 43 32 10) vmulesh v1,v18,v8
|
||||||
1ec: 12 2e 4a 08 vmuleub v17,v14,v9
|
1ec: (12 2e 4a 08|08 4a 2e 12) vmuleub v17,v14,v9
|
||||||
1f0: 10 ba 4a 48 vmuleuh v5,v26,v9
|
1f0: (10 ba 4a 48|48 4a ba 10) vmuleuh v5,v26,v9
|
||||||
1f4: 12 b2 31 08 vmulosb v21,v18,v6
|
1f4: (12 b2 31 08|08 31 b2 12) vmulosb v21,v18,v6
|
||||||
1f8: 10 85 41 48 vmulosh v4,v5,v8
|
1f8: (10 85 41 48|48 41 85 10) vmulosh v4,v5,v8
|
||||||
1fc: 10 49 98 08 vmuloub v2,v9,v19
|
1fc: (10 49 98 08|08 98 49 10) vmuloub v2,v9,v19
|
||||||
200: 13 a5 20 48 vmulouh v29,v5,v4
|
200: (13 a5 20 48|48 20 a5 13) vmulouh v29,v5,v4
|
||||||
204: 11 02 29 af vnmsubfp v8,v2,v6,v5
|
204: (11 02 29 af|af 29 02 11) vnmsubfp v8,v2,v6,v5
|
||||||
208: 13 e9 55 04 vnor v31,v9,v10
|
208: (13 e9 55 04|04 55 e9 13) vnor v31,v9,v10
|
||||||
20c: 13 3f fd 04 vnot v25,v31
|
20c: (13 3f fd 04|04 fd 3f 13) vnot v25,v31
|
||||||
210: 13 3f fd 04 vnot v25,v31
|
210: (13 3f fd 04|04 fd 3f 13) vnot v25,v31
|
||||||
214: 12 e7 14 84 vor v23,v7,v2
|
214: (12 e7 14 84|84 14 e7 12) vor v23,v7,v2
|
||||||
218: 10 1c b6 6b vperm v0,v28,v22,v25
|
218: (10 1c b6 6b|6b b6 1c 10) vperm v0,v28,v22,v25
|
||||||
21c: 12 19 8b 0e vpkpx v16,v25,v17
|
21c: (12 19 8b 0e|0e 8b 19 12) vpkpx v16,v25,v17
|
||||||
220: 11 90 89 8e vpkshss v12,v16,v17
|
220: (11 90 89 8e|8e 89 90 11) vpkshss v12,v16,v17
|
||||||
224: 10 33 b9 0e vpkshus v1,v19,v23
|
224: (10 33 b9 0e|0e b9 33 10) vpkshus v1,v19,v23
|
||||||
228: 13 27 69 ce vpkswss v25,v7,v13
|
228: (13 27 69 ce|ce 69 27 13) vpkswss v25,v7,v13
|
||||||
22c: 10 98 51 4e vpkswus v4,v24,v10
|
22c: (10 98 51 4e|4e 51 98 10) vpkswus v4,v24,v10
|
||||||
230: 11 3b 60 0e vpkuhum v9,v27,v12
|
230: (11 3b 60 0e|0e 60 3b 11) vpkuhum v9,v27,v12
|
||||||
234: 12 ca c8 8e vpkuhus v22,v10,v25
|
234: (12 ca c8 8e|8e c8 ca 12) vpkuhus v22,v10,v25
|
||||||
238: 13 d2 00 4e vpkuwum v30,v18,v0
|
238: (13 d2 00 4e|4e 00 d2 13) vpkuwum v30,v18,v0
|
||||||
23c: 10 e3 b0 ce vpkuwus v7,v3,v22
|
23c: (10 e3 b0 ce|ce b0 e3 10) vpkuwus v7,v3,v22
|
||||||
240: 13 00 e1 0a vrefp v24,v28
|
240: (13 00 e1 0a|0a e1 00 13) vrefp v24,v28
|
||||||
244: 12 20 9a ca vrfim v17,v19
|
244: (12 20 9a ca|ca 9a 20 12) vrfim v17,v19
|
||||||
248: 13 00 ca 0a vrfin v24,v25
|
248: (13 00 ca 0a|0a ca 00 13) vrfin v24,v25
|
||||||
24c: 10 60 2a 8a vrfip v3,v5
|
24c: (10 60 2a 8a|8a 2a 60 10) vrfip v3,v5
|
||||||
250: 11 00 52 4a vrfiz v8,v10
|
250: (11 00 52 4a|4a 52 00 11) vrfiz v8,v10
|
||||||
254: 13 52 f0 04 vrlb v26,v18,v30
|
254: (13 52 f0 04|04 f0 52 13) vrlb v26,v18,v30
|
||||||
258: 12 11 c8 44 vrlh v16,v17,v25
|
258: (12 11 c8 44|44 c8 11 12) vrlh v16,v17,v25
|
||||||
25c: 12 fe 48 84 vrlw v23,v30,v9
|
25c: (12 fe 48 84|84 48 fe 12) vrlw v23,v30,v9
|
||||||
260: 10 40 91 4a vrsqrtefp v2,v18
|
260: (10 40 91 4a|4a 91 40 10) vrsqrtefp v2,v18
|
||||||
264: 12 8e 92 aa vsel v20,v14,v18,v10
|
264: (12 8e 92 aa|aa 92 8e 12) vsel v20,v14,v18,v10
|
||||||
268: 13 39 61 04 vslb v25,v25,v12
|
268: (13 39 61 04|04 61 39 13) vslb v25,v25,v12
|
||||||
26c: 11 29 61 ec vsldoi v9,v9,v12,7
|
26c: (11 29 61 ec|ec 61 29 11) vsldoi v9,v9,v12,7
|
||||||
270: 11 c2 59 44 vslh v14,v2,v11
|
270: (11 c2 59 44|44 59 c2 11) vslh v14,v2,v11
|
||||||
274: 13 c5 34 0c vslo v30,v5,v6
|
274: (13 c5 34 0c|0c 34 c5 13) vslo v30,v5,v6
|
||||||
278: 12 de 49 c4 vsl v22,v30,v9
|
278: (12 de 49 c4|c4 49 de 12) vsl v22,v30,v9
|
||||||
27c: 13 5a 19 84 vslw v26,v26,v3
|
27c: (13 5a 19 84|84 19 5a 13) vslw v26,v26,v3
|
||||||
280: 10 26 a2 0c vspltb v1,v20,6
|
280: (10 26 a2 0c|0c a2 26 10) vspltb v1,v20,6
|
||||||
284: 12 03 92 4c vsplth v16,v18,3
|
284: (12 03 92 4c|4c 92 03 12) vsplth v16,v18,3
|
||||||
288: 13 33 03 0c vspltisb v25,-13
|
288: (13 33 03 0c|0c 03 33 13) vspltisb v25,-13
|
||||||
28c: 12 ca 03 4c vspltish v22,10
|
28c: (12 ca 03 4c|4c 03 ca 12) vspltish v22,10
|
||||||
290: 11 ad 03 8c vspltisw v13,13
|
290: (11 ad 03 8c|8c 03 ad 11) vspltisw v13,13
|
||||||
294: 11 22 92 8c vspltw v9,v18,2
|
294: (11 22 92 8c|8c 92 22 11) vspltw v9,v18,2
|
||||||
298: 11 d6 03 04 vsrab v14,v22,v0
|
298: (11 d6 03 04|04 03 d6 11) vsrab v14,v22,v0
|
||||||
29c: 11 8c 93 44 vsrah v12,v12,v18
|
29c: (11 8c 93 44|44 93 8c 11) vsrah v12,v12,v18
|
||||||
2a0: 10 42 6b 84 vsraw v2,v2,v13
|
2a0: (10 42 6b 84|84 6b 42 10) vsraw v2,v2,v13
|
||||||
2a4: 10 fb 2a 04 vsrb v7,v27,v5
|
2a4: (10 fb 2a 04|04 2a fb 10) vsrb v7,v27,v5
|
||||||
2a8: 10 eb ea 44 vsrh v7,v11,v29
|
2a8: (10 eb ea 44|44 ea eb 10) vsrh v7,v11,v29
|
||||||
2ac: 12 5e fc 4c vsro v18,v30,v31
|
2ac: (12 5e fc 4c|4c fc 5e 12) vsro v18,v30,v31
|
||||||
2b0: 10 49 e2 c4 vsr v2,v9,v28
|
2b0: (10 49 e2 c4|c4 e2 49 10) vsr v2,v9,v28
|
||||||
2b4: 10 19 02 84 vsrw v0,v25,v0
|
2b4: (10 19 02 84|84 02 19 10) vsrw v0,v25,v0
|
||||||
2b8: 13 02 55 80 vsubcuw v24,v2,v10
|
2b8: (13 02 55 80|80 55 02 13) vsubcuw v24,v2,v10
|
||||||
2bc: 12 d8 a0 4a vsubfp v22,v24,v20
|
2bc: (12 d8 a0 4a|4a a0 d8 12) vsubfp v22,v24,v20
|
||||||
2c0: 11 56 6f 00 vsubsbs v10,v22,v13
|
2c0: (11 56 6f 00|00 6f 56 11) vsubsbs v10,v22,v13
|
||||||
2c4: 13 11 e7 40 vsubshs v24,v17,v28
|
2c4: (13 11 e7 40|40 e7 11 13) vsubshs v24,v17,v28
|
||||||
2c8: 11 5a 07 80 vsubsws v10,v26,v0
|
2c8: (11 5a 07 80|80 07 5a 11) vsubsws v10,v26,v0
|
||||||
2cc: 12 0b c4 00 vsububm v16,v11,v24
|
2cc: (12 0b c4 00|00 c4 0b 12) vsububm v16,v11,v24
|
||||||
2d0: 11 75 0e 00 vsububs v11,v21,v1
|
2d0: (11 75 0e 00|00 0e 75 11) vsububs v11,v21,v1
|
||||||
2d4: 10 cc c4 40 vsubuhm v6,v12,v24
|
2d4: (10 cc c4 40|40 c4 cc 10) vsubuhm v6,v12,v24
|
||||||
2d8: 13 cb 4e 40 vsubuhs v30,v11,v9
|
2d8: (13 cb 4e 40|40 4e cb 13) vsubuhs v30,v11,v9
|
||||||
2dc: 12 74 6c 80 vsubuwm v19,v20,v13
|
2dc: (12 74 6c 80|80 6c 74 12) vsubuwm v19,v20,v13
|
||||||
2e0: 12 59 36 80 vsubuws v18,v25,v6
|
2e0: (12 59 36 80|80 36 59 12) vsubuws v18,v25,v6
|
||||||
2e4: 13 2a 96 88 vsum2sws v25,v10,v18
|
2e4: (13 2a 96 88|88 96 2a 13) vsum2sws v25,v10,v18
|
||||||
2e8: 11 b0 af 08 vsum4sbs v13,v16,v21
|
2e8: (11 b0 af 08|08 af b0 11) vsum4sbs v13,v16,v21
|
||||||
2ec: 12 e8 26 48 vsum4shs v23,v8,v4
|
2ec: (12 e8 26 48|48 26 e8 12) vsum4shs v23,v8,v4
|
||||||
2f0: 13 8d f6 08 vsum4ubs v28,v13,v30
|
2f0: (13 8d f6 08|08 f6 8d 13) vsum4ubs v28,v13,v30
|
||||||
2f4: 12 ca 47 88 vsumsws v22,v10,v8
|
2f4: (12 ca 47 88|88 47 ca 12) vsumsws v22,v10,v8
|
||||||
2f8: 13 00 73 4e vupkhpx v24,v14
|
2f8: (13 00 73 4e|4e 73 00 13) vupkhpx v24,v14
|
||||||
2fc: 10 40 b2 0e vupkhsb v2,v22
|
2fc: (10 40 b2 0e|0e b2 40 10) vupkhsb v2,v22
|
||||||
300: 12 00 12 4e vupkhsh v16,v2
|
300: (12 00 12 4e|4e 12 00 12) vupkhsh v16,v2
|
||||||
304: 11 40 d3 ce vupklpx v10,v26
|
304: (11 40 d3 ce|ce d3 40 11) vupklpx v10,v26
|
||||||
308: 11 e0 e2 8e vupklsb v15,v28
|
308: (11 e0 e2 8e|8e e2 e0 11) vupklsb v15,v28
|
||||||
30c: 11 00 42 ce vupklsh v8,v8
|
30c: (11 00 42 ce|ce 42 00 11) vupklsh v8,v8
|
||||||
310: 13 20 1c c4 vxor v25,v0,v3
|
310: (13 20 1c c4|c4 1c 20 13) vxor v25,v0,v3
|
||||||
|
#pass
|
||||||
|
|||||||
@ -1,6 +1,6 @@
|
|||||||
# PowerPC AltiVec tests
|
# PowerPC AltiVec tests
|
||||||
#as: -m601 -maltivec
|
#as: -m601 -maltivec
|
||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
dss 3
|
dss 3
|
||||||
dssall
|
dssall
|
||||||
|
|||||||
@ -2,59 +2,60 @@
|
|||||||
#objdump: -dr -Maltivec
|
#objdump: -dr -Maltivec
|
||||||
#name: Altivec ISA 2.07 instructions
|
#name: Altivec ISA 2.07 instructions
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <start>:
|
0+00 <start>:
|
||||||
0: 7c 60 e2 0e lvepxl v3,0,r28
|
0: (7c 60 e2 0e|0e e2 60 7c) lvepxl v3,0,r28
|
||||||
4: 7e 64 92 0e lvepxl v19,r4,r18
|
4: (7e 64 92 0e|0e 92 64 7e) lvepxl v19,r4,r18
|
||||||
8: 7f 60 9a 4e lvepx v27,0,r19
|
8: (7f 60 9a 4e|4e 9a 60 7f) lvepx v27,0,r19
|
||||||
c: 7c 39 92 4e lvepx v1,r25,r18
|
c: (7c 39 92 4e|4e 92 39 7c) lvepx v1,r25,r18
|
||||||
10: 7f e0 da 0a lvexbx v31,0,r27
|
10: (7f e0 da 0a|0a da e0 7f) lvexbx v31,0,r27
|
||||||
14: 7f 81 62 0a lvexbx v28,r1,r12
|
14: (7f 81 62 0a|0a 62 81 7f) lvexbx v28,r1,r12
|
||||||
18: 7f e0 72 4a lvexhx v31,0,r14
|
18: (7f e0 72 4a|4a 72 e0 7f) lvexhx v31,0,r14
|
||||||
1c: 7e 30 fa 4a lvexhx v17,r16,r31
|
1c: (7e 30 fa 4a|4a fa 30 7e) lvexhx v17,r16,r31
|
||||||
20: 7e c0 ea 8a lvexwx v22,0,r29
|
20: (7e c0 ea 8a|8a ea c0 7e) lvexwx v22,0,r29
|
||||||
24: 7e f9 2a 8a lvexwx v23,r25,r5
|
24: (7e f9 2a 8a|8a 2a f9 7e) lvexwx v23,r25,r5
|
||||||
28: 7c 60 66 0a lvsm v3,0,r12
|
28: (7c 60 66 0a|0a 66 60 7c) lvsm v3,0,r12
|
||||||
2c: 7f 7d 0e 0a lvsm v27,r29,r1
|
2c: (7f 7d 0e 0a|0a 0e 7d 7f) lvsm v27,r29,r1
|
||||||
30: 7c e0 36 ca lvswxl v7,0,r6
|
30: (7c e0 36 ca|ca 36 e0 7c) lvswxl v7,0,r6
|
||||||
34: 7c f0 46 ca lvswxl v7,r16,r8
|
34: (7c f0 46 ca|ca 46 f0 7c) lvswxl v7,r16,r8
|
||||||
38: 7d c0 94 ca lvswx v14,0,r18
|
38: (7d c0 94 ca|ca 94 c0 7d) lvswx v14,0,r18
|
||||||
3c: 7f 9c 84 ca lvswx v28,r28,r16
|
3c: (7f 9c 84 ca|ca 84 9c 7f) lvswx v28,r28,r16
|
||||||
40: 7f 60 66 8a lvtlxl v27,0,r12
|
40: (7f 60 66 8a|8a 66 60 7f) lvtlxl v27,0,r12
|
||||||
44: 7f 7c 06 8a lvtlxl v27,r28,r0
|
44: (7f 7c 06 8a|8a 06 7c 7f) lvtlxl v27,r28,r0
|
||||||
48: 7e e0 cc 8a lvtlx v23,0,r25
|
48: (7e e0 cc 8a|8a cc e0 7e) lvtlx v23,0,r25
|
||||||
4c: 7c 39 74 8a lvtlx v1,r25,r14
|
4c: (7c 39 74 8a|8a 74 39 7c) lvtlx v1,r25,r14
|
||||||
50: 7e 80 c6 4a lvtrxl v20,0,r24
|
50: (7e 80 c6 4a|4a c6 80 7e) lvtrxl v20,0,r24
|
||||||
54: 7e dd c6 4a lvtrxl v22,r29,r24
|
54: (7e dd c6 4a|4a c6 dd 7e) lvtrxl v22,r29,r24
|
||||||
58: 7f 00 44 4a lvtrx v24,0,r8
|
58: (7f 00 44 4a|4a 44 00 7f) lvtrx v24,0,r8
|
||||||
5c: 7d b7 e4 4a lvtrx v13,r23,r28
|
5c: (7d b7 e4 4a|4a e4 b7 7d) lvtrx v13,r23,r28
|
||||||
60: 7d 9c 60 dc mvidsplt v12,r28,r12
|
60: (7d 9c 60 dc|dc 60 9c 7d) mvidsplt v12,r28,r12
|
||||||
64: 7d 5b 00 5c mviwsplt v10,r27,r0
|
64: (7d 5b 00 5c|5c 00 5b 7d) mviwsplt v10,r27,r0
|
||||||
68: 7f 60 6e 0e stvepxl v27,0,r13
|
68: (7f 60 6e 0e|0e 6e 60 7f) stvepxl v27,0,r13
|
||||||
6c: 7c 42 fe 0e stvepxl v2,r2,r31
|
6c: (7c 42 fe 0e|0e fe 42 7c) stvepxl v2,r2,r31
|
||||||
70: 7c 60 56 4e stvepx v3,0,r10
|
70: (7c 60 56 4e|4e 56 60 7c) stvepx v3,0,r10
|
||||||
74: 7f 7c 06 4e stvepx v27,r28,r0
|
74: (7f 7c 06 4e|4e 06 7c 7f) stvepx v27,r28,r0
|
||||||
78: 7d a0 33 0a stvexbx v13,0,r6
|
78: (7d a0 33 0a|0a 33 a0 7d) stvexbx v13,0,r6
|
||||||
7c: 7d b9 1b 0a stvexbx v13,r25,r3
|
7c: (7d b9 1b 0a|0a 1b b9 7d) stvexbx v13,r25,r3
|
||||||
80: 7e c0 0b 4a stvexhx v22,0,r1
|
80: (7e c0 0b 4a|4a 0b c0 7e) stvexhx v22,0,r1
|
||||||
84: 7e 2e 53 4a stvexhx v17,r14,r10
|
84: (7e 2e 53 4a|4a 53 2e 7e) stvexhx v17,r14,r10
|
||||||
88: 7e a0 db 8a stvexwx v21,0,r27
|
88: (7e a0 db 8a|8a db a0 7e) stvexwx v21,0,r27
|
||||||
8c: 7f f2 0b 8a stvexwx v31,r18,r1
|
8c: (7f f2 0b 8a|8a 0b f2 7f) stvexwx v31,r18,r1
|
||||||
90: 7f 40 6f 8a stvflxl v26,0,r13
|
90: (7f 40 6f 8a|8a 6f 40 7f) stvflxl v26,0,r13
|
||||||
94: 7e cd af 8a stvflxl v22,r13,r21
|
94: (7e cd af 8a|8a af cd 7e) stvflxl v22,r13,r21
|
||||||
98: 7c a0 4d 8a stvflx v5,0,r9
|
98: (7c a0 4d 8a|8a 4d a0 7c) stvflx v5,0,r9
|
||||||
9c: 7e b8 0d 8a stvflx v21,r24,r1
|
9c: (7e b8 0d 8a|8a 0d b8 7e) stvflx v21,r24,r1
|
||||||
a0: 7d a0 57 4a stvfrxl v13,0,r10
|
a0: (7d a0 57 4a|4a 57 a0 7d) stvfrxl v13,0,r10
|
||||||
a4: 7d b1 cf 4a stvfrxl v13,r17,r25
|
a4: (7d b1 cf 4a|4a cf b1 7d) stvfrxl v13,r17,r25
|
||||||
a8: 7e 20 55 4a stvfrx v17,0,r10
|
a8: (7e 20 55 4a|4a 55 20 7e) stvfrx v17,0,r10
|
||||||
ac: 7d 0c fd 4a stvfrx v8,r12,r31
|
ac: (7d 0c fd 4a|4a fd 0c 7d) stvfrx v8,r12,r31
|
||||||
b0: 7e 40 ef ca stvswxl v18,0,r29
|
b0: (7e 40 ef ca|ca ef 40 7e) stvswxl v18,0,r29
|
||||||
b4: 7f 4e 47 ca stvswxl v26,r14,r8
|
b4: (7f 4e 47 ca|ca 47 4e 7f) stvswxl v26,r14,r8
|
||||||
b8: 7c 00 7d ca stvswx v0,0,r15
|
b8: (7c 00 7d ca|ca 7d 00 7c) stvswx v0,0,r15
|
||||||
bc: 7d b7 3d ca stvswx v13,r23,r7
|
bc: (7d b7 3d ca|ca 3d b7 7d) stvswx v13,r23,r7
|
||||||
c0: 10 d1 84 03 vabsdub v6,v17,v16
|
c0: (10 d1 84 03|03 84 d1 10) vabsdub v6,v17,v16
|
||||||
c4: 12 b2 24 43 vabsduh v21,v18,v4
|
c4: (12 b2 24 43|43 24 b2 12) vabsduh v21,v18,v4
|
||||||
c8: 13 34 4c 83 vabsduw v25,v20,v9
|
c8: (13 34 4c 83|83 4c 34 13) vabsduw v25,v20,v9
|
||||||
|
#pass
|
||||||
|
|||||||
@ -2,11 +2,12 @@
|
|||||||
#objdump: -d -Maltivec -Mppc64
|
#objdump: -d -Maltivec -Mppc64
|
||||||
#name: Check that ISA extensions can be specified before CPU selection
|
#name: Check that ISA extensions can be specified before CPU selection
|
||||||
|
|
||||||
.*: +file format elf.*-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <.*>:
|
0+00 <.*>:
|
||||||
0: 7e 00 06 6c dssall
|
0: (7e 00 06 6c|6c 06 00 7e) dssall
|
||||||
4: 7d 00 83 a6 mtspr 512,r8
|
4: (7d 00 83 a6|a6 83 00 7d) mtspr 512,r8
|
||||||
8: 4c 00 00 24 rfid
|
8: (4c 00 00 24|24 00 00 4c) rfid
|
||||||
|
#pass
|
||||||
|
|||||||
@ -1,72 +1,72 @@
|
|||||||
#objdump: -Dr
|
#objdump: -Dr
|
||||||
#name: PowerPC test 1
|
#name: PowerPC test 1
|
||||||
|
|
||||||
.*: +file format elf32-powerpc
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+0000000 <foo>:
|
0+0000000 <foo>:
|
||||||
0: 60 00 00 00 nop
|
0: (60 00 00 00|00 00 00 60) nop
|
||||||
4: 60 00 00 00 nop
|
4: (60 00 00 00|00 00 00 60) nop
|
||||||
8: 60 00 00 00 nop
|
8: (60 00 00 00|00 00 00 60) nop
|
||||||
|
|
||||||
0+000000c <a>:
|
0+000000c <a>:
|
||||||
c: 48 00 00 04 b 10 <apfour>
|
c: (48 00 00 04|04 00 00 48) b 10 <apfour>
|
||||||
|
|
||||||
0+0000010 <apfour>:
|
0+0000010 <apfour>:
|
||||||
10: 48 00 00 08 b 18 <apfour\+0x8>
|
10: (48 00 00 08|08 00 00 48) b 18 <apfour\+0x8>
|
||||||
14: 48 00 00 00 b 14 <apfour\+0x4>
|
14: (48 00 00 00|00 00 00 48) b .*
|
||||||
14: R_PPC_REL24 x
|
14: R_PPC_REL24 x
|
||||||
18: 48 00 00 04 b 1c <apfour\+0xc>
|
18: (48 00 00 0.|0. 00 00 48) b .*
|
||||||
18: R_PPC_REL24 \.data\+0x4
|
18: R_PPC_REL24 \.data\+0x4
|
||||||
1c: 48 00 00 00 b 1c <apfour\+0xc>
|
1c: (48 00 00 00|00 00 00 48) b .*
|
||||||
1c: R_PPC_REL24 z
|
1c: R_PPC_REL24 z
|
||||||
20: 48 00 00 14 b 34 <apfour\+0x24>
|
20: (48 00 00 ..|.. 00 00 48) b .*
|
||||||
20: R_PPC_REL24 z\+0x14
|
20: R_PPC_REL24 z\+0x14
|
||||||
24: 48 00 00 04 b 28 <apfour\+0x18>
|
24: (48 00 00 04|04 00 00 48) b 28 <apfour\+0x18>
|
||||||
28: 48 00 00 00 b 28 <apfour\+0x18>
|
28: (48 00 00 00|00 00 00 48) b .*
|
||||||
28: R_PPC_REL24 a
|
28: R_PPC_REL24 a
|
||||||
2c: 4b ff ff e4 b 10 <apfour>
|
2c: (4b ff ff e4|e4 ff ff 4b) b 10 <apfour>
|
||||||
30: 48 00 00 04 b 34 <apfour\+0x24>
|
30: (48 00 00 0.|0. 00 00 48) b .*
|
||||||
30: R_PPC_REL24 a\+0x4
|
30: R_PPC_REL24 a\+0x4
|
||||||
34: 4b ff ff e0 b 14 <apfour\+0x4>
|
34: (4b ff ff e0|e0 ff ff 4b) b 14 <apfour\+0x4>
|
||||||
38: 48 00 00 00 b 38 <apfour\+0x28>
|
38: (48 00 00 00|00 00 00 48) b .*
|
||||||
38: R_PPC_LOCAL24PC a
|
38: R_PPC_LOCAL24PC a
|
||||||
3c: 4b ff ff d4 b 10 <apfour>
|
3c: (4b ff ff d4|d4 ff ff 4b) b 10 <apfour>
|
||||||
40: 00 00 00 40 \.long 0x40
|
40: (00 00 00 40|40 00 00 00) \.long 0x40
|
||||||
40: R_PPC_ADDR32 \.text\+0x40
|
40: R_PPC_ADDR32 \.text\+0x40
|
||||||
44: 00 00 00 4c \.long 0x4c
|
44: (00 00 00 4c|4c 00 00 00) \.long 0x4c
|
||||||
44: R_PPC_ADDR32 \.text\+0x4c
|
44: R_PPC_ADDR32 \.text\+0x4c
|
||||||
48: 00 00 00 00 \.long 0x0
|
48: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
48: R_PPC_REL32 x
|
48: R_PPC_REL32 x
|
||||||
4c: 00 00 00 04 \.long 0x4
|
4c: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
4c: R_PPC_REL32 x\+0x4
|
4c: R_PPC_REL32 x\+0x4
|
||||||
50: 00 00 00 00 \.long 0x0
|
50: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
50: R_PPC_REL32 z
|
50: R_PPC_REL32 z
|
||||||
54: 00 00 00 04 \.long 0x4
|
54: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
54: R_PPC_REL32 \.data\+0x4
|
54: R_PPC_REL32 \.data\+0x4
|
||||||
58: 00 00 00 00 \.long 0x0
|
58: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
58: R_PPC_ADDR32 x
|
58: R_PPC_ADDR32 x
|
||||||
5c: 00 00 00 04 \.long 0x4
|
5c: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
5c: R_PPC_ADDR32 \.data\+0x4
|
5c: R_PPC_ADDR32 \.data\+0x4
|
||||||
60: 00 00 00 00 \.long 0x0
|
60: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
60: R_PPC_ADDR32 z
|
60: R_PPC_ADDR32 z
|
||||||
64: ff ff ff fc fnmsub f31,f31,f31,f31
|
64: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
64: R_PPC_ADDR32 x-0x4
|
64: R_PPC_ADDR32 x-0x4
|
||||||
68: 00 00 00 00 \.long 0x0
|
68: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
68: R_PPC_ADDR32 \.data
|
68: R_PPC_ADDR32 \.data
|
||||||
6c: ff ff ff fc fnmsub f31,f31,f31,f31
|
6c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
6c: R_PPC_ADDR32 z-0x4
|
6c: R_PPC_ADDR32 z-0x4
|
||||||
70: ff ff ff 9c \.long 0xffffff9c
|
70: (ff ff ff 9c|9c ff ff ff) \.long 0xffffff9c
|
||||||
74: ff ff ff 9c \.long 0xffffff9c
|
74: (ff ff ff 9c|9c ff ff ff) \.long 0xffffff9c
|
||||||
78: 00 00 00 00 \.long 0x0
|
78: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
78: R_PPC_ADDR32 a
|
78: R_PPC_ADDR32 a
|
||||||
7c: 00 00 00 10 \.long 0x10
|
7c: (00 00 00 10|10 00 00 00) \.long 0x10
|
||||||
7c: R_PPC_ADDR32 \.text\+0x10
|
7c: R_PPC_ADDR32 \.text\+0x10
|
||||||
80: 00 00 00 10 \.long 0x10
|
80: (00 00 00 10|10 00 00 00) \.long 0x10
|
||||||
80: R_PPC_ADDR32 \.text\+0x10
|
80: R_PPC_ADDR32 \.text\+0x10
|
||||||
84: ff ff ff fc fnmsub f31,f31,f31,f31
|
84: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
88: 00 00 00 12 \.long 0x12
|
88: (00 00 00 12|12 00 00 00) \.long 0x12
|
||||||
88: R_PPC_ADDR32 \.text\+0x12
|
88: R_PPC_ADDR32 \.text\+0x12
|
||||||
8c: 00 00 00 00 \.long 0x0
|
8c: 00 00 00 00 \.long 0x0
|
||||||
Disassembly of section \.data:
|
Disassembly of section \.data:
|
||||||
|
|||||||
@ -1,83 +1,83 @@
|
|||||||
#objdump: -Dr
|
#objdump: -Dr
|
||||||
#name: PowerPC test 2
|
#name: PowerPC test 2
|
||||||
|
|
||||||
.*: +file format elf32-powerpc
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+0000000 <foo>:
|
0+0000000 <foo>:
|
||||||
0: 60 00 00 00 nop
|
0: (60 00 00 00|00 00 00 60) nop
|
||||||
4: 60 00 00 00 nop
|
4: (60 00 00 00|00 00 00 60) nop
|
||||||
8: 60 00 00 00 nop
|
8: (60 00 00 00|00 00 00 60) nop
|
||||||
c: 48 00 00 04 b 10 <foo\+0x10>
|
c: (48 00 00 04|04 00 00 48) b 10 <foo\+0x10>
|
||||||
10: 48 00 00 08 b 18 <foo\+0x18>
|
10: (48 00 00 08|08 00 00 48) b 18 <foo\+0x18>
|
||||||
14: 48 00 00 00 b 14 <foo\+0x14>
|
14: (48 00 00 00|00 00 00 48) b .*
|
||||||
14: R_PPC_REL24 x
|
14: R_PPC_REL24 x
|
||||||
18: 48 00 00 04 b 1c <foo\+0x1c>
|
18: (48 00 00 0.|0. 00 00 48) b .*
|
||||||
18: R_PPC_REL24 \.data\+0x4
|
18: R_PPC_REL24 \.data\+0x4
|
||||||
1c: 48 00 00 00 b 1c <foo\+0x1c>
|
1c: (48 00 00 00|00 00 00 48) b .*
|
||||||
1c: R_PPC_REL24 z
|
1c: R_PPC_REL24 z
|
||||||
20: 48 00 00 14 b 34 <foo\+0x34>
|
20: (48 00 00 ..|.. 00 00 48) b .*
|
||||||
20: R_PPC_REL24 z\+0x14
|
20: R_PPC_REL24 z\+0x14
|
||||||
24: 48 00 00 04 b 28 <foo\+0x28>
|
24: (48 00 00 04|04 00 00 48) b 28 <foo\+0x28>
|
||||||
28: 48 00 00 00 b 28 <foo\+0x28>
|
28: (48 00 00 00|00 00 00 48) b .*
|
||||||
28: R_PPC_REL24 a
|
28: R_PPC_REL24 a
|
||||||
2c: 48 00 00 50 b 7c <apfour>
|
2c: (48 00 00 50|50 00 00 48) b 7c <apfour>
|
||||||
30: 48 00 00 04 b 34 <foo\+0x34>
|
30: (48 00 00 0.|0. 00 00 48) b .*
|
||||||
30: R_PPC_REL24 a\+0x4
|
30: R_PPC_REL24 a\+0x4
|
||||||
34: 48 00 00 4c b 80 <apfour\+0x4>
|
34: (48 00 00 4c|4c 00 00 48) b 80 <apfour\+0x4>
|
||||||
38: 48 00 00 00 b 38 <foo\+0x38>
|
38: (48 00 00 00|00 00 00 48) b .*
|
||||||
38: R_PPC_LOCAL24PC a
|
38: R_PPC_LOCAL24PC a
|
||||||
3c: 48 00 00 40 b 7c <apfour>
|
3c: (48 00 00 40|40 00 00 48) b 7c <apfour>
|
||||||
40: 00 00 00 40 \.long 0x40
|
40: (00 00 00 40|40 00 00 00) \.long 0x40
|
||||||
40: R_PPC_ADDR32 \.text\+0x40
|
40: R_PPC_ADDR32 \.text\+0x40
|
||||||
44: 00 00 00 4c \.long 0x4c
|
44: (00 00 00 4c|4c 00 00 00) \.long 0x4c
|
||||||
44: R_PPC_ADDR32 \.text\+0x4c
|
44: R_PPC_ADDR32 \.text\+0x4c
|
||||||
48: 00 00 00 00 \.long 0x0
|
48: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
48: R_PPC_REL32 x
|
48: R_PPC_REL32 x
|
||||||
4c: 00 00 00 04 \.long 0x4
|
4c: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
4c: R_PPC_REL32 x\+0x4
|
4c: R_PPC_REL32 x\+0x4
|
||||||
50: 00 00 00 00 \.long 0x0
|
50: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
50: R_PPC_REL32 z
|
50: R_PPC_REL32 z
|
||||||
54: 00 00 00 04 \.long 0x4
|
54: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
54: R_PPC_REL32 \.data\+0x4
|
54: R_PPC_REL32 \.data\+0x4
|
||||||
58: 00 00 00 00 \.long 0x0
|
58: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
58: R_PPC_ADDR32 x
|
58: R_PPC_ADDR32 x
|
||||||
5c: 00 00 00 04 \.long 0x4
|
5c: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
5c: R_PPC_ADDR32 \.data\+0x4
|
5c: R_PPC_ADDR32 \.data\+0x4
|
||||||
60: 00 00 00 00 \.long 0x0
|
60: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
60: R_PPC_ADDR32 z
|
60: R_PPC_ADDR32 z
|
||||||
64: ff ff ff fc fnmsub f31,f31,f31,f31
|
64: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
64: R_PPC_ADDR32 x-0x4
|
64: R_PPC_ADDR32 x-0x4
|
||||||
68: 00 00 00 00 \.long 0x0
|
68: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
68: R_PPC_ADDR32 \.data
|
68: R_PPC_ADDR32 \.data
|
||||||
6c: ff ff ff fc fnmsub f31,f31,f31,f31
|
6c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
6c: R_PPC_ADDR32 z-0x4
|
6c: R_PPC_ADDR32 z-0x4
|
||||||
70: 00 00 00 08 \.long 0x8
|
70: (00 00 00 08|08 00 00 00) \.long 0x8
|
||||||
74: 00 00 00 08 \.long 0x8
|
74: (00 00 00 08|08 00 00 00) \.long 0x8
|
||||||
|
|
||||||
0+0000078 <a>:
|
0+0000078 <a>:
|
||||||
78: 00 00 00 00 \.long 0x0
|
78: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
78: R_PPC_ADDR32 a
|
78: R_PPC_ADDR32 a
|
||||||
|
|
||||||
0+000007c <apfour>:
|
0+000007c <apfour>:
|
||||||
7c: 00 00 00 7c \.long 0x7c
|
7c: (00 00 00 7c|7c 00 00 00) \.long 0x7c
|
||||||
7c: R_PPC_ADDR32 \.text\+0x7c
|
7c: R_PPC_ADDR32 \.text\+0x7c
|
||||||
80: 00 00 00 7c \.long 0x7c
|
80: (00 00 00 7c|7c 00 00 00) \.long 0x7c
|
||||||
80: R_PPC_ADDR32 \.text\+0x7c
|
80: R_PPC_ADDR32 \.text\+0x7c
|
||||||
84: ff ff ff fc fnmsub f31,f31,f31,f31
|
84: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
88: 00 00 00 7e \.long 0x7e
|
88: (00 00 00 7e|7e 00 00 00) \.long 0x7e
|
||||||
88: R_PPC_ADDR32 \.text\+0x7e
|
88: R_PPC_ADDR32 \.text\+0x7e
|
||||||
8c: 00 00 00 00 \.long 0x0
|
8c: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
90: 60 00 00 00 nop
|
90: (60 00 00 00|00 00 00 60) nop
|
||||||
94: 40 a5 ff fc ble- cr1,90 <apfour\+0x14>
|
94: (40 a5 ff fc|fc ff a5 40) ble- cr1,90 <apfour\+0x14>
|
||||||
98: 41 a9 ff f8 bgt- cr2,90 <apfour\+0x14>
|
98: (41 a9 ff f8|f8 ff a9 41) bgt- cr2,90 <apfour\+0x14>
|
||||||
9c: 40 8d ff f4 ble\+ cr3,90 <apfour\+0x14>
|
9c: (40 8d ff f4|f4 ff 8d 40) ble\+ cr3,90 <apfour\+0x14>
|
||||||
a0: 41 91 ff f0 bgt\+ cr4,90 <apfour\+0x14>
|
a0: (41 91 ff f0|f0 ff 91 41) bgt\+ cr4,90 <apfour\+0x14>
|
||||||
a4: 40 95 00 10 ble- cr5,b4 <nop>
|
a4: (40 95 00 10|10 00 95 40) ble- cr5,b4 <nop>
|
||||||
a8: 41 99 00 0c bgt- cr6,b4 <nop>
|
a8: (41 99 00 0c|0c 00 99 41) bgt- cr6,b4 <nop>
|
||||||
ac: 40 bd 00 08 ble\+ cr7,b4 <nop>
|
ac: (40 bd 00 08|08 00 bd 40) ble\+ cr7,b4 <nop>
|
||||||
b0: 41 a1 00 04 bgt\+ b4 <nop>
|
b0: (41 a1 00 04|04 00 a1 41) bgt\+ b4 <nop>
|
||||||
Disassembly of section \.data:
|
Disassembly of section \.data:
|
||||||
|
|
||||||
0+0000000 <x>:
|
0+0000000 <x>:
|
||||||
|
|||||||
@ -1,71 +1,71 @@
|
|||||||
#objdump: -Dr
|
#objdump: -Dr
|
||||||
#name: PowerPC 64-bit test 2
|
#name: PowerPC 64-bit test 2
|
||||||
|
|
||||||
.*: +file format elf64-powerpc
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0000000000000000 <foo>:
|
0000000000000000 <foo>:
|
||||||
0: 60 00 00 00 nop
|
0: (60 00 00 00|00 00 00 60) nop
|
||||||
4: 60 00 00 00 nop
|
4: (60 00 00 00|00 00 00 60) nop
|
||||||
8: 60 00 00 00 nop
|
8: (60 00 00 00|00 00 00 60) nop
|
||||||
c: 48 00 00 04 b 10 <foo\+0x10>
|
c: (48 00 00 04|04 00 00 48) b 10 <foo\+0x10>
|
||||||
10: 48 00 00 08 b 18 <foo\+0x18>
|
10: (48 00 00 08|08 00 00 48) b 18 <foo\+0x18>
|
||||||
14: 48 00 00 00 b 14 <foo\+0x14>
|
14: (48 00 00 00|00 00 00 48) b .*
|
||||||
14: R_PPC64_REL24 x
|
14: R_PPC64_REL24 x
|
||||||
18: 48 00 00 04 b 1c <foo\+0x1c>
|
18: (48 00 00 0.|0. 00 00 48) b .*
|
||||||
18: R_PPC64_REL24 \.data\+0x4
|
18: R_PPC64_REL24 \.data\+0x4
|
||||||
1c: 48 00 00 00 b 1c <foo\+0x1c>
|
1c: (48 00 00 00|00 00 00 48) b .*
|
||||||
1c: R_PPC64_REL24 z
|
1c: R_PPC64_REL24 z
|
||||||
20: 48 00 00 14 b 34 <foo\+0x34>
|
20: (48 00 00 ..|.. 00 00 48) b .*
|
||||||
20: R_PPC64_REL24 z\+0x14
|
20: R_PPC64_REL24 z\+0x14
|
||||||
24: 48 00 00 04 b 28 <foo\+0x28>
|
24: (48 00 00 04|04 00 00 48) b 28 <foo\+0x28>
|
||||||
28: 48 00 00 00 b 28 <foo\+0x28>
|
28: (48 00 00 00|00 00 00 48) b .*
|
||||||
28: R_PPC64_REL24 a
|
28: R_PPC64_REL24 a
|
||||||
2c: 48 00 00 48 b 74 <apfour>
|
2c: (48 00 00 48|48 00 00 48) b 74 <apfour>
|
||||||
30: 48 00 00 04 b 34 <foo\+0x34>
|
30: (48 00 00 0.|0. 00 00 48) b .*
|
||||||
30: R_PPC64_REL24 a\+0x4
|
30: R_PPC64_REL24 a\+0x4
|
||||||
34: 48 00 00 44 b 78 <apfour\+0x4>
|
34: (48 00 00 44|44 00 00 48) b 78 <apfour\+0x4>
|
||||||
38: 00 00 00 38 \.long 0x38
|
38: (00 00 00 38|38 00 00 00) \.long 0x38
|
||||||
38: R_PPC64_ADDR32 \.text\+0x38
|
38: R_PPC64_ADDR32 \.text\+0x38
|
||||||
3c: 00 00 00 44 \.long 0x44
|
3c: (00 00 00 44|44 00 00 00) \.long 0x44
|
||||||
3c: R_PPC64_ADDR32 \.text\+0x44
|
3c: R_PPC64_ADDR32 \.text\+0x44
|
||||||
40: 00 00 00 00 \.long 0x0
|
40: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
40: R_PPC64_REL32 x
|
40: R_PPC64_REL32 x
|
||||||
44: 00 00 00 04 \.long 0x4
|
44: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
44: R_PPC64_REL32 x\+0x4
|
44: R_PPC64_REL32 x\+0x4
|
||||||
48: 00 00 00 00 \.long 0x0
|
48: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
48: R_PPC64_REL32 z
|
48: R_PPC64_REL32 z
|
||||||
4c: 00 00 00 04 \.long 0x4
|
4c: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
4c: R_PPC64_REL32 \.data\+0x4
|
4c: R_PPC64_REL32 \.data\+0x4
|
||||||
50: 00 00 00 00 \.long 0x0
|
50: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
50: R_PPC64_ADDR32 x
|
50: R_PPC64_ADDR32 x
|
||||||
54: 00 00 00 04 \.long 0x4
|
54: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
54: R_PPC64_ADDR32 \.data\+0x4
|
54: R_PPC64_ADDR32 \.data\+0x4
|
||||||
58: 00 00 00 00 \.long 0x0
|
58: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
58: R_PPC64_ADDR32 z
|
58: R_PPC64_ADDR32 z
|
||||||
5c: ff ff ff fc fnmsub f31,f31,f31,f31
|
5c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
5c: R_PPC64_ADDR32 x-0x4
|
5c: R_PPC64_ADDR32 x-0x4
|
||||||
60: 00 00 00 00 \.long 0x0
|
60: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
60: R_PPC64_ADDR32 \.data
|
60: R_PPC64_ADDR32 \.data
|
||||||
64: ff ff ff fc fnmsub f31,f31,f31,f31
|
64: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
64: R_PPC64_ADDR32 z-0x4
|
64: R_PPC64_ADDR32 z-0x4
|
||||||
68: 00 00 00 08 \.long 0x8
|
68: (00 00 00 08|08 00 00 00) \.long 0x8
|
||||||
6c: 00 00 00 08 \.long 0x8
|
6c: (00 00 00 08|08 00 00 00) \.long 0x8
|
||||||
|
|
||||||
0000000000000070 <a>:
|
0000000000000070 <a>:
|
||||||
70: 00 00 00 00 \.long 0x0
|
70: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
70: R_PPC64_ADDR32 a
|
70: R_PPC64_ADDR32 a
|
||||||
|
|
||||||
0000000000000074 <apfour>:
|
0000000000000074 <apfour>:
|
||||||
74: 00 00 00 74 \.long 0x74
|
74: (00 00 00 74|74 00 00 00) \.long 0x74
|
||||||
74: R_PPC64_ADDR32 \.text\+0x74
|
74: R_PPC64_ADDR32 \.text\+0x74
|
||||||
78: 00 00 00 74 \.long 0x74
|
78: (00 00 00 74|74 00 00 00) \.long 0x74
|
||||||
78: R_PPC64_ADDR32 \.text\+0x74
|
78: R_PPC64_ADDR32 \.text\+0x74
|
||||||
7c: ff ff ff fc fnmsub f31,f31,f31,f31
|
7c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
80: 00 00 00 76 \.long 0x76
|
80: (00 00 00 76|76 00 00 00) \.long 0x76
|
||||||
80: R_PPC64_ADDR32 \.text\+0x76
|
80: R_PPC64_ADDR32 \.text\+0x76
|
||||||
84: 00 00 00 00 \.long 0x0
|
84: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
Disassembly of section \.data:
|
Disassembly of section \.data:
|
||||||
|
|
||||||
0000000000000000 <x>:
|
0000000000000000 <x>:
|
||||||
|
|||||||
@ -1,71 +1,71 @@
|
|||||||
#objdump: -Dr
|
#objdump: -Dr
|
||||||
#name: PowerPC 64-bit test 1
|
#name: PowerPC 64-bit test 1
|
||||||
|
|
||||||
.*: +file format elf64-powerpc
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0000000000000000 <foo>:
|
0000000000000000 <foo>:
|
||||||
0: 60 00 00 00 nop
|
0: (60 00 00 00|00 00 00 60) nop
|
||||||
4: 60 00 00 00 nop
|
4: (60 00 00 00|00 00 00 60) nop
|
||||||
8: 60 00 00 00 nop
|
8: (60 00 00 00|00 00 00 60) nop
|
||||||
|
|
||||||
000000000000000c <a>:
|
000000000000000c <a>:
|
||||||
c: 48 00 00 04 b 10 <apfour>
|
c: (48 00 00 04|04 00 00 48) b 10 <apfour>
|
||||||
|
|
||||||
0000000000000010 <apfour>:
|
0000000000000010 <apfour>:
|
||||||
10: 48 00 00 08 b 18 <apfour\+0x8>
|
10: (48 00 00 08|08 00 00 48) b 18 <apfour\+0x8>
|
||||||
14: 48 00 00 00 b 14 <apfour\+0x4>
|
14: (48 00 00 00|00 00 00 48) b .*
|
||||||
14: R_PPC64_REL24 x
|
14: R_PPC64_REL24 x
|
||||||
18: 48 00 00 04 b 1c <apfour\+0xc>
|
18: (48 00 00 0.|0. 00 00 48) b .*
|
||||||
18: R_PPC64_REL24 \.data\+0x4
|
18: R_PPC64_REL24 \.data\+0x4
|
||||||
1c: 48 00 00 00 b 1c <apfour\+0xc>
|
1c: (48 00 00 00|00 00 00 48) b .*
|
||||||
1c: R_PPC64_REL24 z
|
1c: R_PPC64_REL24 z
|
||||||
20: 48 00 00 14 b 34 <apfour\+0x24>
|
20: (48 00 00 ..|.. 00 00 48) b .*
|
||||||
20: R_PPC64_REL24 z\+0x14
|
20: R_PPC64_REL24 z\+0x14
|
||||||
24: 48 00 00 04 b 28 <apfour\+0x18>
|
24: (48 00 00 04|04 00 00 48) b 28 <apfour\+0x18>
|
||||||
28: 48 00 00 00 b 28 <apfour\+0x18>
|
28: (48 00 00 00|00 00 00 48) b .*
|
||||||
28: R_PPC64_REL24 a
|
28: R_PPC64_REL24 a
|
||||||
2c: 4b ff ff e4 b 10 <apfour>
|
2c: (4b ff ff e4|e4 ff ff 4b) b 10 <apfour>
|
||||||
30: 48 00 00 04 b 34 <apfour\+0x24>
|
30: (48 00 00 0.|0. 00 00 48) b .*
|
||||||
30: R_PPC64_REL24 a\+0x4
|
30: R_PPC64_REL24 a\+0x4
|
||||||
34: 4b ff ff e0 b 14 <apfour\+0x4>
|
34: (4b ff ff e0|e0 ff ff 4b) b 14 <apfour\+0x4>
|
||||||
38: 00 00 00 38 \.long 0x38
|
38: (00 00 00 38|38 00 00 00) \.long 0x38
|
||||||
38: R_PPC64_ADDR32 \.text\+0x38
|
38: R_PPC64_ADDR32 \.text\+0x38
|
||||||
3c: 00 00 00 44 \.long 0x44
|
3c: (00 00 00 44|44 00 00 00) \.long 0x44
|
||||||
3c: R_PPC64_ADDR32 \.text\+0x44
|
3c: R_PPC64_ADDR32 \.text\+0x44
|
||||||
40: 00 00 00 00 \.long 0x0
|
40: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
40: R_PPC64_REL32 x
|
40: R_PPC64_REL32 x
|
||||||
44: 00 00 00 04 \.long 0x4
|
44: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
44: R_PPC64_REL32 x\+0x4
|
44: R_PPC64_REL32 x\+0x4
|
||||||
48: 00 00 00 00 \.long 0x0
|
48: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
48: R_PPC64_REL32 z
|
48: R_PPC64_REL32 z
|
||||||
4c: 00 00 00 04 \.long 0x4
|
4c: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
4c: R_PPC64_REL32 \.data\+0x4
|
4c: R_PPC64_REL32 \.data\+0x4
|
||||||
50: 00 00 00 00 \.long 0x0
|
50: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
50: R_PPC64_ADDR32 x
|
50: R_PPC64_ADDR32 x
|
||||||
54: 00 00 00 04 \.long 0x4
|
54: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
54: R_PPC64_ADDR32 \.data\+0x4
|
54: R_PPC64_ADDR32 \.data\+0x4
|
||||||
58: 00 00 00 00 \.long 0x0
|
58: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
58: R_PPC64_ADDR32 z
|
58: R_PPC64_ADDR32 z
|
||||||
5c: ff ff ff fc fnmsub f31,f31,f31,f31
|
5c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
5c: R_PPC64_ADDR32 x-0x4
|
5c: R_PPC64_ADDR32 x-0x4
|
||||||
60: 00 00 00 00 \.long 0x0
|
60: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
60: R_PPC64_ADDR32 \.data
|
60: R_PPC64_ADDR32 \.data
|
||||||
64: ff ff ff fc fnmsub f31,f31,f31,f31
|
64: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
64: R_PPC64_ADDR32 z-0x4
|
64: R_PPC64_ADDR32 z-0x4
|
||||||
68: ff ff ff a4 \.long 0xffffffa4
|
68: (ff ff ff a4|a4 ff ff ff) \.long 0xffffffa4
|
||||||
6c: ff ff ff a4 \.long 0xffffffa4
|
6c: (ff ff ff a4|a4 ff ff ff) \.long 0xffffffa4
|
||||||
70: 00 00 00 00 \.long 0x0
|
70: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
70: R_PPC64_ADDR32 a
|
70: R_PPC64_ADDR32 a
|
||||||
74: 00 00 00 10 \.long 0x10
|
74: (00 00 00 10|10 00 00 00) \.long 0x10
|
||||||
74: R_PPC64_ADDR32 \.text\+0x10
|
74: R_PPC64_ADDR32 \.text\+0x10
|
||||||
78: 00 00 00 10 \.long 0x10
|
78: (00 00 00 10|10 00 00 00) \.long 0x10
|
||||||
78: R_PPC64_ADDR32 \.text\+0x10
|
78: R_PPC64_ADDR32 \.text\+0x10
|
||||||
7c: ff ff ff fc fnmsub f31,f31,f31,f31
|
7c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
80: 00 00 00 12 \.long 0x12
|
80: (00 00 00 12|12 00 00 00) \.long 0x12
|
||||||
80: R_PPC64_ADDR32 \.text\+0x12
|
80: R_PPC64_ADDR32 \.text\+0x12
|
||||||
84: 00 00 00 00 \.long 0x0
|
84: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
Disassembly of section \.data:
|
Disassembly of section \.data:
|
||||||
|
|
||||||
0000000000000000 <x>:
|
0000000000000000 <x>:
|
||||||
|
|||||||
@ -2,42 +2,42 @@
|
|||||||
#objdump: -dr -Mbooke
|
#objdump: -dr -Mbooke
|
||||||
#name: BookE tests
|
#name: BookE tests
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+0000000 <branch_target_1>:
|
0+0000000 <branch_target_1>:
|
||||||
0: 7c a8 48 2c icbt 5,r8,r9
|
0: (7c a8 48 2c|2c 48 a8 7c) icbt 5,r8,r9
|
||||||
4: 7c a6 02 26 mfapidi r5,r6
|
4: (7c a6 02 26|26 02 a6 7c) mfapidi r5,r6
|
||||||
8: 7c 07 46 24 tlbivax r7,r8
|
8: (7c 07 46 24|24 46 07 7c) tlbivax r7,r8
|
||||||
c: 7c 0b 67 24 tlbsx r11,r12
|
c: (7c 0b 67 24|24 67 0b 7c) tlbsx r11,r12
|
||||||
10: 7c 00 07 a4 tlbwe
|
10: (7c 00 07 a4|a4 07 00 7c) tlbwe
|
||||||
14: 7c 00 07 a4 tlbwe
|
14: (7c 00 07 a4|a4 07 00 7c) tlbwe
|
||||||
18: 7c 21 0f a4 tlbwe r1,r1,1
|
18: (7c 21 0f a4|a4 0f 21 7c) tlbwe r1,r1,1
|
||||||
|
|
||||||
0+000001c <branch_target_2>:
|
0+000001c <branch_target_2>:
|
||||||
1c: 4c 00 00 66 rfci
|
1c: (4c 00 00 66|66 00 00 4c) rfci
|
||||||
20: 7c 60 01 06 wrtee r3
|
20: (7c 60 01 06|06 01 60 7c) wrtee r3
|
||||||
24: 7c 00 81 46 wrteei 1
|
24: (7c 00 81 46|46 81 00 7c) wrteei 1
|
||||||
28: 7c 85 02 06 mfdcrx r4,r5
|
28: (7c 85 02 06|06 02 85 7c) mfdcrx r4,r5
|
||||||
2c: 7c aa 3a 86 mfdcr r5,234
|
2c: (7c aa 3a 86|86 3a aa 7c) mfdcr r5,234
|
||||||
30: 7c e6 03 06 mtdcrx r6,r7
|
30: (7c e6 03 06|06 03 e6 7c) mtdcrx r6,r7
|
||||||
34: 7d 10 6b 86 mtdcr 432,r8
|
34: (7d 10 6b 86|86 6b 10 7d) mtdcr 432,r8
|
||||||
38: 7c 00 04 ac msync
|
38: (7c 00 04 ac|ac 04 00 7c) msync
|
||||||
3c: 7c 09 55 ec dcba r9,r10
|
3c: (7c 09 55 ec|ec 55 09 7c) dcba r9,r10
|
||||||
40: 7c 00 06 ac mbar
|
40: (7c 00 06 ac|ac 06 00 7c) mbar
|
||||||
44: 7c 00 06 ac mbar
|
44: (7c 00 06 ac|ac 06 00 7c) mbar
|
||||||
48: 7c 20 06 ac mbar 1
|
48: (7c 20 06 ac|ac 06 20 7c) mbar 1
|
||||||
4c: 7d 8d 77 24 tlbsx r12,r13,r14
|
4c: (7d 8d 77 24|24 77 8d 7d) tlbsx r12,r13,r14
|
||||||
50: 7d 8d 77 25 tlbsx\. r12,r13,r14
|
50: (7d 8d 77 25|25 77 8d 7d) tlbsx\. r12,r13,r14
|
||||||
54: 7c 12 42 a6 mfsprg r0,2
|
54: (7c 12 42 a6|a6 42 12 7c) mfsprg r0,2
|
||||||
58: 7c 12 42 a6 mfsprg r0,2
|
58: (7c 12 42 a6|a6 42 12 7c) mfsprg r0,2
|
||||||
5c: 7c 12 43 a6 mtsprg 2,r0
|
5c: (7c 12 43 a6|a6 43 12 7c) mtsprg 2,r0
|
||||||
60: 7c 12 43 a6 mtsprg 2,r0
|
60: (7c 12 43 a6|a6 43 12 7c) mtsprg 2,r0
|
||||||
64: 7c 07 42 a6 mfsprg r0,7
|
64: (7c 07 42 a6|a6 42 07 7c) mfsprg r0,7
|
||||||
68: 7c 07 42 a6 mfsprg r0,7
|
68: (7c 07 42 a6|a6 42 07 7c) mfsprg r0,7
|
||||||
6c: 7c 17 43 a6 mtsprg 7,r0
|
6c: (7c 17 43 a6|a6 43 17 7c) mtsprg 7,r0
|
||||||
70: 7c 17 43 a6 mtsprg 7,r0
|
70: (7c 17 43 a6|a6 43 17 7c) mtsprg 7,r0
|
||||||
74: 7c 05 32 2c dcbt r5,r6
|
74: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
|
||||||
78: 7c 05 32 2c dcbt r5,r6
|
78: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
|
||||||
7c: 7d 05 32 2c dcbt 8,r5,r6
|
7c: (7d 05 32 2c|2c 32 05 7d) dcbt 8,r5,r6
|
||||||
|
|||||||
@ -1,6 +1,6 @@
|
|||||||
# Motorola PowerPC BookE tests
|
# Motorola PowerPC BookE tests
|
||||||
#as: -mbooke
|
#as: -mbooke
|
||||||
.section ".text"
|
.text
|
||||||
|
|
||||||
branch_target_1:
|
branch_target_1:
|
||||||
icbt 5, 8, 9
|
icbt 5, 8, 9
|
||||||
|
|||||||
@ -3,35 +3,35 @@
|
|||||||
#name: Cell tests (includes Altivec)
|
#name: Cell tests (includes Altivec)
|
||||||
|
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <.text>:
|
0+00 <.text>:
|
||||||
0: 7c 01 14 0e lvlx v0,r1,r2
|
0: (7c 01 14 0e|0e 14 01 7c) lvlx v0,r1,r2
|
||||||
4: 7c 00 14 0e lvlx v0,0,r2
|
4: (7c 00 14 0e|0e 14 00 7c) lvlx v0,0,r2
|
||||||
8: 7c 01 16 0e lvlxl v0,r1,r2
|
8: (7c 01 16 0e|0e 16 01 7c) lvlxl v0,r1,r2
|
||||||
c: 7c 00 16 0e lvlxl v0,0,r2
|
c: (7c 00 16 0e|0e 16 00 7c) lvlxl v0,0,r2
|
||||||
10: 7c 01 14 4e lvrx v0,r1,r2
|
10: (7c 01 14 4e|4e 14 01 7c) lvrx v0,r1,r2
|
||||||
14: 7c 00 14 4e lvrx v0,0,r2
|
14: (7c 00 14 4e|4e 14 00 7c) lvrx v0,0,r2
|
||||||
18: 7c 01 16 4e lvrxl v0,r1,r2
|
18: (7c 01 16 4e|4e 16 01 7c) lvrxl v0,r1,r2
|
||||||
1c: 7c 00 16 4e lvrxl v0,0,r2
|
1c: (7c 00 16 4e|4e 16 00 7c) lvrxl v0,0,r2
|
||||||
20: 7c 01 15 0e stvlx v0,r1,r2
|
20: (7c 01 15 0e|0e 15 01 7c) stvlx v0,r1,r2
|
||||||
24: 7c 00 15 0e stvlx v0,0,r2
|
24: (7c 00 15 0e|0e 15 00 7c) stvlx v0,0,r2
|
||||||
28: 7c 01 17 0e stvlxl v0,r1,r2
|
28: (7c 01 17 0e|0e 17 01 7c) stvlxl v0,r1,r2
|
||||||
2c: 7c 00 17 0e stvlxl v0,0,r2
|
2c: (7c 00 17 0e|0e 17 00 7c) stvlxl v0,0,r2
|
||||||
30: 7c 01 15 4e stvrx v0,r1,r2
|
30: (7c 01 15 4e|4e 15 01 7c) stvrx v0,r1,r2
|
||||||
34: 7c 00 15 4e stvrx v0,0,r2
|
34: (7c 00 15 4e|4e 15 00 7c) stvrx v0,0,r2
|
||||||
38: 7c 01 17 4e stvrxl v0,r1,r2
|
38: (7c 01 17 4e|4e 17 01 7c) stvrxl v0,r1,r2
|
||||||
3c: 7c 00 17 4e stvrxl v0,0,r2
|
3c: (7c 00 17 4e|4e 17 00 7c) stvrxl v0,0,r2
|
||||||
40: 7c 00 0c 28 ldbrx r0,0,r1
|
40: (7c 00 0c 28|28 0c 00 7c) ldbrx r0,0,r1
|
||||||
44: 7c 01 14 28 ldbrx r0,r1,r2
|
44: (7c 01 14 28|28 14 01 7c) ldbrx r0,r1,r2
|
||||||
48: 7c 00 0d 28 stdbrx r0,0,r1
|
48: (7c 00 0d 28|28 0d 00 7c) stdbrx r0,0,r1
|
||||||
4c: 7c 01 15 28 stdbrx r0,r1,r2
|
4c: (7c 01 15 28|28 15 01 7c) stdbrx r0,r1,r2
|
||||||
50: 7c 60 06 6c dss 3
|
50: (7c 60 06 6c|6c 06 60 7c) dss 3
|
||||||
54: 7e 00 06 6c dssall
|
54: (7e 00 06 6c|6c 06 00 7e) dssall
|
||||||
58: 7c 25 22 ac dst r5,r4,1
|
58: (7c 25 22 ac|ac 22 25 7c) dst r5,r4,1
|
||||||
5c: 7e 08 3a ac dstt r8,r7,0
|
5c: (7e 08 3a ac|ac 3a 08 7e) dstt r8,r7,0
|
||||||
60: 7c 65 32 ec dstst r5,r6,3
|
60: (7c 65 32 ec|ec 32 65 7c) dstst r5,r6,3
|
||||||
64: 7e 44 2a ec dststt r4,r5,2
|
64: (7e 44 2a ec|ec 2a 44 7e) dststt r4,r5,2
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section ".text"
|
.text
|
||||||
lvlx %r0, %r1, %r2
|
lvlx %r0, %r1, %r2
|
||||||
lvlx %r0, 0, %r2
|
lvlx %r0, 0, %r2
|
||||||
lvlxl %r0, %r1, %r2
|
lvlxl %r0, %r1, %r2
|
||||||
|
|||||||
@ -2,193 +2,193 @@
|
|||||||
#as: -a32 -mcom
|
#as: -a32 -mcom
|
||||||
#name: PowerPC COMMON instructions
|
#name: PowerPC COMMON instructions
|
||||||
|
|
||||||
.*: +file format elf32-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <start>:
|
0+00 <start>:
|
||||||
|
|
||||||
0: 7c 83 28 39 and. r3,r4,r5
|
0: (7c 83 28 39|39 28 83 7c) and. r3,r4,r5
|
||||||
4: 7c 83 28 38 and r3,r4,r5
|
4: (7c 83 28 38|38 28 83 7c) and r3,r4,r5
|
||||||
8: 7d cd 78 78 andc r13,r14,r15
|
8: (7d cd 78 78|78 78 cd 7d) andc r13,r14,r15
|
||||||
c: 7e 30 90 79 andc. r16,r17,r18
|
c: (7e 30 90 79|79 90 30 7e) andc. r16,r17,r18
|
||||||
10: 48 00 00 02 ba 0 <start>
|
10: (48 00 00 02|02 00 00 48) ba 0 <start>
|
||||||
14: 40 01 00 00 bdnzf- 1,14 <start\+0x14>
|
14: (40 01 00 00|00 00 01 40) bdnzf- 1,14 <start\+0x14>
|
||||||
18: 40 85 00 02 blea- 1,0 <start>
|
18: (40 85 00 02|02 00 85 40) blea- 1,0 <start>
|
||||||
1c: 40 43 00 01 bdzfl- 3,1c <start\+0x1c>
|
1c: (40 43 00 01|01 00 43 40) bdzfl- 3,1c <start\+0x1c>
|
||||||
20: 41 47 00 03 bdztla- 7,0 <start>
|
20: (41 47 00 03|03 00 47 41) bdztla- 7,0 <start>
|
||||||
24: 4e 80 04 20 bctr
|
24: (4e 80 04 20|20 04 80 4e) bctr
|
||||||
28: 4e 80 04 21 bctrl
|
28: (4e 80 04 21|21 04 80 4e) bctrl
|
||||||
2c: 42 40 00 02 bdza- 0 <start>
|
2c: (42 40 00 02|02 00 40 42) bdza- 0 <start>
|
||||||
30: 42 40 00 00 bdz- 30 <start\+0x30>
|
30: (42 40 00 00|00 00 40 42) bdz- 30 <start\+0x30>
|
||||||
34: 42 40 00 03 bdzla- 0 <start>
|
34: (42 40 00 03|03 00 40 42) bdzla- 0 <start>
|
||||||
38: 42 40 00 01 bdzl- 38 <start\+0x38>
|
38: (42 40 00 01|01 00 40 42) bdzl- 38 <start\+0x38>
|
||||||
3c: 41 82 00 00 beq- 3c <start\+0x3c>
|
3c: (41 82 00 00|00 00 82 41) beq- 3c <start\+0x3c>
|
||||||
40: 41 8a 00 02 beqa- 2,0 <start>
|
40: (41 8a 00 02|02 00 8a 41) beqa- 2,0 <start>
|
||||||
44: 41 86 00 01 beql- 1,44 <start\+0x44>
|
44: (41 86 00 01|01 00 86 41) beql- 1,44 <start\+0x44>
|
||||||
48: 41 8e 00 03 beqla- 3,0 <start>
|
48: (41 8e 00 03|03 00 8e 41) beqla- 3,0 <start>
|
||||||
4c: 40 80 00 00 bge- 4c <start\+0x4c>
|
4c: (40 80 00 00|00 00 80 40) bge- 4c <start\+0x4c>
|
||||||
50: 40 90 00 02 bgea- 4,0 <start>
|
50: (40 90 00 02|02 00 90 40) bgea- 4,0 <start>
|
||||||
54: 40 88 00 01 bgel- 2,54 <start\+0x54>
|
54: (40 88 00 01|01 00 88 40) bgel- 2,54 <start\+0x54>
|
||||||
58: 40 98 00 03 bgela- 6,0 <start>
|
58: (40 98 00 03|03 00 98 40) bgela- 6,0 <start>
|
||||||
5c: 41 91 00 00 bgt- 4,5c <start\+0x5c>
|
5c: (41 91 00 00|00 00 91 41) bgt- 4,5c <start\+0x5c>
|
||||||
60: 41 99 00 02 bgta- 6,0 <start>
|
60: (41 99 00 02|02 00 99 41) bgta- 6,0 <start>
|
||||||
64: 41 95 00 01 bgtl- 5,64 <start\+0x64>
|
64: (41 95 00 01|01 00 95 41) bgtl- 5,64 <start\+0x64>
|
||||||
68: 41 9d 00 03 bgtla- 7,0 <start>
|
68: (41 9d 00 03|03 00 9d 41) bgtla- 7,0 <start>
|
||||||
6c: 48 00 00 00 b 6c <start\+0x6c>
|
6c: (48 00 00 00|00 00 00 48) b 6c <start\+0x6c>
|
||||||
70: 48 00 00 03 bla 0 <start>
|
70: (48 00 00 03|03 00 00 48) bla 0 <start>
|
||||||
74: 40 81 00 00 ble- 74 <start\+0x74>
|
74: (40 81 00 00|00 00 81 40) ble- 74 <start\+0x74>
|
||||||
78: 40 91 00 02 blea- 4,0 <start>
|
78: (40 91 00 02|02 00 91 40) blea- 4,0 <start>
|
||||||
7c: 40 89 00 01 blel- 2,7c <start\+0x7c>
|
7c: (40 89 00 01|01 00 89 40) blel- 2,7c <start\+0x7c>
|
||||||
80: 40 99 00 03 blela- 6,0 <start>
|
80: (40 99 00 03|03 00 99 40) blela- 6,0 <start>
|
||||||
84: 48 00 00 01 bl 84 <start\+0x84>
|
84: (48 00 00 01|01 00 00 48) bl 84 <start\+0x84>
|
||||||
88: 41 80 00 00 blt- 88 <start\+0x88>
|
88: (41 80 00 00|00 00 80 41) blt- 88 <start\+0x88>
|
||||||
8c: 41 88 00 02 blta- 2,0 <start>
|
8c: (41 88 00 02|02 00 88 41) blta- 2,0 <start>
|
||||||
90: 41 84 00 01 bltl- 1,90 <start\+0x90>
|
90: (41 84 00 01|01 00 84 41) bltl- 1,90 <start\+0x90>
|
||||||
94: 41 8c 00 03 bltla- 3,0 <start>
|
94: (41 8c 00 03|03 00 8c 41) bltla- 3,0 <start>
|
||||||
98: 40 82 00 00 bne- 98 <start\+0x98>
|
98: (40 82 00 00|00 00 82 40) bne- 98 <start\+0x98>
|
||||||
9c: 40 8a 00 02 bnea- 2,0 <start>
|
9c: (40 8a 00 02|02 00 8a 40) bnea- 2,0 <start>
|
||||||
a0: 40 86 00 01 bnel- 1,a0 <start\+0xa0>
|
a0: (40 86 00 01|01 00 86 40) bnel- 1,a0 <start\+0xa0>
|
||||||
a4: 40 8e 00 03 bnela- 3,0 <start>
|
a4: (40 8e 00 03|03 00 8e 40) bnela- 3,0 <start>
|
||||||
a8: 40 85 00 00 ble- 1,a8 <start\+0xa8>
|
a8: (40 85 00 00|00 00 85 40) ble- 1,a8 <start\+0xa8>
|
||||||
ac: 40 95 00 02 blea- 5,0 <start>
|
ac: (40 95 00 02|02 00 95 40) blea- 5,0 <start>
|
||||||
b0: 40 8d 00 01 blel- 3,b0 <start\+0xb0>
|
b0: (40 8d 00 01|01 00 8d 40) blel- 3,b0 <start\+0xb0>
|
||||||
b4: 40 9d 00 03 blela- 7,0 <start>
|
b4: (40 9d 00 03|03 00 9d 40) blela- 7,0 <start>
|
||||||
b8: 40 84 00 00 bge- 1,b8 <start\+0xb8>
|
b8: (40 84 00 00|00 00 84 40) bge- 1,b8 <start\+0xb8>
|
||||||
bc: 40 94 00 02 bgea- 5,0 <start>
|
bc: (40 94 00 02|02 00 94 40) bgea- 5,0 <start>
|
||||||
c0: 40 8c 00 01 bgel- 3,c0 <start\+0xc0>
|
c0: (40 8c 00 01|01 00 8c 40) bgel- 3,c0 <start\+0xc0>
|
||||||
c4: 40 9c 00 03 bgela- 7,0 <start>
|
c4: (40 9c 00 03|03 00 9c 40) bgela- 7,0 <start>
|
||||||
c8: 40 93 00 00 bns- 4,c8 <start\+0xc8>
|
c8: (40 93 00 00|00 00 93 40) bns- 4,c8 <start\+0xc8>
|
||||||
cc: 40 9b 00 02 bnsa- 6,0 <start>
|
cc: (40 9b 00 02|02 00 9b 40) bnsa- 6,0 <start>
|
||||||
d0: 40 97 00 01 bnsl- 5,d0 <start\+0xd0>
|
d0: (40 97 00 01|01 00 97 40) bnsl- 5,d0 <start\+0xd0>
|
||||||
d4: 40 9f 00 03 bnsla- 7,0 <start>
|
d4: (40 9f 00 03|03 00 9f 40) bnsla- 7,0 <start>
|
||||||
d8: 41 93 00 00 bso- 4,d8 <start\+0xd8>
|
d8: (41 93 00 00|00 00 93 41) bso- 4,d8 <start\+0xd8>
|
||||||
dc: 41 9b 00 02 bsoa- 6,0 <start>
|
dc: (41 9b 00 02|02 00 9b 41) bsoa- 6,0 <start>
|
||||||
e0: 41 97 00 01 bsol- 5,e0 <start\+0xe0>
|
e0: (41 97 00 01|01 00 97 41) bsol- 5,e0 <start\+0xe0>
|
||||||
e4: 41 9f 00 03 bsola- 7,0 <start>
|
e4: (41 9f 00 03|03 00 9f 41) bsola- 7,0 <start>
|
||||||
e8: 4c 85 32 02 crand 4,5,6
|
e8: (4c 85 32 02|02 32 85 4c) crand 4,5,6
|
||||||
ec: 4c 64 29 02 crandc 3,4,5
|
ec: (4c 64 29 02|02 29 64 4c) crandc 3,4,5
|
||||||
f0: 4c e0 0a 42 creqv 7,0,1
|
f0: (4c e0 0a 42|42 0a e0 4c) creqv 7,0,1
|
||||||
f4: 4c 22 19 c2 crnand 1,2,3
|
f4: (4c 22 19 c2|c2 19 22 4c) crnand 1,2,3
|
||||||
f8: 4c 01 10 42 crnor 0,1,2
|
f8: (4c 01 10 42|42 10 01 4c) crnor 0,1,2
|
||||||
fc: 4c a6 3b 82 cror 5,6,7
|
fc: (4c a6 3b 82|82 3b a6 4c) cror 5,6,7
|
||||||
100: 4c 43 23 42 crorc 2,3,4
|
100: (4c 43 23 42|42 23 43 4c) crorc 2,3,4
|
||||||
104: 4c c7 01 82 crxor 6,7,0
|
104: (4c c7 01 82|82 01 c7 4c) crxor 6,7,0
|
||||||
108: 7d 6a 62 39 eqv. r10,r11,r12
|
108: (7d 6a 62 39|39 62 6a 7d) eqv. r10,r11,r12
|
||||||
10c: 7d 6a 62 38 eqv r10,r11,r12
|
10c: (7d 6a 62 38|38 62 6a 7d) eqv r10,r11,r12
|
||||||
110: fe a0 fa 11 fabs. f21,f31
|
110: (fe a0 fa 11|11 fa a0 fe) fabs. f21,f31
|
||||||
114: fe a0 fa 10 fabs f21,f31
|
114: (fe a0 fa 10|10 fa a0 fe) fabs f21,f31
|
||||||
118: fd 8a 58 40 fcmpo 3,f10,f11
|
118: (fd 8a 58 40|40 58 8a fd) fcmpo 3,f10,f11
|
||||||
11c: fd 84 28 00 fcmpu 3,f4,f5
|
11c: (fd 84 28 00|00 28 84 fd) fcmpu 3,f4,f5
|
||||||
120: fc 60 20 91 fmr. f3,f4
|
120: (fc 60 20 91|91 20 60 fc) fmr. f3,f4
|
||||||
124: fc 60 20 90 fmr f3,f4
|
124: (fc 60 20 90|90 20 60 fc) fmr f3,f4
|
||||||
128: fe 80 f1 11 fnabs. f20,f30
|
128: (fe 80 f1 11|11 f1 80 fe) fnabs. f20,f30
|
||||||
12c: fe 80 f1 10 fnabs f20,f30
|
12c: (fe 80 f1 10|10 f1 80 fe) fnabs f20,f30
|
||||||
130: fc 60 20 51 fneg. f3,f4
|
130: (fc 60 20 51|51 20 60 fc) fneg. f3,f4
|
||||||
134: fc 60 20 50 fneg f3,f4
|
134: (fc 60 20 50|50 20 60 fc) fneg f3,f4
|
||||||
138: fc c0 38 18 frsp f6,f7
|
138: (fc c0 38 18|18 38 c0 fc) frsp f6,f7
|
||||||
13c: fd 00 48 19 frsp. f8,f9
|
13c: (fd 00 48 19|19 48 00 fd) frsp. f8,f9
|
||||||
140: 89 21 00 00 lbz r9,0\(r1\)
|
140: (89 21 00 00|00 00 21 89) lbz r9,0\(r1\)
|
||||||
144: 8d 41 00 01 lbzu r10,1\(r1\)
|
144: (8d 41 00 01|01 00 41 8d) lbzu r10,1\(r1\)
|
||||||
148: 7e 95 b0 ee lbzux r20,r21,r22
|
148: (7e 95 b0 ee|ee b0 95 7e) lbzux r20,r21,r22
|
||||||
14c: 7c 64 28 ae lbzx r3,r4,r5
|
14c: (7c 64 28 ae|ae 28 64 7c) lbzx r3,r4,r5
|
||||||
150: ca a1 00 08 lfd f21,8\(r1\)
|
150: (ca a1 00 08|08 00 a1 ca) lfd f21,8\(r1\)
|
||||||
154: ce c1 00 10 lfdu f22,16\(r1\)
|
154: (ce c1 00 10|10 00 c1 ce) lfdu f22,16\(r1\)
|
||||||
158: 7e 95 b4 ee lfdux f20,r21,r22
|
158: (7e 95 b4 ee|ee b4 95 7e) lfdux f20,r21,r22
|
||||||
15c: 7d ae 7c ae lfdx f13,r14,r15
|
15c: (7d ae 7c ae|ae 7c ae 7d) lfdx f13,r14,r15
|
||||||
160: c2 61 00 00 lfs f19,0\(r1\)
|
160: (c2 61 00 00|00 00 61 c2) lfs f19,0\(r1\)
|
||||||
164: c6 81 00 04 lfsu f20,4\(r1\)
|
164: (c6 81 00 04|04 00 81 c6) lfsu f20,4\(r1\)
|
||||||
168: 7d 4b 64 6e lfsux f10,r11,r12
|
168: (7d 4b 64 6e|6e 64 4b 7d) lfsux f10,r11,r12
|
||||||
16c: 7d 4b 64 2e lfsx f10,r11,r12
|
16c: (7d 4b 64 2e|2e 64 4b 7d) lfsx f10,r11,r12
|
||||||
170: a9 e1 00 06 lha r15,6\(r1\)
|
170: (a9 e1 00 06|06 00 e1 a9) lha r15,6\(r1\)
|
||||||
174: ae 01 00 08 lhau r16,8\(r1\)
|
174: (ae 01 00 08|08 00 01 ae) lhau r16,8\(r1\)
|
||||||
178: 7d 2a 5a ee lhaux r9,r10,r11
|
178: (7d 2a 5a ee|ee 5a 2a 7d) lhaux r9,r10,r11
|
||||||
17c: 7d 2a 5a ae lhax r9,r10,r11
|
17c: (7d 2a 5a ae|ae 5a 2a 7d) lhax r9,r10,r11
|
||||||
180: 7c 64 2e 2c lhbrx r3,r4,r5
|
180: (7c 64 2e 2c|2c 2e 64 7c) lhbrx r3,r4,r5
|
||||||
184: a1 a1 00 00 lhz r13,0\(r1\)
|
184: (a1 a1 00 00|00 00 a1 a1) lhz r13,0\(r1\)
|
||||||
188: a5 c1 00 02 lhzu r14,2\(r1\)
|
188: (a5 c1 00 02|02 00 c1 a5) lhzu r14,2\(r1\)
|
||||||
18c: 7e 96 c2 6e lhzux r20,r22,r24
|
18c: (7e 96 c2 6e|6e c2 96 7e) lhzux r20,r22,r24
|
||||||
190: 7e f8 ca 2e lhzx r23,r24,r25
|
190: (7e f8 ca 2e|2e ca f8 7e) lhzx r23,r24,r25
|
||||||
194: 4c 04 00 00 mcrf 0,1
|
194: (4c 04 00 00|00 00 04 4c) mcrf 0,1
|
||||||
198: fd 90 00 80 mcrfs 3,4
|
198: (fd 90 00 80|80 00 90 fd) mcrfs 3,4
|
||||||
19c: 7d 80 04 00 mcrxr 3
|
19c: (7d 80 04 00|00 04 80 7d) mcrxr 3
|
||||||
1a0: 7c 60 00 26 mfcr r3
|
1a0: (7c 60 00 26|26 00 60 7c) mfcr r3
|
||||||
1a4: 7c 69 02 a6 mfctr r3
|
1a4: (7c 69 02 a6|a6 02 69 7c) mfctr r3
|
||||||
1a8: 7c b3 02 a6 mfdar r5
|
1a8: (7c b3 02 a6|a6 02 b3 7c) mfdar r5
|
||||||
1ac: 7c 92 02 a6 mfdsisr r4
|
1ac: (7c 92 02 a6|a6 02 92 7c) mfdsisr r4
|
||||||
1b0: ff c0 04 8e mffs f30
|
1b0: (ff c0 04 8e|8e 04 c0 ff) mffs f30
|
||||||
1b4: ff e0 04 8f mffs. f31
|
1b4: (ff e0 04 8f|8f 04 e0 ff) mffs. f31
|
||||||
1b8: 7c 48 02 a6 mflr r2
|
1b8: (7c 48 02 a6|a6 02 48 7c) mflr r2
|
||||||
1bc: 7e 60 00 a6 mfmsr r19
|
1bc: (7e 60 00 a6|a6 00 60 7e) mfmsr r19
|
||||||
1c0: 7c 78 00 26 mfocrf r3,128
|
1c0: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
|
||||||
1c4: 7c 25 02 a6 mfrtcl r1
|
1c4: (7c 25 02 a6|a6 02 25 7c) mfrtcl r1
|
||||||
1c8: 7c 04 02 a6 mfrtcu r0
|
1c8: (7c 04 02 a6|a6 02 04 7c) mfrtcu r0
|
||||||
1cc: 7c d9 02 a6 mfsdr1 r6
|
1cc: (7c d9 02 a6|a6 02 d9 7c) mfsdr1 r6
|
||||||
1d0: 7c 60 22 a6 mfspr r3,128
|
1d0: (7c 60 22 a6|a6 22 60 7c) mfspr r3,128
|
||||||
1d4: 7c fa 02 a6 mfsrr0 r7
|
1d4: (7c fa 02 a6|a6 02 fa 7c) mfsrr0 r7
|
||||||
1d8: 7d 1b 02 a6 mfsrr1 r8
|
1d8: (7d 1b 02 a6|a6 02 1b 7d) mfsrr1 r8
|
||||||
1dc: 7f c1 02 a6 mfxer r30
|
1dc: (7f c1 02 a6|a6 02 c1 7f) mfxer r30
|
||||||
1e0: 7f fe fb 79 mr. r30,r31
|
1e0: (7f fe fb 79|79 fb fe 7f) mr. r30,r31
|
||||||
1e4: 7f fe fb 78 mr r30,r31
|
1e4: (7f fe fb 78|78 fb fe 7f) mr r30,r31
|
||||||
1e8: 7c 6f f1 20 mtcr r3
|
1e8: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
|
||||||
1ec: 7c 68 01 20 mtcrf 128,r3
|
1ec: (7c 68 01 20|20 01 68 7c) mtcrf 128,r3
|
||||||
1f0: 7e 69 03 a6 mtctr r19
|
1f0: (7e 69 03 a6|a6 03 69 7e) mtctr r19
|
||||||
1f4: 7e b3 03 a6 mtdar r21
|
1f4: (7e b3 03 a6|a6 03 b3 7e) mtdar r21
|
||||||
1f8: 7f 16 03 a6 mtdec r24
|
1f8: (7f 16 03 a6|a6 03 16 7f) mtdec r24
|
||||||
1fc: 7e 92 03 a6 mtdsisr r20
|
1fc: (7e 92 03 a6|a6 03 92 7e) mtdsisr r20
|
||||||
200: fc 60 00 8d mtfsb0. 3
|
200: (fc 60 00 8d|8d 00 60 fc) mtfsb0. 3
|
||||||
204: fc 60 00 8c mtfsb0 3
|
204: (fc 60 00 8c|8c 00 60 fc) mtfsb0 3
|
||||||
208: fc 60 00 4d mtfsb1. 3
|
208: (fc 60 00 4d|4d 00 60 fc) mtfsb1. 3
|
||||||
20c: fc 60 00 4c mtfsb1 3
|
20c: (fc 60 00 4c|4c 00 60 fc) mtfsb1 3
|
||||||
210: fc 0c 55 8e mtfsf 6,f10
|
210: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10
|
||||||
214: fc 0c 5d 8f mtfsf. 6,f11
|
214: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf. 6,f11
|
||||||
218: ff 00 01 0c mtfsfi 6,0
|
218: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
|
||||||
21c: ff 00 f1 0d mtfsfi. 6,15
|
21c: (ff 00 f1 0d|0d f1 00 ff) mtfsfi. 6,15
|
||||||
220: 7e 48 03 a6 mtlr r18
|
220: (7e 48 03 a6|a6 03 48 7e) mtlr r18
|
||||||
224: 7d 40 01 24 mtmsr r10
|
224: (7d 40 01 24|24 01 40 7d) mtmsr r10
|
||||||
228: 7c 78 01 20 mtocrf 128,r3
|
228: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
|
||||||
22c: 7e f5 03 a6 mtrtcl r23
|
22c: (7e f5 03 a6|a6 03 f5 7e) mtrtcl r23
|
||||||
230: 7e d4 03 a6 mtrtcu r22
|
230: (7e d4 03 a6|a6 03 d4 7e) mtrtcu r22
|
||||||
234: 7f 39 03 a6 mtsdr1 r25
|
234: (7f 39 03 a6|a6 03 39 7f) mtsdr1 r25
|
||||||
238: 7c 60 23 a6 mtspr 128,r3
|
238: (7c 60 23 a6|a6 23 60 7c) mtspr 128,r3
|
||||||
23c: 7f 5a 03 a6 mtsrr0 r26
|
23c: (7f 5a 03 a6|a6 03 5a 7f) mtsrr0 r26
|
||||||
240: 7f 7b 03 a6 mtsrr1 r27
|
240: (7f 7b 03 a6|a6 03 7b 7f) mtsrr1 r27
|
||||||
244: 7e 21 03 a6 mtxer r17
|
244: (7e 21 03 a6|a6 03 21 7e) mtxer r17
|
||||||
248: 7f bc f3 b9 nand. r28,r29,r30
|
248: (7f bc f3 b9|b9 f3 bc 7f) nand. r28,r29,r30
|
||||||
24c: 7f bc f3 b8 nand r28,r29,r30
|
24c: (7f bc f3 b8|b8 f3 bc 7f) nand r28,r29,r30
|
||||||
250: 7c 64 00 d1 neg. r3,r4
|
250: (7c 64 00 d1|d1 00 64 7c) neg. r3,r4
|
||||||
254: 7c 64 00 d0 neg r3,r4
|
254: (7c 64 00 d0|d0 00 64 7c) neg r3,r4
|
||||||
258: 7e 11 04 d0 nego r16,r17
|
258: (7e 11 04 d0|d0 04 11 7e) nego r16,r17
|
||||||
25c: 7e 53 04 d1 nego. r18,r19
|
25c: (7e 53 04 d1|d1 04 53 7e) nego. r18,r19
|
||||||
260: 7e b4 b0 f9 nor. r20,r21,r22
|
260: (7e b4 b0 f9|f9 b0 b4 7e) nor. r20,r21,r22
|
||||||
264: 7e b4 b0 f8 nor r20,r21,r22
|
264: (7e b4 b0 f8|f8 b0 b4 7e) nor r20,r21,r22
|
||||||
268: 7e b4 a8 f9 not. r20,r21
|
268: (7e b4 a8 f9|f9 a8 b4 7e) not. r20,r21
|
||||||
26c: 7e b4 a8 f8 not r20,r21
|
26c: (7e b4 a8 f8|f8 a8 b4 7e) not r20,r21
|
||||||
270: 7c 40 23 78 or r0,r2,r4
|
270: (7c 40 23 78|78 23 40 7c) or r0,r2,r4
|
||||||
274: 7d cc 83 79 or. r12,r14,r16
|
274: (7d cc 83 79|79 83 cc 7d) or. r12,r14,r16
|
||||||
278: 7e 0f 8b 38 orc r15,r16,r17
|
278: (7e 0f 8b 38|38 8b 0f 7e) orc r15,r16,r17
|
||||||
27c: 7e 72 a3 39 orc. r18,r19,r20
|
27c: (7e 72 a3 39|39 a3 72 7e) orc. r18,r19,r20
|
||||||
280: 4c 00 00 64 rfi
|
280: (4c 00 00 64|64 00 00 4c) rfi
|
||||||
284: 99 61 00 02 stb r11,2\(r1\)
|
284: (99 61 00 02|02 00 61 99) stb r11,2\(r1\)
|
||||||
288: 9d 81 00 03 stbu r12,3\(r1\)
|
288: (9d 81 00 03|03 00 81 9d) stbu r12,3\(r1\)
|
||||||
28c: 7d ae 79 ee stbux r13,r14,r15
|
28c: (7d ae 79 ee|ee 79 ae 7d) stbux r13,r14,r15
|
||||||
290: 7c 64 29 ae stbx r3,r4,r5
|
290: (7c 64 29 ae|ae 29 64 7c) stbx r3,r4,r5
|
||||||
294: db 21 00 20 stfd f25,32\(r1\)
|
294: (db 21 00 20|20 00 21 db) stfd f25,32\(r1\)
|
||||||
298: df 41 00 28 stfdu f26,40\(r1\)
|
298: (df 41 00 28|28 00 41 df) stfdu f26,40\(r1\)
|
||||||
29c: 7c 01 15 ee stfdux f0,r1,r2
|
29c: (7c 01 15 ee|ee 15 01 7c) stfdux f0,r1,r2
|
||||||
2a0: 7f be fd ae stfdx f29,r30,r31
|
2a0: (7f be fd ae|ae fd be 7f) stfdx f29,r30,r31
|
||||||
2a4: d2 e1 00 14 stfs f23,20\(r1\)
|
2a4: (d2 e1 00 14|14 00 e1 d2) stfs f23,20\(r1\)
|
||||||
2a8: d7 01 00 18 stfsu f24,24\(r1\)
|
2a8: (d7 01 00 18|18 00 01 d7) stfsu f24,24\(r1\)
|
||||||
2ac: 7f 5b e5 6e stfsux f26,r27,r28
|
2ac: (7f 5b e5 6e|6e e5 5b 7f) stfsux f26,r27,r28
|
||||||
2b0: 7e f8 cd 2e stfsx f23,r24,r25
|
2b0: (7e f8 cd 2e|2e cd f8 7e) stfsx f23,r24,r25
|
||||||
2b4: b2 21 00 0a sth r17,10\(r1\)
|
2b4: (b2 21 00 0a|0a 00 21 b2) sth r17,10\(r1\)
|
||||||
2b8: 7c c7 47 2c sthbrx r6,r7,r8
|
2b8: (7c c7 47 2c|2c 47 c7 7c) sthbrx r6,r7,r8
|
||||||
2bc: b6 41 00 0c sthu r18,12\(r1\)
|
2bc: (b6 41 00 0c|0c 00 41 b6) sthu r18,12\(r1\)
|
||||||
2c0: 7e b6 bb 6e sthux r21,r22,r23
|
2c0: (7e b6 bb 6e|6e bb b6 7e) sthux r21,r22,r23
|
||||||
2c4: 7d 8d 73 2e sthx r12,r13,r14
|
2c4: (7d 8d 73 2e|2e 73 8d 7d) sthx r12,r13,r14
|
||||||
2c8: 7f dd fa 79 xor. r29,r30,r31
|
2c8: (7f dd fa 79|79 fa dd 7f) xor. r29,r30,r31
|
||||||
2cc: 7f dd fa 78 xor r29,r30,r31
|
2cc: (7f dd fa 78|78 fa dd 7f) xor r29,r30,r31
|
||||||
2d0: 60 00 00 00 nop
|
2d0: (60 00 00 00|00 00 00 60) nop
|
||||||
2d4: 60 00 00 00 nop
|
2d4: (60 00 00 00|00 00 00 60) nop
|
||||||
2d8: 68 00 00 00 xnop
|
2d8: (68 00 00 00|00 00 00 68) xnop
|
||||||
2dc: 68 00 00 00 xnop
|
2dc: (68 00 00 00|00 00 00 68) xnop
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
and. 3,4,5
|
and. 3,4,5
|
||||||
and 3,4,5
|
and 3,4,5
|
||||||
|
|||||||
@ -2,55 +2,56 @@
|
|||||||
#objdump: -dr -Me500
|
#objdump: -dr -Me500
|
||||||
#name: e500 tests
|
#name: e500 tests
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+0000000 <start>:
|
0+0000000 <start>:
|
||||||
0: 7c 43 25 de isel r2,r3,r4,23
|
0: (7c 43 25 de|de 25 43 7c) isel r2,r3,r4,23
|
||||||
4: 7c 85 33 0c dcblc 4,r5,r6
|
4: (7c 85 33 0c|0c 33 85 7c) dcblc 4,r5,r6
|
||||||
8: 7c e8 49 4c dcbtls 7,r8,r9
|
8: (7c e8 49 4c|4c 49 e8 7c) dcbtls 7,r8,r9
|
||||||
c: 7d 4b 61 0c dcbtstls 10,r11,r12
|
c: (7d 4b 61 0c|0c 61 4b 7d) dcbtstls 10,r11,r12
|
||||||
10: 7d ae 7b cc icbtls 13,r14,r15
|
10: (7d ae 7b cc|cc 7b ae 7d) icbtls 13,r14,r15
|
||||||
14: 7e 11 91 cc icblc 16,r17,r18
|
14: (7e 11 91 cc|cc 91 11 7e) icblc 16,r17,r18
|
||||||
18: 7c 89 33 9c mtpmr 201,r4
|
18: (7c 89 33 9c|9c 33 89 7c) mtpmr 201,r4
|
||||||
1c: 7c ab 32 9c mfpmr r5,203
|
1c: (7c ab 32 9c|9c 32 ab 7c) mfpmr r5,203
|
||||||
20: 7c 00 04 0c bblels
|
20: (7c 00 04 0c|0c 04 00 7c) bblels
|
||||||
24: 7c 00 04 4c bbelr
|
24: (7c 00 04 4c|4c 04 00 7c) bbelr
|
||||||
28: 7d 00 83 a6 mtspefscr r8
|
28: (7d 00 83 a6|a6 83 00 7d) mtspefscr r8
|
||||||
2c: 7d 20 82 a6 mfspefscr r9
|
2c: (7d 20 82 a6|a6 82 20 7d) mfspefscr r9
|
||||||
30: 10 a0 22 cf efscfd r5,r4
|
30: (10 a0 22 cf|cf 22 a0 10) efscfd r5,r4
|
||||||
34: 10 a4 02 e4 efdabs r5,r4
|
34: (10 a4 02 e4|e4 02 a4 10) efdabs r5,r4
|
||||||
38: 10 a4 02 e5 efdnabs r5,r4
|
38: (10 a4 02 e5|e5 02 a4 10) efdnabs r5,r4
|
||||||
3c: 10 a4 02 e6 efdneg r5,r4
|
3c: (10 a4 02 e6|e6 02 a4 10) efdneg r5,r4
|
||||||
40: 10 a4 1a e0 efdadd r5,r4,r3
|
40: (10 a4 1a e0|e0 1a a4 10) efdadd r5,r4,r3
|
||||||
44: 10 a4 1a e1 efdsub r5,r4,r3
|
44: (10 a4 1a e1|e1 1a a4 10) efdsub r5,r4,r3
|
||||||
48: 10 a4 1a e8 efdmul r5,r4,r3
|
48: (10 a4 1a e8|e8 1a a4 10) efdmul r5,r4,r3
|
||||||
4c: 10 a4 1a e9 efddiv r5,r4,r3
|
4c: (10 a4 1a e9|e9 1a a4 10) efddiv r5,r4,r3
|
||||||
50: 12 84 1a ec efdcmpgt cr5,r4,r3
|
50: (12 84 1a ec|ec 1a 84 12) efdcmpgt cr5,r4,r3
|
||||||
54: 12 84 1a ed efdcmplt cr5,r4,r3
|
54: (12 84 1a ed|ed 1a 84 12) efdcmplt cr5,r4,r3
|
||||||
58: 12 84 1a ee efdcmpeq cr5,r4,r3
|
58: (12 84 1a ee|ee 1a 84 12) efdcmpeq cr5,r4,r3
|
||||||
5c: 12 84 1a fc efdtstgt cr5,r4,r3
|
5c: (12 84 1a fc|fc 1a 84 12) efdtstgt cr5,r4,r3
|
||||||
60: 12 84 1a fc efdtstgt cr5,r4,r3
|
60: (12 84 1a fc|fc 1a 84 12) efdtstgt cr5,r4,r3
|
||||||
64: 12 84 1a fd efdtstlt cr5,r4,r3
|
64: (12 84 1a fd|fd 1a 84 12) efdtstlt cr5,r4,r3
|
||||||
68: 12 84 1a fe efdtsteq cr5,r4,r3
|
68: (12 84 1a fe|fe 1a 84 12) efdtsteq cr5,r4,r3
|
||||||
6c: 10 a0 22 f1 efdcfsi r5,r4
|
6c: (10 a0 22 f1|f1 22 a0 10) efdcfsi r5,r4
|
||||||
70: 10 a0 22 e3 efdcfsid r5,r4
|
70: (10 a0 22 e3|e3 22 a0 10) efdcfsid r5,r4
|
||||||
74: 10 a0 22 f0 efdcfui r5,r4
|
74: (10 a0 22 f0|f0 22 a0 10) efdcfui r5,r4
|
||||||
78: 10 a0 22 e2 efdcfuid r5,r4
|
78: (10 a0 22 e2|e2 22 a0 10) efdcfuid r5,r4
|
||||||
7c: 10 a0 22 f3 efdcfsf r5,r4
|
7c: (10 a0 22 f3|f3 22 a0 10) efdcfsf r5,r4
|
||||||
80: 10 a0 22 f2 efdcfuf r5,r4
|
80: (10 a0 22 f2|f2 22 a0 10) efdcfuf r5,r4
|
||||||
84: 10 a0 22 f5 efdctsi r5,r4
|
84: (10 a0 22 f5|f5 22 a0 10) efdctsi r5,r4
|
||||||
88: 10 a0 22 eb efdctsidz r5,r4
|
88: (10 a0 22 eb|eb 22 a0 10) efdctsidz r5,r4
|
||||||
8c: 10 a0 22 fa efdctsiz r5,r4
|
8c: (10 a0 22 fa|fa 22 a0 10) efdctsiz r5,r4
|
||||||
90: 10 a0 22 f4 efdctui r5,r4
|
90: (10 a0 22 f4|f4 22 a0 10) efdctui r5,r4
|
||||||
94: 10 a0 22 ea efdctuidz r5,r4
|
94: (10 a0 22 ea|ea 22 a0 10) efdctuidz r5,r4
|
||||||
98: 10 a0 22 f8 efdctuiz r5,r4
|
98: (10 a0 22 f8|f8 22 a0 10) efdctuiz r5,r4
|
||||||
9c: 10 a0 22 f7 efdctsf r5,r4
|
9c: (10 a0 22 f7|f7 22 a0 10) efdctsf r5,r4
|
||||||
a0: 10 a0 22 f6 efdctuf r5,r4
|
a0: (10 a0 22 f6|f6 22 a0 10) efdctuf r5,r4
|
||||||
a4: 10 a0 22 ef efdcfs r5,r4
|
a4: (10 a0 22 ef|ef 22 a0 10) efdcfs r5,r4
|
||||||
a8: 7c 20 06 ac mbar 1
|
a8: (7c 20 06 ac|ac 06 20 7c) mbar 1
|
||||||
ac: 7c 00 06 ac mbar
|
ac: (7c 00 06 ac|ac 06 00 7c) mbar
|
||||||
b0: 7c 20 06 ac mbar 1
|
b0: (7c 20 06 ac|ac 06 20 7c) mbar 1
|
||||||
b4: 7c 00 04 ac msync
|
b4: (7c 00 04 ac|ac 04 00 7c) msync
|
||||||
b8: 7c 00 04 ac msync
|
b8: (7c 00 04 ac|ac 04 00 7c) msync
|
||||||
|
#pass
|
||||||
|
|||||||
@ -1,5 +1,5 @@
|
|||||||
# Motorola PowerPC e500 tests
|
# Motorola PowerPC e500 tests
|
||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
isel 2, 3, 4, 23
|
isel 2, 3, 4, 23
|
||||||
dcblc 4, 5, 6
|
dcblc 4, 5, 6
|
||||||
|
|||||||
@ -2,55 +2,56 @@
|
|||||||
#objdump: -dr -Me500mc
|
#objdump: -dr -Me500mc
|
||||||
#name: Power E500MC tests
|
#name: Power E500MC tests
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <start>:
|
0+00 <start>:
|
||||||
0: 4c 00 00 4e rfdi
|
0: (4c 00 00 4e|4e 00 00 4c) rfdi
|
||||||
4: 4c 00 00 cc rfgi
|
4: (4c 00 00 cc|cc 00 00 4c) rfgi
|
||||||
8: 4c 1f f9 8c dnh 0,1023
|
8: (4c 1f f9 8c|8c f9 1f 4c) dnh 0,1023
|
||||||
c: 4f e0 01 8c dnh 31,0
|
c: (4f e0 01 8c|8c 01 e0 4f) dnh 31,0
|
||||||
10: 7c 09 57 be icbiep r9,r10
|
10: (7c 09 57 be|be 57 09 7c) icbiep r9,r10
|
||||||
14: 7c 00 69 dc msgclr r13
|
14: (7c 00 69 dc|dc 69 00 7c) msgclr r13
|
||||||
18: 7c 00 71 9c msgsnd r14
|
18: (7c 00 71 9c|9c 71 00 7c) msgsnd r14
|
||||||
1c: 7c 00 00 7c wait
|
1c: (7c 00 00 7c|7c 00 00 7c) wait
|
||||||
20: 7c 00 00 7c wait
|
20: (7c 00 00 7c|7c 00 00 7c) wait
|
||||||
24: 7c 20 00 7c waitrsv
|
24: (7c 20 00 7c|7c 00 20 7c) waitrsv
|
||||||
28: 7c 20 00 7c waitrsv
|
28: (7c 20 00 7c|7c 00 20 7c) waitrsv
|
||||||
2c: 7c 40 00 7c waitimpl
|
2c: (7c 40 00 7c|7c 00 40 7c) waitimpl
|
||||||
30: 7c 40 00 7c waitimpl
|
30: (7c 40 00 7c|7c 00 40 7c) waitimpl
|
||||||
34: 7f 9c e3 78 mdors
|
34: (7f 9c e3 78|78 e3 9c 7f) mdors
|
||||||
38: 7c 00 02 1c ehpriv
|
38: (7c 00 02 1c|1c 02 00 7c) ehpriv
|
||||||
3c: 7c 18 cb c6 dsn r24,r25
|
3c: (7c 18 cb c6|c6 cb 18 7c) dsn r24,r25
|
||||||
40: 7c 22 18 be lbepx r1,r2,r3
|
40: (7c 22 18 be|be 18 22 7c) lbepx r1,r2,r3
|
||||||
44: 7c 85 32 3e lhepx r4,r5,r6
|
44: (7c 85 32 3e|3e 32 85 7c) lhepx r4,r5,r6
|
||||||
48: 7c e8 48 3e lwepx r7,r8,r9
|
48: (7c e8 48 3e|3e 48 e8 7c) lwepx r7,r8,r9
|
||||||
4c: 7d 4b 60 3a ldepx r10,r11,r12
|
4c: (7d 4b 60 3a|3a 60 4b 7d) ldepx r10,r11,r12
|
||||||
50: 7d ae 7c be lfdepx f13,r14,r15
|
50: (7d ae 7c be|be 7c ae 7d) lfdepx f13,r14,r15
|
||||||
54: 7e 11 91 be stbepx r16,r17,r18
|
54: (7e 11 91 be|be 91 11 7e) stbepx r16,r17,r18
|
||||||
58: 7e 74 ab 3e sthepx r19,r20,r21
|
58: (7e 74 ab 3e|3e ab 74 7e) sthepx r19,r20,r21
|
||||||
5c: 7e d7 c1 3e stwepx r22,r23,r24
|
5c: (7e d7 c1 3e|3e c1 d7 7e) stwepx r22,r23,r24
|
||||||
60: 7f 3a d9 3a stdepx r25,r26,r27
|
60: (7f 3a d9 3a|3a d9 3a 7f) stdepx r25,r26,r27
|
||||||
64: 7f 9d f5 be stfdepx f28,r29,r30
|
64: (7f 9d f5 be|be f5 9d 7f) stfdepx f28,r29,r30
|
||||||
68: 7c 01 14 06 lbdx r0,r1,r2
|
68: (7c 01 14 06|06 14 01 7c) lbdx r0,r1,r2
|
||||||
6c: 7d 8d 74 46 lhdx r12,r13,r14
|
6c: (7d 8d 74 46|46 74 8d 7d) lhdx r12,r13,r14
|
||||||
70: 7c 64 2c 86 lwdx r3,r4,r5
|
70: (7c 64 2c 86|86 2c 64 7c) lwdx r3,r4,r5
|
||||||
74: 7f 5b e6 46 lfddx f26,r27,r28
|
74: (7f 5b e6 46|46 e6 5b 7f) lfddx f26,r27,r28
|
||||||
78: 7d f0 8c c6 lddx r15,r16,r17
|
78: (7d f0 8c c6|c6 8c f0 7d) lddx r15,r16,r17
|
||||||
7c: 7c c7 45 06 stbdx r6,r7,r8
|
7c: (7c c7 45 06|06 45 c7 7c) stbdx r6,r7,r8
|
||||||
80: 7e 53 a5 46 sthdx r18,r19,r20
|
80: (7e 53 a5 46|46 a5 53 7e) sthdx r18,r19,r20
|
||||||
84: 7d 2a 5d 86 stwdx r9,r10,r11
|
84: (7d 2a 5d 86|86 5d 2a 7d) stwdx r9,r10,r11
|
||||||
88: 7f be ff 46 stfddx f29,r30,r31
|
88: (7f be ff 46|46 ff be 7f) stfddx f29,r30,r31
|
||||||
8c: 7e b6 bd c6 stddx r21,r22,r23
|
8c: (7e b6 bd c6|c6 bd b6 7e) stddx r21,r22,r23
|
||||||
90: 7c 20 0d ec dcbal 0,r1
|
90: (7c 20 0d ec|ec 0d 20 7c) dcbal 0,r1
|
||||||
94: 7c 26 3f ec dcbzl r6,r7
|
94: (7c 26 3f ec|ec 3f 26 7c) dcbzl r6,r7
|
||||||
98: 7c 1f 00 7e dcbstep r31,r0
|
98: (7c 1f 00 7e|7e 00 1f 7c) dcbstep r31,r0
|
||||||
9c: 7c 01 10 fe dcbfep r1,r2
|
9c: (7c 01 10 fe|fe 10 01 7c) dcbfep r1,r2
|
||||||
a0: 7c 64 29 fe dcbtstep r3,r4,r5
|
a0: (7c 64 29 fe|fe 29 64 7c) dcbtstep r3,r4,r5
|
||||||
a4: 7c c7 42 7e dcbtep r6,r7,r8
|
a4: (7c c7 42 7e|7e 42 c7 7c) dcbtep r6,r7,r8
|
||||||
a8: 7c 0b 67 fe dcbzep r11,r12
|
a8: (7c 0b 67 fe|fe 67 0b 7c) dcbzep r11,r12
|
||||||
ac: 7c 00 00 24 tlbilxlpid
|
ac: (7c 00 00 24|24 00 00 7c) tlbilxlpid
|
||||||
b0: 7c 20 00 24 tlbilxpid
|
b0: (7c 20 00 24|24 00 20 7c) tlbilxpid
|
||||||
b4: 7c 62 18 24 tlbilxva r2,r3
|
b4: (7c 62 18 24|24 18 62 7c) tlbilxva r2,r3
|
||||||
b8: 7c 64 28 24 tlbilxva r4,r5
|
b8: (7c 64 28 24|24 28 64 7c) tlbilxva r4,r5
|
||||||
|
#pass
|
||||||
|
|||||||
@ -1,5 +1,5 @@
|
|||||||
# Power E500MC tests
|
# Power E500MC tests
|
||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
rfdi
|
rfdi
|
||||||
rfgi
|
rfgi
|
||||||
|
|||||||
@ -2,12 +2,12 @@
|
|||||||
#objdump: -dr -Me500mc64
|
#objdump: -dr -Me500mc64
|
||||||
#name: Power E500MC64 nop tests
|
#name: Power E500MC64 nop tests
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <start>:
|
0+00 <start>:
|
||||||
0: 60 00 00 00 nop
|
0: (60 00 00 00|00 00 00 60) nop
|
||||||
4: 60 00 00 00 nop
|
4: (60 00 00 00|00 00 00 60) nop
|
||||||
8: 60 00 00 00 nop
|
8: (60 00 00 00|00 00 00 60) nop
|
||||||
c: 60 00 00 00 nop
|
c: (60 00 00 00|00 00 00 60) nop
|
||||||
|
|||||||
@ -1,5 +1,5 @@
|
|||||||
# Power E500MC64 nop tests
|
# Power E500MC64 nop tests
|
||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
nop
|
nop
|
||||||
.p2align 4,,15
|
.p2align 4,,15
|
||||||
|
|||||||
@ -2,12 +2,12 @@
|
|||||||
#objdump: -dr -Me5500
|
#objdump: -dr -Me5500
|
||||||
#name: Power E5500 nop tests
|
#name: Power E5500 nop tests
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <start>:
|
0+00 <start>:
|
||||||
0: 60 00 00 00 nop
|
0: (60 00 00 00|00 00 00 60) nop
|
||||||
4: 60 00 00 00 nop
|
4: (60 00 00 00|00 00 00 60) nop
|
||||||
8: 60 00 00 00 nop
|
8: (60 00 00 00|00 00 00 60) nop
|
||||||
c: 60 00 00 00 nop
|
c: (60 00 00 00|00 00 00 60) nop
|
||||||
|
|||||||
@ -1,5 +1,5 @@
|
|||||||
# Power E5500 nop tests
|
# Power E5500 nop tests
|
||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
nop
|
nop
|
||||||
.p2align 4,,15
|
.p2align 4,,15
|
||||||
|
|||||||
@ -2,74 +2,74 @@
|
|||||||
#objdump: -dr -Me6500
|
#objdump: -dr -Me6500
|
||||||
#name: Power E6500 tests
|
#name: Power E6500 tests
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <start>:
|
0+00 <start>:
|
||||||
0: 10 01 14 03 vabsdub v0,v1,v2
|
0: (10 01 14 03|03 14 01 10) vabsdub v0,v1,v2
|
||||||
4: 10 01 14 43 vabsduh v0,v1,v2
|
4: (10 01 14 43|43 14 01 10) vabsduh v0,v1,v2
|
||||||
8: 10 01 14 83 vabsduw v0,v1,v2
|
8: (10 01 14 83|83 14 01 10) vabsduw v0,v1,v2
|
||||||
c: 7c 01 10 dc mvidsplt v0,r1,r2
|
c: (7c 01 10 dc|dc 10 01 7c) mvidsplt v0,r1,r2
|
||||||
10: 7c 01 10 5c mviwsplt v0,r1,r2
|
10: (7c 01 10 5c|5c 10 01 7c) mviwsplt v0,r1,r2
|
||||||
14: 7c 00 12 0a lvexbx v0,0,r2
|
14: (7c 00 12 0a|0a 12 00 7c) lvexbx v0,0,r2
|
||||||
18: 7c 01 12 0a lvexbx v0,r1,r2
|
18: (7c 01 12 0a|0a 12 01 7c) lvexbx v0,r1,r2
|
||||||
1c: 7c 00 12 4a lvexhx v0,0,r2
|
1c: (7c 00 12 4a|4a 12 00 7c) lvexhx v0,0,r2
|
||||||
20: 7c 01 12 4a lvexhx v0,r1,r2
|
20: (7c 01 12 4a|4a 12 01 7c) lvexhx v0,r1,r2
|
||||||
24: 7c 00 12 8a lvexwx v0,0,r2
|
24: (7c 00 12 8a|8a 12 00 7c) lvexwx v0,0,r2
|
||||||
28: 7c 01 12 8a lvexwx v0,r1,r2
|
28: (7c 01 12 8a|8a 12 01 7c) lvexwx v0,r1,r2
|
||||||
2c: 7c 00 13 0a stvexbx v0,0,r2
|
2c: (7c 00 13 0a|0a 13 00 7c) stvexbx v0,0,r2
|
||||||
30: 7c 01 13 0a stvexbx v0,r1,r2
|
30: (7c 01 13 0a|0a 13 01 7c) stvexbx v0,r1,r2
|
||||||
34: 7c 00 13 4a stvexhx v0,0,r2
|
34: (7c 00 13 4a|4a 13 00 7c) stvexhx v0,0,r2
|
||||||
38: 7c 01 13 4a stvexhx v0,r1,r2
|
38: (7c 01 13 4a|4a 13 01 7c) stvexhx v0,r1,r2
|
||||||
3c: 7c 00 13 8a stvexwx v0,0,r2
|
3c: (7c 00 13 8a|8a 13 00 7c) stvexwx v0,0,r2
|
||||||
40: 7c 01 13 8a stvexwx v0,r1,r2
|
40: (7c 01 13 8a|8a 13 01 7c) stvexwx v0,r1,r2
|
||||||
44: 7c 00 12 4e lvepx v0,0,r2
|
44: (7c 00 12 4e|4e 12 00 7c) lvepx v0,0,r2
|
||||||
48: 7c 01 12 4e lvepx v0,r1,r2
|
48: (7c 01 12 4e|4e 12 01 7c) lvepx v0,r1,r2
|
||||||
4c: 7c 00 12 0e lvepxl v0,0,r2
|
4c: (7c 00 12 0e|0e 12 00 7c) lvepxl v0,0,r2
|
||||||
50: 7c 01 12 0e lvepxl v0,r1,r2
|
50: (7c 01 12 0e|0e 12 01 7c) lvepxl v0,r1,r2
|
||||||
54: 7c 00 16 4e stvepx v0,0,r2
|
54: (7c 00 16 4e|4e 16 00 7c) stvepx v0,0,r2
|
||||||
58: 7c 01 16 4e stvepx v0,r1,r2
|
58: (7c 01 16 4e|4e 16 01 7c) stvepx v0,r1,r2
|
||||||
5c: 7c 00 16 0e stvepxl v0,0,r2
|
5c: (7c 00 16 0e|0e 16 00 7c) stvepxl v0,0,r2
|
||||||
60: 7c 01 16 0e stvepxl v0,r1,r2
|
60: (7c 01 16 0e|0e 16 01 7c) stvepxl v0,r1,r2
|
||||||
64: 7c 00 14 8a lvtlx v0,0,r2
|
64: (7c 00 14 8a|8a 14 00 7c) lvtlx v0,0,r2
|
||||||
68: 7c 01 14 8a lvtlx v0,r1,r2
|
68: (7c 01 14 8a|8a 14 01 7c) lvtlx v0,r1,r2
|
||||||
6c: 7c 00 16 8a lvtlxl v0,0,r2
|
6c: (7c 00 16 8a|8a 16 00 7c) lvtlxl v0,0,r2
|
||||||
70: 7c 01 16 8a lvtlxl v0,r1,r2
|
70: (7c 01 16 8a|8a 16 01 7c) lvtlxl v0,r1,r2
|
||||||
74: 7c 00 14 4a lvtrx v0,0,r2
|
74: (7c 00 14 4a|4a 14 00 7c) lvtrx v0,0,r2
|
||||||
78: 7c 01 14 4a lvtrx v0,r1,r2
|
78: (7c 01 14 4a|4a 14 01 7c) lvtrx v0,r1,r2
|
||||||
7c: 7c 00 16 4a lvtrxl v0,0,r2
|
7c: (7c 00 16 4a|4a 16 00 7c) lvtrxl v0,0,r2
|
||||||
80: 7c 01 16 4a lvtrxl v0,r1,r2
|
80: (7c 01 16 4a|4a 16 01 7c) lvtrxl v0,r1,r2
|
||||||
84: 7c 00 15 8a stvflx v0,0,r2
|
84: (7c 00 15 8a|8a 15 00 7c) stvflx v0,0,r2
|
||||||
88: 7c 01 15 8a stvflx v0,r1,r2
|
88: (7c 01 15 8a|8a 15 01 7c) stvflx v0,r1,r2
|
||||||
8c: 7c 00 17 8a stvflxl v0,0,r2
|
8c: (7c 00 17 8a|8a 17 00 7c) stvflxl v0,0,r2
|
||||||
90: 7c 01 17 8a stvflxl v0,r1,r2
|
90: (7c 01 17 8a|8a 17 01 7c) stvflxl v0,r1,r2
|
||||||
94: 7c 00 15 4a stvfrx v0,0,r2
|
94: (7c 00 15 4a|4a 15 00 7c) stvfrx v0,0,r2
|
||||||
98: 7c 01 15 4a stvfrx v0,r1,r2
|
98: (7c 01 15 4a|4a 15 01 7c) stvfrx v0,r1,r2
|
||||||
9c: 7c 00 17 4a stvfrxl v0,0,r2
|
9c: (7c 00 17 4a|4a 17 00 7c) stvfrxl v0,0,r2
|
||||||
a0: 7c 01 17 4a stvfrxl v0,r1,r2
|
a0: (7c 01 17 4a|4a 17 01 7c) stvfrxl v0,r1,r2
|
||||||
a4: 7c 00 14 ca lvswx v0,0,r2
|
a4: (7c 00 14 ca|ca 14 00 7c) lvswx v0,0,r2
|
||||||
a8: 7c 01 14 ca lvswx v0,r1,r2
|
a8: (7c 01 14 ca|ca 14 01 7c) lvswx v0,r1,r2
|
||||||
ac: 7c 00 16 ca lvswxl v0,0,r2
|
ac: (7c 00 16 ca|ca 16 00 7c) lvswxl v0,0,r2
|
||||||
b0: 7c 01 16 ca lvswxl v0,r1,r2
|
b0: (7c 01 16 ca|ca 16 01 7c) lvswxl v0,r1,r2
|
||||||
b4: 7c 00 15 ca stvswx v0,0,r2
|
b4: (7c 00 15 ca|ca 15 00 7c) stvswx v0,0,r2
|
||||||
b8: 7c 01 15 ca stvswx v0,r1,r2
|
b8: (7c 01 15 ca|ca 15 01 7c) stvswx v0,r1,r2
|
||||||
bc: 7c 00 17 ca stvswxl v0,0,r2
|
bc: (7c 00 17 ca|ca 17 00 7c) stvswxl v0,0,r2
|
||||||
c0: 7c 01 17 ca stvswxl v0,r1,r2
|
c0: (7c 01 17 ca|ca 17 01 7c) stvswxl v0,r1,r2
|
||||||
c4: 7c 00 16 0a lvsm v0,0,r2
|
c4: (7c 00 16 0a|0a 16 00 7c) lvsm v0,0,r2
|
||||||
c8: 7c 01 16 0a lvsm v0,r1,r2
|
c8: (7c 01 16 0a|0a 16 01 7c) lvsm v0,r1,r2
|
||||||
cc: 7f 5a d3 78 miso
|
cc: (7f 5a d3 78|78 d3 5a 7f) miso
|
||||||
d0: 7c 00 04 ac sync
|
d0: (7c 00 04 ac|ac 04 00 7c) sync
|
||||||
d4: 7c 00 04 ac sync
|
d4: (7c 00 04 ac|ac 04 00 7c) sync
|
||||||
d8: 7c 20 04 ac lwsync
|
d8: (7c 20 04 ac|ac 04 20 7c) lwsync
|
||||||
dc: 7c 00 04 ac sync
|
dc: (7c 00 04 ac|ac 04 00 7c) sync
|
||||||
e0: 7c 07 04 ac sync 0,7
|
e0: (7c 07 04 ac|ac 04 07 7c) sync 0,7
|
||||||
e4: 7c 28 04 ac sync 1,8
|
e4: (7c 28 04 ac|ac 04 28 7c) sync 1,8
|
||||||
e8: 7c 00 00 c3 dni 0,0
|
e8: (7c 00 00 c3|c3 00 00 7c) dni 0,0
|
||||||
ec: 7f ff 00 c3 dni 31,31
|
ec: (7f ff 00 c3|c3 00 ff 7f) dni 31,31
|
||||||
f0: 7c 40 0b 4d dcblq. 2,0,r1
|
f0: (7c 40 0b 4d|4d 0b 40 7c) dcblq. 2,0,r1
|
||||||
f4: 7c 43 0b 4d dcblq. 2,r3,r1
|
f4: (7c 43 0b 4d|4d 0b 43 7c) dcblq. 2,r3,r1
|
||||||
f8: 7c 40 09 8d icblq. 2,0,r1
|
f8: (7c 40 09 8d|8d 09 40 7c) icblq. 2,0,r1
|
||||||
fc: 7c 43 09 8d icblq. 2,r3,r1
|
fc: (7c 43 09 8d|8d 09 43 7c) icblq. 2,r3,r1
|
||||||
100: 7c 10 02 dc mftmr r0,16
|
100: (7c 10 02 dc|dc 02 10 7c) mftmr r0,16
|
||||||
104: 7c 10 03 dc mttmr 16,r0
|
104: (7c 10 03 dc|dc 03 10 7c) mttmr 16,r0
|
||||||
|
|||||||
@ -1,5 +1,5 @@
|
|||||||
# Power E6500 tests
|
# Power E6500 tests
|
||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
vabsdub 0, 1, 2
|
vabsdub 0, 1, 2
|
||||||
vabsduh 0, 1, 2
|
vabsduh 0, 1, 2
|
||||||
|
|||||||
@ -2,12 +2,12 @@
|
|||||||
#objdump: -dr -Me6500
|
#objdump: -dr -Me6500
|
||||||
#name: Power E6500 nop tests
|
#name: Power E6500 nop tests
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <start>:
|
0+00 <start>:
|
||||||
0: 60 00 00 00 nop
|
0: (60 00 00 00|00 00 00 60) nop
|
||||||
4: 60 00 00 00 nop
|
4: (60 00 00 00|00 00 00 60) nop
|
||||||
8: 60 00 00 00 nop
|
8: (60 00 00 00|00 00 00 60) nop
|
||||||
c: 60 00 00 00 nop
|
c: (60 00 00 00|00 00 00 60) nop
|
||||||
|
|||||||
@ -1,5 +1,5 @@
|
|||||||
# Power E6500 nop tests
|
# Power E6500 nop tests
|
||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
nop
|
nop
|
||||||
.p2align 4,,15
|
.p2align 4,,15
|
||||||
|
|||||||
@ -4,6 +4,6 @@
|
|||||||
.*
|
.*
|
||||||
|
|
||||||
Contents of section \.text:
|
Contents of section \.text:
|
||||||
0000 7c11eba6 7c100ba6 4c000066 00000200 .*
|
0000 (7c11eba6|a6eb117c) (7c100ba6|a60b107c) (4c000066|6600004c) (00000200|00020000) .*
|
||||||
0010 44000002 4c0000a4 7c000224 4e800020 .*
|
0010 (44000002|02000044) (4c0000a4|a400004c) (7c000224|2402007c) (4e800020|2000804e) .*
|
||||||
0020 7c11eba6 .*
|
0020 (7c11eba6|a6eb117c) .*
|
||||||
|
|||||||
@ -2,7 +2,7 @@
|
|||||||
#as: -mpower4
|
#as: -mpower4
|
||||||
#name: Power4 instructions
|
#name: Power4 instructions
|
||||||
|
|
||||||
.*: +file format elf64-powerpc
|
.*
|
||||||
.*
|
.*
|
||||||
architecture: powerpc:common64, flags 0x0+11:
|
architecture: powerpc:common64, flags 0x0+11:
|
||||||
HAS_RELOC, HAS_SYMS
|
HAS_RELOC, HAS_SYMS
|
||||||
@ -34,67 +34,67 @@ SYMBOL TABLE:
|
|||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+ <\.text>:
|
0+ <\.text>:
|
||||||
.*: e0 83 00 00 lq r4,0\(r3\)
|
.*: (e0 83 00 00|00 00 83 e0) lq r4,0\(r3\)
|
||||||
.*: R_PPC64_ADDR16_LO_DS \.data
|
.*: R_PPC64_ADDR16_LO_DS \.data
|
||||||
.*: e0 83 00 10 lq r4,16\(r3\)
|
.*: (e0 83 00 .0|.0 00 83 e0) lq r4,.*\(r3\)
|
||||||
.*: R_PPC64_ADDR16_LO_DS \.data\+0x10
|
.*: R_PPC64_ADDR16_LO_DS \.data\+0x10
|
||||||
.*: e0 83 00 10 lq r4,16\(r3\)
|
.*: (e0 83 00 .0|.0 00 83 e0) lq r4,.*\(r3\)
|
||||||
.*: R_PPC64_ADDR16_LO_DS \.data\+0x10
|
.*: R_PPC64_ADDR16_LO_DS \.data\+0x10
|
||||||
.*: e0 83 00 20 lq r4,32\(r3\)
|
.*: (e0 83 00 .0|.0 00 83 e0) lq r4,.*\(r3\)
|
||||||
.*: R_PPC64_ADDR16_LO_DS \.data\+0x20
|
.*: R_PPC64_ADDR16_LO_DS \.data\+0x20
|
||||||
.*: e0 83 00 00 lq r4,0\(r3\)
|
.*: (e0 83 00 00|00 00 83 e0) lq r4,0\(r3\)
|
||||||
.*: R_PPC64_ADDR16_LO_DS esym0
|
.*: R_PPC64_ADDR16_LO_DS esym0
|
||||||
.*: e0 83 00 00 lq r4,0\(r3\)
|
.*: (e0 83 00 00|00 00 83 e0) lq r4,0\(r3\)
|
||||||
.*: R_PPC64_ADDR16_LO_DS esym1
|
.*: R_PPC64_ADDR16_LO_DS esym1
|
||||||
.*: e0 82 00 00 lq r4,0\(r2\)
|
.*: (e0 82 00 00|00 00 82 e0) lq r4,0\(r2\)
|
||||||
.*: R_PPC64_TOC16_DS \.toc
|
.*: R_PPC64_TOC16_DS \.toc
|
||||||
.*: e0 82 00 10 lq r4,16\(r2\)
|
.*: (e0 82 00 .0|.0 00 82 e0) lq r4,.*\(r2\)
|
||||||
.*: R_PPC64_TOC16_DS \.toc\+0x10
|
.*: R_PPC64_TOC16_DS \.toc\+0x10
|
||||||
.*: e0 80 00 00 lq r4,0\(0\)
|
.*: (e0 80 00 00|00 00 80 e0) lq r4,0\(0\)
|
||||||
.*: R_PPC64_ADDR16_LO_DS \.text
|
.*: R_PPC64_ADDR16_LO_DS \.text
|
||||||
.*: e0 c3 00 00 lq r6,0\(r3\)
|
.*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\)
|
||||||
.*: R_PPC64_GOT16_DS dsym0
|
.*: R_PPC64_GOT16_DS dsym0
|
||||||
.*: e0 c3 00 00 lq r6,0\(r3\)
|
.*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\)
|
||||||
.*: R_PPC64_GOT16_LO_DS dsym0
|
.*: R_PPC64_GOT16_LO_DS dsym0
|
||||||
.*: e0 c3 00 00 lq r6,0\(r3\)
|
.*: (e0 c3 00 00|00 00 c3 e0) lq r6,0\(r3\)
|
||||||
.*: R_PPC64_PLT16_LO_DS \.data
|
.*: R_PPC64_PLT16_LO_DS \.data
|
||||||
.*: e0 c3 00 10 lq r6,16\(r3\)
|
.*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\)
|
||||||
.*: R_PPC64_SECTOFF_DS \.data\+0x10
|
.*: R_PPC64_SECTOFF_DS \.data\+0x10
|
||||||
.*: e0 c3 00 10 lq r6,16\(r3\)
|
.*: (e0 c3 00 .0|.0 00 c3 e0) lq r6,.*\(r3\)
|
||||||
.*: R_PPC64_SECTOFF_LO_DS \.data\+0x10
|
.*: R_PPC64_SECTOFF_LO_DS \.data\+0x10
|
||||||
.*: e0 c4 00 20 lq r6,32\(r4\)
|
.*: (e0 c4 00 20|20 00 c4 e0) lq r6,32\(r4\)
|
||||||
.*: f8 c7 00 02 stq r6,0\(r7\)
|
.*: (f8 c7 00 02|02 00 c7 f8) stq r6,0\(r7\)
|
||||||
.*: f8 c7 00 12 stq r6,16\(r7\)
|
.*: (f8 c7 00 12|12 00 c7 f8) stq r6,16\(r7\)
|
||||||
.*: f8 c7 ff f2 stq r6,-16\(r7\)
|
.*: (f8 c7 ff f2|f2 ff c7 f8) stq r6,-16\(r7\)
|
||||||
.*: f8 c7 80 02 stq r6,-32768\(r7\)
|
.*: (f8 c7 80 02|02 80 c7 f8) stq r6,-32768\(r7\)
|
||||||
.*: f8 c7 7f f2 stq r6,32752\(r7\)
|
.*: (f8 c7 7f f2|f2 7f c7 f8) stq r6,32752\(r7\)
|
||||||
.*: 00 00 02 00 attn
|
.*: (00 00 02 00|00 02 00 00) attn
|
||||||
.*: 7c 6f f1 20 mtcr r3
|
.*: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
|
||||||
.*: 7c 6f f1 20 mtcr r3
|
.*: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
|
||||||
.*: 7c 68 11 20 mtcrf 129,r3
|
.*: (7c 68 11 20|20 11 68 7c) mtcrf 129,r3
|
||||||
.*: 7c 70 11 20 mtocrf 1,r3
|
.*: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3
|
||||||
.*: 7c 70 21 20 mtocrf 2,r3
|
.*: (7c 70 21 20|20 21 70 7c) mtocrf 2,r3
|
||||||
.*: 7c 70 41 20 mtocrf 4,r3
|
.*: (7c 70 41 20|20 41 70 7c) mtocrf 4,r3
|
||||||
.*: 7c 70 81 20 mtocrf 8,r3
|
.*: (7c 70 81 20|20 81 70 7c) mtocrf 8,r3
|
||||||
.*: 7c 71 01 20 mtocrf 16,r3
|
.*: (7c 71 01 20|20 01 71 7c) mtocrf 16,r3
|
||||||
.*: 7c 72 01 20 mtocrf 32,r3
|
.*: (7c 72 01 20|20 01 72 7c) mtocrf 32,r3
|
||||||
.*: 7c 74 01 20 mtocrf 64,r3
|
.*: (7c 74 01 20|20 01 74 7c) mtocrf 64,r3
|
||||||
.*: 7c 78 01 20 mtocrf 128,r3
|
.*: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
|
||||||
.*: 7c 60 00 26 mfcr r3
|
.*: (7c 60 00 26|26 00 60 7c) mfcr r3
|
||||||
.*: 7c 70 10 26 mfocrf r3,1
|
.*: (7c 70 10 26|26 10 70 7c) mfocrf r3,1
|
||||||
.*: 7c 70 20 26 mfocrf r3,2
|
.*: (7c 70 20 26|26 20 70 7c) mfocrf r3,2
|
||||||
.*: 7c 70 40 26 mfocrf r3,4
|
.*: (7c 70 40 26|26 40 70 7c) mfocrf r3,4
|
||||||
.*: 7c 70 80 26 mfocrf r3,8
|
.*: (7c 70 80 26|26 80 70 7c) mfocrf r3,8
|
||||||
.*: 7c 71 00 26 mfocrf r3,16
|
.*: (7c 71 00 26|26 00 71 7c) mfocrf r3,16
|
||||||
.*: 7c 72 00 26 mfocrf r3,32
|
.*: (7c 72 00 26|26 00 72 7c) mfocrf r3,32
|
||||||
.*: 7c 74 00 26 mfocrf r3,64
|
.*: (7c 74 00 26|26 00 74 7c) mfocrf r3,64
|
||||||
.*: 7c 78 00 26 mfocrf r3,128
|
.*: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
|
||||||
.*: 7c 01 17 ec dcbz r1,r2
|
.*: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2
|
||||||
.*: 7c 23 27 ec dcbzl r3,r4
|
.*: (7c 23 27 ec|ec 27 23 7c) dcbzl r3,r4
|
||||||
.*: 7c 05 37 ec dcbz r5,r6
|
.*: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6
|
||||||
.*: e0 40 00 10 lq r2,16\(0\)
|
.*: (e0 40 00 10|10 00 40 e0) lq r2,16\(0\)
|
||||||
.*: e0 05 00 10 lq r0,16\(r5\)
|
.*: (e0 05 00 10|10 00 05 e0) lq r0,16\(r5\)
|
||||||
.*: e0 45 00 10 lq r2,16\(r5\)
|
.*: (e0 45 00 10|10 00 45 e0) lq r2,16\(r5\)
|
||||||
.*: f8 40 00 12 stq r2,16\(0\)
|
.*: (f8 40 00 12|12 00 40 f8) stq r2,16\(0\)
|
||||||
.*: f8 05 00 12 stq r0,16\(r5\)
|
.*: (f8 05 00 12|12 00 05 f8) stq r0,16\(r5\)
|
||||||
.*: f8 45 00 12 stq r2,16\(r5\)
|
.*: (f8 45 00 12|12 00 45 f8) stq r2,16\(r5\)
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section ".data"
|
.data
|
||||||
.p2align 4
|
.p2align 4
|
||||||
dsym0: .llong 0xdeadbeef
|
dsym0: .llong 0xdeadbeef
|
||||||
.llong 0xc0ffee
|
.llong 0xc0ffee
|
||||||
@ -13,7 +13,7 @@ dsym1:
|
|||||||
.tc ignored2[TC],usym0
|
.tc ignored2[TC],usym0
|
||||||
.tc ignored3[TC],usym1
|
.tc ignored3[TC],usym1
|
||||||
|
|
||||||
.section ".text"
|
.text
|
||||||
.p2align 4
|
.p2align 4
|
||||||
lq 4,dsym0@l(3)
|
lq 4,dsym0@l(3)
|
||||||
lq 4,dsym1@l(3)
|
lq 4,dsym1@l(3)
|
||||||
|
|||||||
@ -2,45 +2,46 @@
|
|||||||
#as: -a32 -mpower4
|
#as: -a32 -mpower4
|
||||||
#name: Power4 instructions
|
#name: Power4 instructions
|
||||||
|
|
||||||
.*: +file format elf32-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <start>:
|
0+00 <start>:
|
||||||
0: 80 c7 00 00 lwz r6,0\(r7\)
|
0: (80 c7 00 00|00 00 c7 80) lwz r6,0\(r7\)
|
||||||
4: 80 c7 00 10 lwz r6,16\(r7\)
|
4: (80 c7 00 10|10 00 c7 80) lwz r6,16\(r7\)
|
||||||
8: 80 c7 ff f0 lwz r6,-16\(r7\)
|
8: (80 c7 ff f0|f0 ff c7 80) lwz r6,-16\(r7\)
|
||||||
c: 80 c7 80 00 lwz r6,-32768\(r7\)
|
c: (80 c7 80 00|00 80 c7 80) lwz r6,-32768\(r7\)
|
||||||
10: 80 c7 7f f0 lwz r6,32752\(r7\)
|
10: (80 c7 7f f0|f0 7f c7 80) lwz r6,32752\(r7\)
|
||||||
14: 90 c7 00 00 stw r6,0\(r7\)
|
14: (90 c7 00 00|00 00 c7 90) stw r6,0\(r7\)
|
||||||
18: 90 c7 00 10 stw r6,16\(r7\)
|
18: (90 c7 00 10|10 00 c7 90) stw r6,16\(r7\)
|
||||||
1c: 90 c7 ff f0 stw r6,-16\(r7\)
|
1c: (90 c7 ff f0|f0 ff c7 90) stw r6,-16\(r7\)
|
||||||
20: 90 c7 80 00 stw r6,-32768\(r7\)
|
20: (90 c7 80 00|00 80 c7 90) stw r6,-32768\(r7\)
|
||||||
24: 90 c7 7f f0 stw r6,32752\(r7\)
|
24: (90 c7 7f f0|f0 7f c7 90) stw r6,32752\(r7\)
|
||||||
28: 00 00 02 00 attn
|
28: (00 00 02 00|00 02 00 00) attn
|
||||||
2c: 7c 6f f1 20 mtcr r3
|
2c: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
|
||||||
30: 7c 6f f1 20 mtcr r3
|
30: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
|
||||||
34: 7c 68 11 20 mtcrf 129,r3
|
34: (7c 68 11 20|20 11 68 7c) mtcrf 129,r3
|
||||||
38: 7c 70 11 20 mtocrf 1,r3
|
38: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3
|
||||||
3c: 7c 70 21 20 mtocrf 2,r3
|
3c: (7c 70 21 20|20 21 70 7c) mtocrf 2,r3
|
||||||
40: 7c 70 41 20 mtocrf 4,r3
|
40: (7c 70 41 20|20 41 70 7c) mtocrf 4,r3
|
||||||
44: 7c 70 81 20 mtocrf 8,r3
|
44: (7c 70 81 20|20 81 70 7c) mtocrf 8,r3
|
||||||
48: 7c 71 01 20 mtocrf 16,r3
|
48: (7c 71 01 20|20 01 71 7c) mtocrf 16,r3
|
||||||
4c: 7c 72 01 20 mtocrf 32,r3
|
4c: (7c 72 01 20|20 01 72 7c) mtocrf 32,r3
|
||||||
50: 7c 74 01 20 mtocrf 64,r3
|
50: (7c 74 01 20|20 01 74 7c) mtocrf 64,r3
|
||||||
54: 7c 78 01 20 mtocrf 128,r3
|
54: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
|
||||||
58: 7c 60 00 26 mfcr r3
|
58: (7c 60 00 26|26 00 60 7c) mfcr r3
|
||||||
5c: 7c 70 10 26 mfocrf r3,1
|
5c: (7c 70 10 26|26 10 70 7c) mfocrf r3,1
|
||||||
60: 7c 70 20 26 mfocrf r3,2
|
60: (7c 70 20 26|26 20 70 7c) mfocrf r3,2
|
||||||
64: 7c 70 40 26 mfocrf r3,4
|
64: (7c 70 40 26|26 40 70 7c) mfocrf r3,4
|
||||||
68: 7c 70 80 26 mfocrf r3,8
|
68: (7c 70 80 26|26 80 70 7c) mfocrf r3,8
|
||||||
6c: 7c 71 00 26 mfocrf r3,16
|
6c: (7c 71 00 26|26 00 71 7c) mfocrf r3,16
|
||||||
70: 7c 72 00 26 mfocrf r3,32
|
70: (7c 72 00 26|26 00 72 7c) mfocrf r3,32
|
||||||
74: 7c 74 00 26 mfocrf r3,64
|
74: (7c 74 00 26|26 00 74 7c) mfocrf r3,64
|
||||||
78: 7c 78 00 26 mfocrf r3,128
|
78: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
|
||||||
7c: 7c 01 17 ec dcbz r1,r2
|
7c: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2
|
||||||
80: 7c 23 27 ec dcbzl r3,r4
|
80: (7c 23 27 ec|ec 27 23 7c) dcbzl r3,r4
|
||||||
84: 7c 05 37 ec dcbz r5,r6
|
84: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6
|
||||||
88: 7c 05 32 2c dcbt r5,r6
|
88: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
|
||||||
8c: 7c 05 32 2c dcbt r5,r6
|
8c: (7c 05 32 2c|2c 32 05 7c) dcbt r5,r6
|
||||||
90: 7d 05 32 2c dcbt r5,r6,8
|
90: (7d 05 32 2c|2c 32 05 7d) dcbt r5,r6,8
|
||||||
|
#pass
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
lwz 6,0(7)
|
lwz 6,0(7)
|
||||||
lwz 6,16(7)
|
lwz 6,16(7)
|
||||||
|
|||||||
@ -2,72 +2,73 @@
|
|||||||
#objdump: -dr -Mpower6
|
#objdump: -dr -Mpower6
|
||||||
#name: POWER6 tests (includes DFP and Altivec)
|
#name: POWER6 tests (includes DFP and Altivec)
|
||||||
|
|
||||||
.*: +file format elf32-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <start>:
|
0+00 <start>:
|
||||||
0: 4c 00 03 24 doze
|
0: (4c 00 03 24|24 03 00 4c) doze
|
||||||
4: 4c 00 03 64 nap
|
4: (4c 00 03 64|64 03 00 4c) nap
|
||||||
8: 4c 00 03 a4 sleep
|
8: (4c 00 03 a4|a4 03 00 4c) sleep
|
||||||
c: 4c 00 03 e4 rvwinkle
|
c: (4c 00 03 e4|e4 03 00 4c) rvwinkle
|
||||||
10: 7c 83 01 34 prtyw r3,r4
|
10: (7c 83 01 34|34 01 83 7c) prtyw r3,r4
|
||||||
14: 7d cd 01 74 prtyd r13,r14
|
14: (7d cd 01 74|74 01 cd 7d) prtyd r13,r14
|
||||||
18: 7d 5c 02 a6 mfcfar r10
|
18: (7d 5c 02 a6|a6 02 5c 7d) mfcfar r10
|
||||||
1c: 7d 7c 03 a6 mtcfar r11
|
1c: (7d 7c 03 a6|a6 03 7c 7d) mtcfar r11
|
||||||
20: 7c 83 2b f8 cmpb r3,r4,r5
|
20: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5
|
||||||
24: 7c c0 3c be mffgpr f6,r7
|
24: (7c c0 3c be|be 3c c0 7c) mffgpr f6,r7
|
||||||
28: 7d 00 4d be mftgpr r8,f9
|
28: (7d 00 4d be|be 4d 00 7d) mftgpr r8,f9
|
||||||
2c: 7d 4b 66 2a lwzcix r10,r11,r12
|
2c: (7d 4b 66 2a|2a 66 4b 7d) lwzcix r10,r11,r12
|
||||||
30: 7d 8e 7e 2e lfdpx f12,r14,r15
|
30: (7d 8e 7e 2e|2e 7e 8e 7d) lfdpx f12,r14,r15
|
||||||
34: ee 11 90 04 dadd f16,f17,f18
|
34: (ee 11 90 04|04 90 11 ee) dadd f16,f17,f18
|
||||||
38: fe 96 c0 04 daddq f20,f22,f24
|
38: (fe 96 c0 04|04 c0 96 fe) daddq f20,f22,f24
|
||||||
3c: 7c 60 06 6c dss 3
|
3c: (7c 60 06 6c|6c 06 60 7c) dss 3
|
||||||
40: 7e 00 06 6c dssall
|
40: (7e 00 06 6c|6c 06 00 7e) dssall
|
||||||
44: 7c 25 22 ac dst r5,r4,1
|
44: (7c 25 22 ac|ac 22 25 7c) dst r5,r4,1
|
||||||
48: 7e 08 3a ac dstt r8,r7,0
|
48: (7e 08 3a ac|ac 3a 08 7e) dstt r8,r7,0
|
||||||
4c: 7c 65 32 ec dstst r5,r6,3
|
4c: (7c 65 32 ec|ec 32 65 7c) dstst r5,r6,3
|
||||||
50: 7e 44 2a ec dststt r4,r5,2
|
50: (7e 44 2a ec|ec 2a 44 7e) dststt r4,r5,2
|
||||||
54: 00 00 02 00 attn
|
54: (00 00 02 00|00 02 00 00) attn
|
||||||
58: 7c 6f f1 20 mtcr r3
|
58: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
|
||||||
5c: 7c 6f f1 20 mtcr r3
|
5c: (7c 6f f1 20|20 f1 6f 7c) mtcr r3
|
||||||
60: 7c 68 11 20 mtcrf 129,r3
|
60: (7c 68 11 20|20 11 68 7c) mtcrf 129,r3
|
||||||
64: 7c 70 11 20 mtocrf 1,r3
|
64: (7c 70 11 20|20 11 70 7c) mtocrf 1,r3
|
||||||
68: 7c 70 21 20 mtocrf 2,r3
|
68: (7c 70 21 20|20 21 70 7c) mtocrf 2,r3
|
||||||
6c: 7c 70 41 20 mtocrf 4,r3
|
6c: (7c 70 41 20|20 41 70 7c) mtocrf 4,r3
|
||||||
70: 7c 70 81 20 mtocrf 8,r3
|
70: (7c 70 81 20|20 81 70 7c) mtocrf 8,r3
|
||||||
74: 7c 71 01 20 mtocrf 16,r3
|
74: (7c 71 01 20|20 01 71 7c) mtocrf 16,r3
|
||||||
78: 7c 72 01 20 mtocrf 32,r3
|
78: (7c 72 01 20|20 01 72 7c) mtocrf 32,r3
|
||||||
7c: 7c 74 01 20 mtocrf 64,r3
|
7c: (7c 74 01 20|20 01 74 7c) mtocrf 64,r3
|
||||||
80: 7c 78 01 20 mtocrf 128,r3
|
80: (7c 78 01 20|20 01 78 7c) mtocrf 128,r3
|
||||||
84: 7c 60 00 26 mfcr r3
|
84: (7c 60 00 26|26 00 60 7c) mfcr r3
|
||||||
88: 7c 70 10 26 mfocrf r3,1
|
88: (7c 70 10 26|26 10 70 7c) mfocrf r3,1
|
||||||
8c: 7c 70 20 26 mfocrf r3,2
|
8c: (7c 70 20 26|26 20 70 7c) mfocrf r3,2
|
||||||
90: 7c 70 40 26 mfocrf r3,4
|
90: (7c 70 40 26|26 40 70 7c) mfocrf r3,4
|
||||||
94: 7c 70 80 26 mfocrf r3,8
|
94: (7c 70 80 26|26 80 70 7c) mfocrf r3,8
|
||||||
98: 7c 71 00 26 mfocrf r3,16
|
98: (7c 71 00 26|26 00 71 7c) mfocrf r3,16
|
||||||
9c: 7c 72 00 26 mfocrf r3,32
|
9c: (7c 72 00 26|26 00 72 7c) mfocrf r3,32
|
||||||
a0: 7c 74 00 26 mfocrf r3,64
|
a0: (7c 74 00 26|26 00 74 7c) mfocrf r3,64
|
||||||
a4: 7c 78 00 26 mfocrf r3,128
|
a4: (7c 78 00 26|26 00 78 7c) mfocrf r3,128
|
||||||
a8: 7c 01 17 ec dcbz r1,r2
|
a8: (7c 01 17 ec|ec 17 01 7c) dcbz r1,r2
|
||||||
ac: 7c 23 27 ec dcbzl r3,r4
|
ac: (7c 23 27 ec|ec 27 23 7c) dcbzl r3,r4
|
||||||
b0: 7c 05 37 ec dcbz r5,r6
|
b0: (7c 05 37 ec|ec 37 05 7c) dcbz r5,r6
|
||||||
b4: fc 0c 55 8e mtfsf 6,f10
|
b4: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10
|
||||||
b8: fc 0c 5d 8f mtfsf. 6,f11
|
b8: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf. 6,f11
|
||||||
bc: fc 0c 55 8e mtfsf 6,f10
|
bc: (fc 0c 55 8e|8e 55 0c fc) mtfsf 6,f10
|
||||||
c0: fc 0c 5d 8f mtfsf. 6,f11
|
c0: (fc 0c 5d 8f|8f 5d 0c fc) mtfsf. 6,f11
|
||||||
c4: fc 0d 55 8e mtfsf 6,f10,0,1
|
c4: (fc 0d 55 8e|8e 55 0d fc) mtfsf 6,f10,0,1
|
||||||
c8: fc 0d 5d 8f mtfsf. 6,f11,0,1
|
c8: (fc 0d 5d 8f|8f 5d 0d fc) mtfsf. 6,f11,0,1
|
||||||
cc: fe 0c 55 8e mtfsf 6,f10,1,0
|
cc: (fe 0c 55 8e|8e 55 0c fe) mtfsf 6,f10,1,0
|
||||||
d0: fe 0c 5d 8f mtfsf. 6,f11,1,0
|
d0: (fe 0c 5d 8f|8f 5d 0c fe) mtfsf. 6,f11,1,0
|
||||||
d4: ff 00 01 0c mtfsfi 6,0
|
d4: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
|
||||||
d8: ff 00 f1 0d mtfsfi. 6,15
|
d8: (ff 00 f1 0d|0d f1 00 ff) mtfsfi. 6,15
|
||||||
dc: ff 00 01 0c mtfsfi 6,0
|
dc: (ff 00 01 0c|0c 01 00 ff) mtfsfi 6,0
|
||||||
e0: ff 00 f1 0d mtfsfi. 6,15
|
e0: (ff 00 f1 0d|0d f1 00 ff) mtfsfi. 6,15
|
||||||
e4: ff 01 01 0c mtfsfi 6,0,1
|
e4: (ff 01 01 0c|0c 01 01 ff) mtfsfi 6,0,1
|
||||||
e8: ff 01 f1 0d mtfsfi. 6,15,1
|
e8: (ff 01 f1 0d|0d f1 01 ff) mtfsfi. 6,15,1
|
||||||
ec: 7d 6a 02 74 cbcdtd r10,r11
|
ec: (7d 6a 02 74|74 02 6a 7d) cbcdtd r10,r11
|
||||||
f0: 7d 6a 02 34 cdtbcd r10,r11
|
f0: (7d 6a 02 34|34 02 6a 7d) cdtbcd r10,r11
|
||||||
f4: 7d 4b 60 94 addg6s r10,r11,r12
|
f4: (7d 4b 60 94|94 60 4b 7d) addg6s r10,r11,r12
|
||||||
f8: 60 21 00 00 ori r1,r1,0
|
f8: (60 21 00 00|00 00 21 60) ori r1,r1,0
|
||||||
fc: 60 21 00 00 ori r1,r1,0
|
fc: (60 21 00 00|00 00 21 60) ori r1,r1,0
|
||||||
|
#pass
|
||||||
|
|||||||
@ -1,6 +1,6 @@
|
|||||||
# PowerPC POWER6 AltiVec tests
|
# PowerPC POWER6 AltiVec tests
|
||||||
#as: -mpower6
|
#as: -mpower6
|
||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
doze
|
doze
|
||||||
nap
|
nap
|
||||||
|
|||||||
@ -2,122 +2,123 @@
|
|||||||
#objdump: -dr -Mpower7
|
#objdump: -dr -Mpower7
|
||||||
#name: POWER7 tests (includes DFP, Altivec and VSX)
|
#name: POWER7 tests (includes DFP, Altivec and VSX)
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <power7>:
|
0+00 <power7>:
|
||||||
0: 7c 64 2e 98 lxvd2x vs3,r4,r5
|
0: (7c 64 2e 98|98 2e 64 7c) lxvd2x vs3,r4,r5
|
||||||
4: 7d 64 2e 99 lxvd2x vs43,r4,r5
|
4: (7d 64 2e 99|99 2e 64 7d) lxvd2x vs43,r4,r5
|
||||||
8: 7c 64 2f 98 stxvd2x vs3,r4,r5
|
8: (7c 64 2f 98|98 2f 64 7c) stxvd2x vs3,r4,r5
|
||||||
c: 7d 64 2f 99 stxvd2x vs43,r4,r5
|
c: (7d 64 2f 99|99 2f 64 7d) stxvd2x vs43,r4,r5
|
||||||
10: f0 64 28 50 xxmrghd vs3,vs4,vs5
|
10: (f0 64 28 50|50 28 64 f0) xxmrghd vs3,vs4,vs5
|
||||||
14: f1 6c 68 57 xxmrghd vs43,vs44,vs45
|
14: (f1 6c 68 57|57 68 6c f1) xxmrghd vs43,vs44,vs45
|
||||||
18: f0 64 2b 50 xxmrgld vs3,vs4,vs5
|
18: (f0 64 2b 50|50 2b 64 f0) xxmrgld vs3,vs4,vs5
|
||||||
1c: f1 6c 6b 57 xxmrgld vs43,vs44,vs45
|
1c: (f1 6c 6b 57|57 6b 6c f1) xxmrgld vs43,vs44,vs45
|
||||||
20: f0 64 28 50 xxmrghd vs3,vs4,vs5
|
20: (f0 64 28 50|50 28 64 f0) xxmrghd vs3,vs4,vs5
|
||||||
24: f1 6c 68 57 xxmrghd vs43,vs44,vs45
|
24: (f1 6c 68 57|57 68 6c f1) xxmrghd vs43,vs44,vs45
|
||||||
28: f0 64 2b 50 xxmrgld vs3,vs4,vs5
|
28: (f0 64 2b 50|50 2b 64 f0) xxmrgld vs3,vs4,vs5
|
||||||
2c: f1 6c 6b 57 xxmrgld vs43,vs44,vs45
|
2c: (f1 6c 6b 57|57 6b 6c f1) xxmrgld vs43,vs44,vs45
|
||||||
30: f0 64 29 50 xxpermdi vs3,vs4,vs5,1
|
30: (f0 64 29 50|50 29 64 f0) xxpermdi vs3,vs4,vs5,1
|
||||||
34: f1 6c 69 57 xxpermdi vs43,vs44,vs45,1
|
34: (f1 6c 69 57|57 69 6c f1) xxpermdi vs43,vs44,vs45,1
|
||||||
38: f0 64 2a 50 xxpermdi vs3,vs4,vs5,2
|
38: (f0 64 2a 50|50 2a 64 f0) xxpermdi vs3,vs4,vs5,2
|
||||||
3c: f1 6c 6a 57 xxpermdi vs43,vs44,vs45,2
|
3c: (f1 6c 6a 57|57 6a 6c f1) xxpermdi vs43,vs44,vs45,2
|
||||||
40: f0 64 27 80 xvmovdp vs3,vs4
|
40: (f0 64 27 80|80 27 64 f0) xvmovdp vs3,vs4
|
||||||
44: f1 6c 67 87 xvmovdp vs43,vs44
|
44: (f1 6c 67 87|87 67 6c f1) xvmovdp vs43,vs44
|
||||||
48: f0 64 27 80 xvmovdp vs3,vs4
|
48: (f0 64 27 80|80 27 64 f0) xvmovdp vs3,vs4
|
||||||
4c: f1 6c 67 87 xvmovdp vs43,vs44
|
4c: (f1 6c 67 87|87 67 6c f1) xvmovdp vs43,vs44
|
||||||
50: f0 64 2f 80 xvcpsgndp vs3,vs4,vs5
|
50: (f0 64 2f 80|80 2f 64 f0) xvcpsgndp vs3,vs4,vs5
|
||||||
54: f1 6c 6f 87 xvcpsgndp vs43,vs44,vs45
|
54: (f1 6c 6f 87|87 6f 6c f1) xvcpsgndp vs43,vs44,vs45
|
||||||
58: 7c 00 00 7c wait
|
58: (7c 00 00 7c|7c 00 00 7c) wait
|
||||||
5c: 7c 00 00 7c wait
|
5c: (7c 00 00 7c|7c 00 00 7c) wait
|
||||||
60: 7c 20 00 7c waitrsv
|
60: (7c 20 00 7c|7c 00 20 7c) waitrsv
|
||||||
64: 7c 20 00 7c waitrsv
|
64: (7c 20 00 7c|7c 00 20 7c) waitrsv
|
||||||
68: 7c 40 00 7c waitimpl
|
68: (7c 40 00 7c|7c 00 40 7c) waitimpl
|
||||||
6c: 7c 40 00 7c waitimpl
|
6c: (7c 40 00 7c|7c 00 40 7c) waitimpl
|
||||||
70: 4c 00 03 24 doze
|
70: (4c 00 03 24|24 03 00 4c) doze
|
||||||
74: 4c 00 03 64 nap
|
74: (4c 00 03 64|64 03 00 4c) nap
|
||||||
78: 4c 00 03 a4 sleep
|
78: (4c 00 03 a4|a4 03 00 4c) sleep
|
||||||
7c: 4c 00 03 e4 rvwinkle
|
7c: (4c 00 03 e4|e4 03 00 4c) rvwinkle
|
||||||
80: 7c 83 01 34 prtyw r3,r4
|
80: (7c 83 01 34|34 01 83 7c) prtyw r3,r4
|
||||||
84: 7d cd 01 74 prtyd r13,r14
|
84: (7d cd 01 74|74 01 cd 7d) prtyd r13,r14
|
||||||
88: 7d 5c 02 a6 mfcfar r10
|
88: (7d 5c 02 a6|a6 02 5c 7d) mfcfar r10
|
||||||
8c: 7d 7c 03 a6 mtcfar r11
|
8c: (7d 7c 03 a6|a6 03 7c 7d) mtcfar r11
|
||||||
90: 7c 83 2b f8 cmpb r3,r4,r5
|
90: (7c 83 2b f8|f8 2b 83 7c) cmpb r3,r4,r5
|
||||||
94: 7d 4b 66 2a lwzcix r10,r11,r12
|
94: (7d 4b 66 2a|2a 66 4b 7d) lwzcix r10,r11,r12
|
||||||
98: ee 11 90 04 dadd f16,f17,f18
|
98: (ee 11 90 04|04 90 11 ee) dadd f16,f17,f18
|
||||||
9c: fe 96 c0 04 daddq f20,f22,f24
|
9c: (fe 96 c0 04|04 c0 96 fe) daddq f20,f22,f24
|
||||||
a0: 7c 60 06 6c dss 3
|
a0: (7c 60 06 6c|6c 06 60 7c) dss 3
|
||||||
a4: 7e 00 06 6c dssall
|
a4: (7e 00 06 6c|6c 06 00 7e) dssall
|
||||||
a8: 7c 25 22 ac dst r5,r4,1
|
a8: (7c 25 22 ac|ac 22 25 7c) dst r5,r4,1
|
||||||
ac: 7e 08 3a ac dstt r8,r7,0
|
ac: (7e 08 3a ac|ac 3a 08 7e) dstt r8,r7,0
|
||||||
b0: 7c 65 32 ec dstst r5,r6,3
|
b0: (7c 65 32 ec|ec 32 65 7c) dstst r5,r6,3
|
||||||
b4: 7e 44 2a ec dststt r4,r5,2
|
b4: (7e 44 2a ec|ec 2a 44 7e) dststt r4,r5,2
|
||||||
b8: 7d 4b 63 56 divwe r10,r11,r12
|
b8: (7d 4b 63 56|56 63 4b 7d) divwe r10,r11,r12
|
||||||
bc: 7d 6c 6b 57 divwe\. r11,r12,r13
|
bc: (7d 6c 6b 57|57 6b 6c 7d) divwe\. r11,r12,r13
|
||||||
c0: 7d 8d 77 56 divweo r12,r13,r14
|
c0: (7d 8d 77 56|56 77 8d 7d) divweo r12,r13,r14
|
||||||
c4: 7d ae 7f 57 divweo\. r13,r14,r15
|
c4: (7d ae 7f 57|57 7f ae 7d) divweo\. r13,r14,r15
|
||||||
c8: 7d 4b 63 16 divweu r10,r11,r12
|
c8: (7d 4b 63 16|16 63 4b 7d) divweu r10,r11,r12
|
||||||
cc: 7d 6c 6b 17 divweu\. r11,r12,r13
|
cc: (7d 6c 6b 17|17 6b 6c 7d) divweu\. r11,r12,r13
|
||||||
d0: 7d 8d 77 16 divweuo r12,r13,r14
|
d0: (7d 8d 77 16|16 77 8d 7d) divweuo r12,r13,r14
|
||||||
d4: 7d ae 7f 17 divweuo\. r13,r14,r15
|
d4: (7d ae 7f 17|17 7f ae 7d) divweuo\. r13,r14,r15
|
||||||
d8: 7e 27 d9 f8 bpermd r7,r17,r27
|
d8: (7e 27 d9 f8|f8 d9 27 7e) bpermd r7,r17,r27
|
||||||
dc: 7e 8a 02 f4 popcntw r10,r20
|
dc: (7e 8a 02 f4|f4 02 8a 7e) popcntw r10,r20
|
||||||
e0: 7e 8a 03 f4 popcntd r10,r20
|
e0: (7e 8a 03 f4|f4 03 8a 7e) popcntd r10,r20
|
||||||
e4: 7e 95 b4 28 ldbrx r20,r21,r22
|
e4: (7e 95 b4 28|28 b4 95 7e) ldbrx r20,r21,r22
|
||||||
e8: 7e 95 b5 28 stdbrx r20,r21,r22
|
e8: (7e 95 b5 28|28 b5 95 7e) stdbrx r20,r21,r22
|
||||||
ec: 7d 40 56 ee lfiwzx f10,0,r10
|
ec: (7d 40 56 ee|ee 56 40 7d) lfiwzx f10,0,r10
|
||||||
f0: 7d 49 56 ee lfiwzx f10,r9,r10
|
f0: (7d 49 56 ee|ee 56 49 7d) lfiwzx f10,r9,r10
|
||||||
f4: ec 80 2e 9c fcfids f4,f5
|
f4: (ec 80 2e 9c|9c 2e 80 ec) fcfids f4,f5
|
||||||
f8: ec 80 2e 9d fcfids\. f4,f5
|
f8: (ec 80 2e 9d|9d 2e 80 ec) fcfids\. f4,f5
|
||||||
fc: ec 80 2f 9c fcfidus f4,f5
|
fc: (ec 80 2f 9c|9c 2f 80 ec) fcfidus f4,f5
|
||||||
100: ec 80 2f 9d fcfidus\. f4,f5
|
100: (ec 80 2f 9d|9d 2f 80 ec) fcfidus\. f4,f5
|
||||||
104: fc 80 29 1c fctiwu f4,f5
|
104: (fc 80 29 1c|1c 29 80 fc) fctiwu f4,f5
|
||||||
108: fc 80 29 1d fctiwu\. f4,f5
|
108: (fc 80 29 1d|1d 29 80 fc) fctiwu\. f4,f5
|
||||||
10c: fc 80 29 1e fctiwuz f4,f5
|
10c: (fc 80 29 1e|1e 29 80 fc) fctiwuz f4,f5
|
||||||
110: fc 80 29 1f fctiwuz\. f4,f5
|
110: (fc 80 29 1f|1f 29 80 fc) fctiwuz\. f4,f5
|
||||||
114: fc 80 2f 5c fctidu f4,f5
|
114: (fc 80 2f 5c|5c 2f 80 fc) fctidu f4,f5
|
||||||
118: fc 80 2f 5d fctidu\. f4,f5
|
118: (fc 80 2f 5d|5d 2f 80 fc) fctidu\. f4,f5
|
||||||
11c: fc 80 2f 5e fctiduz f4,f5
|
11c: (fc 80 2f 5e|5e 2f 80 fc) fctiduz f4,f5
|
||||||
120: fc 80 2f 5f fctiduz\. f4,f5
|
120: (fc 80 2f 5f|5f 2f 80 fc) fctiduz\. f4,f5
|
||||||
124: fc 80 2f 9c fcfidu f4,f5
|
124: (fc 80 2f 9c|9c 2f 80 fc) fcfidu f4,f5
|
||||||
128: fc 80 2f 9d fcfidu\. f4,f5
|
128: (fc 80 2f 9d|9d 2f 80 fc) fcfidu\. f4,f5
|
||||||
12c: fc 0a 59 00 ftdiv cr0,f10,f11
|
12c: (fc 0a 59 00|00 59 0a fc) ftdiv cr0,f10,f11
|
||||||
130: ff 8a 59 00 ftdiv cr7,f10,f11
|
130: (ff 8a 59 00|00 59 8a ff) ftdiv cr7,f10,f11
|
||||||
134: fc 00 51 40 ftsqrt cr0,f10
|
134: (fc 00 51 40|40 51 00 fc) ftsqrt cr0,f10
|
||||||
138: ff 80 51 40 ftsqrt cr7,f10
|
138: (ff 80 51 40|40 51 80 ff) ftsqrt cr7,f10
|
||||||
13c: 7e 08 4a 2c dcbtt r8,r9
|
13c: (7e 08 4a 2c|2c 4a 08 7e) dcbtt r8,r9
|
||||||
140: 7e 08 49 ec dcbtstt r8,r9
|
140: (7e 08 49 ec|ec 49 08 7e) dcbtstt r8,r9
|
||||||
144: ed 40 66 44 dcffix f10,f12
|
144: (ed 40 66 44|44 66 40 ed) dcffix f10,f12
|
||||||
148: ee 80 b6 45 dcffix\. f20,f22
|
148: (ee 80 b6 45|45 b6 80 ee) dcffix\. f20,f22
|
||||||
14c: 7d 4b 60 68 lbarx r10,r11,r12
|
14c: (7d 4b 60 68|68 60 4b 7d) lbarx r10,r11,r12
|
||||||
150: 7d 4b 60 68 lbarx r10,r11,r12
|
150: (7d 4b 60 68|68 60 4b 7d) lbarx r10,r11,r12
|
||||||
154: 7d 4b 60 69 lbarx r10,r11,r12,1
|
154: (7d 4b 60 69|69 60 4b 7d) lbarx r10,r11,r12,1
|
||||||
158: 7e 95 b0 e8 lharx r20,r21,r22
|
158: (7e 95 b0 e8|e8 b0 95 7e) lharx r20,r21,r22
|
||||||
15c: 7e 95 b0 e8 lharx r20,r21,r22
|
15c: (7e 95 b0 e8|e8 b0 95 7e) lharx r20,r21,r22
|
||||||
160: 7e 95 b0 e9 lharx r20,r21,r22,1
|
160: (7e 95 b0 e9|e9 b0 95 7e) lharx r20,r21,r22,1
|
||||||
164: 7d 4b 65 6d stbcx\. r10,r11,r12
|
164: (7d 4b 65 6d|6d 65 4b 7d) stbcx\. r10,r11,r12
|
||||||
168: 7d 4b 65 ad sthcx\. r10,r11,r12
|
168: (7d 4b 65 ad|ad 65 4b 7d) sthcx\. r10,r11,r12
|
||||||
16c: fd c0 78 30 fre f14,f15
|
16c: (fd c0 78 30|30 78 c0 fd) fre f14,f15
|
||||||
170: fd c0 78 31 fre\. f14,f15
|
170: (fd c0 78 31|31 78 c0 fd) fre\. f14,f15
|
||||||
174: ed c0 78 30 fres f14,f15
|
174: (ed c0 78 30|30 78 c0 ed) fres f14,f15
|
||||||
178: ed c0 78 31 fres\. f14,f15
|
178: (ed c0 78 31|31 78 c0 ed) fres\. f14,f15
|
||||||
17c: fd c0 78 34 frsqrte f14,f15
|
17c: (fd c0 78 34|34 78 c0 fd) frsqrte f14,f15
|
||||||
180: fd c0 78 35 frsqrte\. f14,f15
|
180: (fd c0 78 35|35 78 c0 fd) frsqrte\. f14,f15
|
||||||
184: ed c0 78 34 frsqrtes f14,f15
|
184: (ed c0 78 34|34 78 c0 ed) frsqrtes f14,f15
|
||||||
188: ed c0 78 35 frsqrtes\. f14,f15
|
188: (ed c0 78 35|35 78 c0 ed) frsqrtes\. f14,f15
|
||||||
18c: 7c 43 27 1e isel r2,r3,r4,28
|
18c: (7c 43 27 1e|1e 27 43 7c) isel r2,r3,r4,28
|
||||||
190: 60 42 00 00 ori r2,r2,0
|
190: (60 42 00 00|00 00 42 60) ori r2,r2,0
|
||||||
194: 60 00 00 00 nop
|
194: (60 00 00 00|00 00 00 60) nop
|
||||||
198: 60 00 00 00 nop
|
198: (60 00 00 00|00 00 00 60) nop
|
||||||
19c: 60 42 00 00 ori r2,r2,0
|
19c: (60 42 00 00|00 00 42 60) ori r2,r2,0
|
||||||
1a0: 7f 7b db 78 yield
|
1a0: (7f 7b db 78|78 db 7b 7f) yield
|
||||||
1a4: 7f 7b db 78 yield
|
1a4: (7f 7b db 78|78 db 7b 7f) yield
|
||||||
1a8: 7f bd eb 78 mdoio
|
1a8: (7f bd eb 78|78 eb bd 7f) mdoio
|
||||||
1ac: 7f bd eb 78 mdoio
|
1ac: (7f bd eb 78|78 eb bd 7f) mdoio
|
||||||
1b0: 7f de f3 78 mdoom
|
1b0: (7f de f3 78|78 f3 de 7f) mdoom
|
||||||
1b4: 7f de f3 78 mdoom
|
1b4: (7f de f3 78|78 f3 de 7f) mdoom
|
||||||
1b8: 7d 40 e2 a6 mfppr r10
|
1b8: (7d 40 e2 a6|a6 e2 40 7d) mfppr r10
|
||||||
1bc: 7d 62 e2 a6 mfppr32 r11
|
1bc: (7d 62 e2 a6|a6 e2 62 7d) mfppr32 r11
|
||||||
1c0: 7d 80 e3 a6 mtppr r12
|
1c0: (7d 80 e3 a6|a6 e3 80 7d) mtppr r12
|
||||||
1c4: 7d a2 e3 a6 mtppr32 r13
|
1c4: (7d a2 e3 a6|a6 e3 a2 7d) mtppr32 r13
|
||||||
|
#pass
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section ".text"
|
.text
|
||||||
power7:
|
power7:
|
||||||
lxvd2x 3,4,5
|
lxvd2x 3,4,5
|
||||||
lxvd2x 43,4,5
|
lxvd2x 43,4,5
|
||||||
|
|||||||
@ -28,8 +28,23 @@ if { [istarget powerpc64*-*-*] || [istarget *-*-elf64*]} then {
|
|||||||
|
|
||||||
if { [istarget powerpc*-*-*] } then {
|
if { [istarget powerpc*-*-*] } then {
|
||||||
run_dump_test "simpshft"
|
run_dump_test "simpshft"
|
||||||
run_dump_test "machine"
|
|
||||||
run_dump_test "regnames"
|
run_dump_test "regnames"
|
||||||
|
if { [is_elf_format] } then {
|
||||||
|
run_dump_test "machine"
|
||||||
|
run_dump_test "common"
|
||||||
|
run_dump_test "476"
|
||||||
|
run_dump_test "a2"
|
||||||
|
if { ![istarget powerpc*le-*-*] } then {
|
||||||
|
run_dump_test "vle"
|
||||||
|
run_dump_test "vle-reloc"
|
||||||
|
run_dump_test "vle-simple-1"
|
||||||
|
run_dump_test "vle-simple-2"
|
||||||
|
run_dump_test "vle-simple-3"
|
||||||
|
run_dump_test "vle-simple-4"
|
||||||
|
run_dump_test "vle-simple-5"
|
||||||
|
run_dump_test "vle-simple-6"
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
if { [istarget powerpc-*-*aix*] } then {
|
if { [istarget powerpc-*-*aix*] } then {
|
||||||
run_dump_test "altivec_xcoff"
|
run_dump_test "altivec_xcoff"
|
||||||
@ -47,22 +62,11 @@ if { [istarget powerpc*-*-*] } then {
|
|||||||
run_dump_test "e500mc64_nop"
|
run_dump_test "e500mc64_nop"
|
||||||
run_dump_test "e5500_nop"
|
run_dump_test "e5500_nop"
|
||||||
run_dump_test "e6500_nop"
|
run_dump_test "e6500_nop"
|
||||||
run_dump_test "a2"
|
|
||||||
run_dump_test "cell"
|
run_dump_test "cell"
|
||||||
run_dump_test "common"
|
|
||||||
run_dump_test "power4_32"
|
run_dump_test "power4_32"
|
||||||
run_dump_test "power6"
|
run_dump_test "power6"
|
||||||
run_dump_test "power7"
|
run_dump_test "power7"
|
||||||
run_dump_test "vsx"
|
run_dump_test "vsx"
|
||||||
run_dump_test "476"
|
|
||||||
run_dump_test "titan"
|
run_dump_test "titan"
|
||||||
run_dump_test "vle"
|
|
||||||
run_dump_test "vle-reloc"
|
|
||||||
run_dump_test "vle-simple-1"
|
|
||||||
run_dump_test "vle-simple-2"
|
|
||||||
run_dump_test "vle-simple-3"
|
|
||||||
run_dump_test "vle-simple-4"
|
|
||||||
run_dump_test "vle-simple-5"
|
|
||||||
run_dump_test "vle-simple-6"
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
@ -2,71 +2,72 @@
|
|||||||
#objdump: -dr -Mppcps
|
#objdump: -dr -Mppcps
|
||||||
#name: PPC750CL paired single tests
|
#name: PPC750CL paired single tests
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+0000000 <start>:
|
0+0000000 <start>:
|
||||||
0: e0 03 d0 04 psq_l f0,4\(r3\),1,5
|
0: (e0 03 d0 04|04 d0 03 e0) psq_l f0,4\(r3\),1,5
|
||||||
4: e4 22 30 08 psq_lu f1,8\(r2\),0,3
|
4: (e4 22 30 08|08 30 22 e4) psq_lu f1,8\(r2\),0,3
|
||||||
8: 10 45 25 4c psq_lux f2,r5,r4,1,2
|
8: (10 45 25 4c|4c 25 45 10) psq_lux f2,r5,r4,1,2
|
||||||
c: 10 62 22 8c psq_lx f3,r2,r4,0,5
|
c: (10 62 22 8c|8c 22 62 10) psq_lx f3,r2,r4,0,5
|
||||||
10: f0 62 30 08 psq_st f3,8\(r2\),0,3
|
10: (f0 62 30 08|08 30 62 f0) psq_st f3,8\(r2\),0,3
|
||||||
14: f4 62 70 08 psq_stu f3,8\(r2\),0,7
|
14: (f4 62 70 08|08 70 62 f4) psq_stu f3,8\(r2\),0,7
|
||||||
18: 10 43 22 ce psq_stux f2,r3,r4,0,5
|
18: (10 43 22 ce|ce 22 43 10) psq_stux f2,r3,r4,0,5
|
||||||
1c: 10 c7 46 0e psq_stx f6,r7,r8,1,4
|
1c: (10 c7 46 0e|0e 46 c7 10) psq_stx f6,r7,r8,1,4
|
||||||
20: 10 a0 3a 10 ps_abs f5,f7
|
20: (10 a0 3a 10|10 3a a0 10) ps_abs f5,f7
|
||||||
24: 10 a0 3a 11 ps_abs. f5,f7
|
24: (10 a0 3a 11|11 3a a0 10) ps_abs. f5,f7
|
||||||
28: 10 22 18 2a ps_add f1,f2,f3
|
28: (10 22 18 2a|2a 18 22 10) ps_add f1,f2,f3
|
||||||
2c: 10 22 18 2b ps_add. f1,f2,f3
|
2c: (10 22 18 2b|2b 18 22 10) ps_add. f1,f2,f3
|
||||||
30: 11 82 20 40 ps_cmpo0 cr3,f2,f4
|
30: (11 82 20 40|40 20 82 11) ps_cmpo0 cr3,f2,f4
|
||||||
34: 11 82 20 c0 ps_cmpo1 cr3,f2,f4
|
34: (11 82 20 c0|c0 20 82 11) ps_cmpo1 cr3,f2,f4
|
||||||
38: 11 82 20 00 ps_cmpu0 cr3,f2,f4
|
38: (11 82 20 00|00 20 82 11) ps_cmpu0 cr3,f2,f4
|
||||||
3c: 11 82 20 80 ps_cmpu1 cr3,f2,f4
|
3c: (11 82 20 80|80 20 82 11) ps_cmpu1 cr3,f2,f4
|
||||||
40: 10 44 30 24 ps_div f2,f4,f6
|
40: (10 44 30 24|24 30 44 10) ps_div f2,f4,f6
|
||||||
44: 10 44 30 25 ps_div. f2,f4,f6
|
44: (10 44 30 25|25 30 44 10) ps_div. f2,f4,f6
|
||||||
48: 10 01 18 ba ps_madd f0,f1,f2,f3
|
48: (10 01 18 ba|ba 18 01 10) ps_madd f0,f1,f2,f3
|
||||||
4c: 10 01 18 bb ps_madd. f0,f1,f2,f3
|
4c: (10 01 18 bb|bb 18 01 10) ps_madd. f0,f1,f2,f3
|
||||||
50: 10 22 20 dc ps_madds0 f1,f2,f3,f4
|
50: (10 22 20 dc|dc 20 22 10) ps_madds0 f1,f2,f3,f4
|
||||||
54: 10 22 20 dd ps_madds0. f1,f2,f3,f4
|
54: (10 22 20 dd|dd 20 22 10) ps_madds0. f1,f2,f3,f4
|
||||||
58: 10 22 20 de ps_madds1 f1,f2,f3,f4
|
58: (10 22 20 de|de 20 22 10) ps_madds1 f1,f2,f3,f4
|
||||||
5c: 10 22 20 df ps_madds1. f1,f2,f3,f4
|
5c: (10 22 20 df|df 20 22 10) ps_madds1. f1,f2,f3,f4
|
||||||
60: 10 44 34 20 ps_merge00 f2,f4,f6
|
60: (10 44 34 20|20 34 44 10) ps_merge00 f2,f4,f6
|
||||||
64: 10 44 34 21 ps_merge00. f2,f4,f6
|
64: (10 44 34 21|21 34 44 10) ps_merge00. f2,f4,f6
|
||||||
68: 10 44 34 60 ps_merge01 f2,f4,f6
|
68: (10 44 34 60|60 34 44 10) ps_merge01 f2,f4,f6
|
||||||
6c: 10 44 34 61 ps_merge01. f2,f4,f6
|
6c: (10 44 34 61|61 34 44 10) ps_merge01. f2,f4,f6
|
||||||
70: 10 44 34 a0 ps_merge10 f2,f4,f6
|
70: (10 44 34 a0|a0 34 44 10) ps_merge10 f2,f4,f6
|
||||||
74: 10 44 34 a1 ps_merge10. f2,f4,f6
|
74: (10 44 34 a1|a1 34 44 10) ps_merge10. f2,f4,f6
|
||||||
78: 10 44 34 e0 ps_merge11 f2,f4,f6
|
78: (10 44 34 e0|e0 34 44 10) ps_merge11 f2,f4,f6
|
||||||
7c: 10 44 34 e1 ps_merge11. f2,f4,f6
|
7c: (10 44 34 e1|e1 34 44 10) ps_merge11. f2,f4,f6
|
||||||
80: 10 60 28 90 ps_mr f3,f5
|
80: (10 60 28 90|90 28 60 10) ps_mr f3,f5
|
||||||
84: 10 60 28 91 ps_mr. f3,f5
|
84: (10 60 28 91|91 28 60 10) ps_mr. f3,f5
|
||||||
88: 10 44 41 b8 ps_msub f2,f4,f6,f8
|
88: (10 44 41 b8|b8 41 44 10) ps_msub f2,f4,f6,f8
|
||||||
8c: 10 44 41 b9 ps_msub. f2,f4,f6,f8
|
8c: (10 44 41 b9|b9 41 44 10) ps_msub. f2,f4,f6,f8
|
||||||
90: 10 43 01 72 ps_mul f2,f3,f5
|
90: (10 43 01 72|72 01 43 10) ps_mul f2,f3,f5
|
||||||
94: 10 43 01 73 ps_mul. f2,f3,f5
|
94: (10 43 01 73|73 01 43 10) ps_mul. f2,f3,f5
|
||||||
98: 10 64 01 d8 ps_muls0 f3,f4,f7
|
98: (10 64 01 d8|d8 01 64 10) ps_muls0 f3,f4,f7
|
||||||
9c: 10 64 01 d9 ps_muls0. f3,f4,f7
|
9c: (10 64 01 d9|d9 01 64 10) ps_muls0. f3,f4,f7
|
||||||
a0: 10 64 01 da ps_muls1 f3,f4,f7
|
a0: (10 64 01 da|da 01 64 10) ps_muls1 f3,f4,f7
|
||||||
a4: 10 64 01 db ps_muls1. f3,f4,f7
|
a4: (10 64 01 db|db 01 64 10) ps_muls1. f3,f4,f7
|
||||||
a8: 10 20 29 10 ps_nabs f1,f5
|
a8: (10 20 29 10|10 29 20 10) ps_nabs f1,f5
|
||||||
ac: 10 20 29 11 ps_nabs. f1,f5
|
ac: (10 20 29 11|11 29 20 10) ps_nabs. f1,f5
|
||||||
b0: 10 20 28 50 ps_neg f1,f5
|
b0: (10 20 28 50|50 28 20 10) ps_neg f1,f5
|
||||||
b4: 10 20 28 51 ps_neg. f1,f5
|
b4: (10 20 28 51|51 28 20 10) ps_neg. f1,f5
|
||||||
b8: 10 23 39 7e ps_nmadd f1,f3,f5,f7
|
b8: (10 23 39 7e|7e 39 23 10) ps_nmadd f1,f3,f5,f7
|
||||||
bc: 10 23 39 7f ps_nmadd. f1,f3,f5,f7
|
bc: (10 23 39 7f|7f 39 23 10) ps_nmadd. f1,f3,f5,f7
|
||||||
c0: 10 23 39 7c ps_nmsub f1,f3,f5,f7
|
c0: (10 23 39 7c|7c 39 23 10) ps_nmsub f1,f3,f5,f7
|
||||||
c4: 10 23 39 7d ps_nmsub. f1,f3,f5,f7
|
c4: (10 23 39 7d|7d 39 23 10) ps_nmsub. f1,f3,f5,f7
|
||||||
c8: 11 20 18 30 ps_res f9,f3
|
c8: (11 20 18 30|30 18 20 11) ps_res f9,f3
|
||||||
cc: 11 20 18 31 ps_res. f9,f3
|
cc: (11 20 18 31|31 18 20 11) ps_res. f9,f3
|
||||||
d0: 11 20 18 34 ps_rsqrte f9,f3
|
d0: (11 20 18 34|34 18 20 11) ps_rsqrte f9,f3
|
||||||
d4: 11 20 18 35 ps_rsqrte. f9,f3
|
d4: (11 20 18 35|35 18 20 11) ps_rsqrte. f9,f3
|
||||||
d8: 10 22 20 ee ps_sel f1,f2,f3,f4
|
d8: (10 22 20 ee|ee 20 22 10) ps_sel f1,f2,f3,f4
|
||||||
dc: 10 22 20 ef ps_sel. f1,f2,f3,f4
|
dc: (10 22 20 ef|ef 20 22 10) ps_sel. f1,f2,f3,f4
|
||||||
e0: 10 ab 10 28 ps_sub f5,f11,f2
|
e0: (10 ab 10 28|28 10 ab 10) ps_sub f5,f11,f2
|
||||||
e4: 10 ab 10 29 ps_sub. f5,f11,f2
|
e4: (10 ab 10 29|29 10 ab 10) ps_sub. f5,f11,f2
|
||||||
e8: 10 45 52 54 ps_sum0 f2,f5,f9,f10
|
e8: (10 45 52 54|54 52 45 10) ps_sum0 f2,f5,f9,f10
|
||||||
ec: 10 45 52 55 ps_sum0. f2,f5,f9,f10
|
ec: (10 45 52 55|55 52 45 10) ps_sum0. f2,f5,f9,f10
|
||||||
f0: 10 45 52 56 ps_sum1 f2,f5,f9,f10
|
f0: (10 45 52 56|56 52 45 10) ps_sum1 f2,f5,f9,f10
|
||||||
f4: 10 45 52 57 ps_sum1. f2,f5,f9,f10
|
f4: (10 45 52 57|57 52 45 10) ps_sum1. f2,f5,f9,f10
|
||||||
f8: 10 03 2f ec dcbz_l r3,r5
|
f8: (10 03 2f ec|ec 2f 03 10) dcbz_l r3,r5
|
||||||
|
#pass
|
||||||
|
|||||||
@ -1,5 +1,5 @@
|
|||||||
# PowerPC 750 paired single precision tests
|
# PowerPC 750 paired single precision tests
|
||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
psq_l 0, 4(3), 1, 5
|
psq_l 0, 4(3), 1, 5
|
||||||
psq_lu 1, 8(2), 0, 3
|
psq_lu 1, 8(2), 0, 3
|
||||||
|
|||||||
@ -5,4 +5,4 @@
|
|||||||
.*
|
.*
|
||||||
|
|
||||||
Contents of section \.text:
|
Contents of section \.text:
|
||||||
0000 4fbdcb82 88850004 .*
|
0000 (4fbdcb82|82cbbd4f) (88850004|04008588) .*
|
||||||
|
|||||||
@ -1,27 +1,87 @@
|
|||||||
#objdump: -s -j .text
|
#objdump: -d -Mppc64
|
||||||
#as: -mppc64
|
#as: -mppc64
|
||||||
#name: PowerPC test 3, simplified shifts
|
#name: PowerPC test 3, simplified shifts
|
||||||
|
|
||||||
.*
|
.*
|
||||||
|
|
||||||
Contents of section \.text:
|
Disassembly of section .text:
|
||||||
0000 78640fe0 7883f80e 78a545e4 78640020 xd..x...x.E.xd.
|
|
||||||
0010 54640ffe 5083f800 54a5402e 5464043e Td..P...T.@.Td.>
|
0+ <.text>:
|
||||||
0020 78640004 786407e4 7864f806 7864ffe6 xd..xd..xd..xd..
|
0: (e0 0f 64 78|78 64 0f e0) rldicl r4,r3,1,63
|
||||||
0030 7864f842 7864ffe2 7864000c 7864080c xd.Bxd..xd..xd..
|
4: (0e f8 83 78|78 83 f8 0e) rldimi r3,r4,63,0
|
||||||
0040 78640fac 786407ec 78640000 78640800 xd..xd..xd..xd..
|
8: (e4 45 a5 78|78 a5 45 e4) rldicr r5,r5,8,55
|
||||||
0050 7864f802 78640000 7864f802 78640800 xd..xd..xd..xd..
|
c: (20 00 64 78|78 64 00 20) clrldi r4,r3,32
|
||||||
0060 78652010 786407e4 7864f806 78640000 xe .xd..xd..xd..
|
10: (fe 0f 64 54|54 64 0f fe) rlwinm r4,r3,1,31,31
|
||||||
0070 7864f842 78640fe0 78640000 78640040 xd.Bxd..xd..xd.@
|
14: (00 f8 83 50|50 83 f8 00) rlwimi r3,r4,31,0,0
|
||||||
0080 786407e0 786407e4 786407a4 78640004 xd..xd..xd..xd..
|
18: (2e 40 a5 54|54 a5 40 2e) rlwinm r5,r5,8,0,23
|
||||||
0090 78640008 78640048 786407e8 78640fa8 xd..xd.Hxd..xd..
|
1c: (3e 04 64 54|54 64 04 3e) clrlwi r4,r3,16
|
||||||
00a0 7864f80a 54640000 5464003e 5464f800 xd..Td..Td.>Td..
|
20: (04 00 64 78|78 64 00 04) rldicr r4,r3,0,0
|
||||||
00b0 5464f83e 5464f87e 5464fffe 50640000 Td.>Td.~Td..Pd..
|
24: (e4 07 64 78|78 64 07 e4) rldicr r4,r3,0,63
|
||||||
00c0 5064003e 50640ffe 5064f800 5064003e Pd.>Pd..Pd..Pd.>
|
28: (06 f8 64 78|78 64 f8 06) rldicr r4,r3,63,0
|
||||||
00d0 506407fe 5464003e 5464083e 5464f83e Pd..Td.>Td.>Td.>
|
2c: (e6 ff 64 78|78 64 ff e6) rldicr r4,r3,63,63
|
||||||
00e0 5464003e 5464f83e 5464083e 5c65203e Td.>Td.>Td.>\\e >
|
30: (42 f8 64 78|78 64 f8 42) rldicl r4,r3,63,1
|
||||||
00f0 5464003e 5464083c 5464f800 5464003e Td.>Td.<Td..Td.>
|
34: (e2 ff 64 78|78 64 ff e2) rldicl r4,r3,63,63
|
||||||
0100 5464f87e 54640ffe 5464003e 5464007e Td.~Td..Td.>Td.~
|
38: (0c 00 64 78|78 64 00 0c) rldimi r4,r3,0,0
|
||||||
0110 546407fe 5464003e 5464003c 54640000 Td..Td.>Td.<Td..
|
3c: (0c 08 64 78|78 64 08 0c) rldimi r4,r3,1,0
|
||||||
0120 5464003e 5464007e 546407fe 54640fbc Td.>Td.~Td..Td..
|
40: (ac 0f 64 78|78 64 0f ac) rldimi r4,r3,1,62
|
||||||
0130 5464f800 00000000 Td......
|
44: (ec 07 64 78|78 64 07 ec) rldimi r4,r3,0,63
|
||||||
|
48: (00 00 64 78|78 64 00 00) rotldi r4,r3,0
|
||||||
|
4c: (00 08 64 78|78 64 08 00) rotldi r4,r3,1
|
||||||
|
50: (02 f8 64 78|78 64 f8 02) rotldi r4,r3,63
|
||||||
|
54: (00 00 64 78|78 64 00 00) rotldi r4,r3,0
|
||||||
|
58: (02 f8 64 78|78 64 f8 02) rotldi r4,r3,63
|
||||||
|
5c: (00 08 64 78|78 64 08 00) rotldi r4,r3,1
|
||||||
|
60: (10 20 65 78|78 65 20 10) rotld r5,r3,r4
|
||||||
|
64: (e4 07 64 78|78 64 07 e4) rldicr r4,r3,0,63
|
||||||
|
68: (06 f8 64 78|78 64 f8 06) rldicr r4,r3,63,0
|
||||||
|
6c: (00 00 64 78|78 64 00 00) rotldi r4,r3,0
|
||||||
|
70: (42 f8 64 78|78 64 f8 42) rldicl r4,r3,63,1
|
||||||
|
74: (e0 0f 64 78|78 64 0f e0) rldicl r4,r3,1,63
|
||||||
|
78: (00 00 64 78|78 64 00 00) rotldi r4,r3,0
|
||||||
|
7c: (40 00 64 78|78 64 00 40) clrldi r4,r3,1
|
||||||
|
80: (e0 07 64 78|78 64 07 e0) clrldi r4,r3,63
|
||||||
|
84: (e4 07 64 78|78 64 07 e4) rldicr r4,r3,0,63
|
||||||
|
88: (a4 07 64 78|78 64 07 a4) rldicr r4,r3,0,62
|
||||||
|
8c: (04 00 64 78|78 64 00 04) rldicr r4,r3,0,0
|
||||||
|
90: (08 00 64 78|78 64 00 08) rldic r4,r3,0,0
|
||||||
|
94: (48 00 64 78|78 64 00 48) rldic r4,r3,0,1
|
||||||
|
98: (e8 07 64 78|78 64 07 e8) rldic r4,r3,0,63
|
||||||
|
9c: (a8 0f 64 78|78 64 0f a8) rldic r4,r3,1,62
|
||||||
|
a0: (0a f8 64 78|78 64 f8 0a) rldic r4,r3,63,0
|
||||||
|
a4: (00 00 64 54|54 64 00 00) rlwinm r4,r3,0,0,0
|
||||||
|
a8: (3e 00 64 54|54 64 00 3e) rotlwi r4,r3,0
|
||||||
|
ac: (00 f8 64 54|54 64 f8 00) rlwinm r4,r3,31,0,0
|
||||||
|
b0: (3e f8 64 54|54 64 f8 3e) rotlwi r4,r3,31
|
||||||
|
b4: (7e f8 64 54|54 64 f8 7e) rlwinm r4,r3,31,1,31
|
||||||
|
b8: (fe ff 64 54|54 64 ff fe) rlwinm r4,r3,31,31,31
|
||||||
|
bc: (00 00 64 50|50 64 00 00) rlwimi r4,r3,0,0,0
|
||||||
|
c0: (3e 00 64 50|50 64 00 3e) rlwimi r4,r3,0,0,31
|
||||||
|
c4: (fe 0f 64 50|50 64 0f fe) rlwimi r4,r3,1,31,31
|
||||||
|
c8: (00 f8 64 50|50 64 f8 00) rlwimi r4,r3,31,0,0
|
||||||
|
cc: (3e 00 64 50|50 64 00 3e) rlwimi r4,r3,0,0,31
|
||||||
|
d0: (fe 07 64 50|50 64 07 fe) rlwimi r4,r3,0,31,31
|
||||||
|
d4: (3e 00 64 54|54 64 00 3e) rotlwi r4,r3,0
|
||||||
|
d8: (3e 08 64 54|54 64 08 3e) rotlwi r4,r3,1
|
||||||
|
dc: (3e f8 64 54|54 64 f8 3e) rotlwi r4,r3,31
|
||||||
|
e0: (3e 00 64 54|54 64 00 3e) rotlwi r4,r3,0
|
||||||
|
e4: (3e f8 64 54|54 64 f8 3e) rotlwi r4,r3,31
|
||||||
|
e8: (3e 08 64 54|54 64 08 3e) rotlwi r4,r3,1
|
||||||
|
ec: (3e 20 65 5c|5c 65 20 3e) rotlw r5,r3,r4
|
||||||
|
f0: (3e 00 64 54|54 64 00 3e) rotlwi r4,r3,0
|
||||||
|
f4: (3c 08 64 54|54 64 08 3c) rlwinm r4,r3,1,0,30
|
||||||
|
f8: (00 f8 64 54|54 64 f8 00) rlwinm r4,r3,31,0,0
|
||||||
|
fc: (3e 00 64 54|54 64 00 3e) rotlwi r4,r3,0
|
||||||
|
100: (7e f8 64 54|54 64 f8 7e) rlwinm r4,r3,31,1,31
|
||||||
|
104: (fe 0f 64 54|54 64 0f fe) rlwinm r4,r3,1,31,31
|
||||||
|
108: (3e 00 64 54|54 64 00 3e) rotlwi r4,r3,0
|
||||||
|
10c: (7e 00 64 54|54 64 00 7e) clrlwi r4,r3,1
|
||||||
|
110: (fe 07 64 54|54 64 07 fe) clrlwi r4,r3,31
|
||||||
|
114: (3e 00 64 54|54 64 00 3e) rotlwi r4,r3,0
|
||||||
|
118: (3c 00 64 54|54 64 00 3c) rlwinm r4,r3,0,0,30
|
||||||
|
11c: (00 00 64 54|54 64 00 00) rlwinm r4,r3,0,0,0
|
||||||
|
120: (3e 00 64 54|54 64 00 3e) rotlwi r4,r3,0
|
||||||
|
124: (7e 00 64 54|54 64 00 7e) clrlwi r4,r3,1
|
||||||
|
128: (fe 07 64 54|54 64 07 fe) clrlwi r4,r3,31
|
||||||
|
12c: (bc 0f 64 54|54 64 0f bc) rlwinm r4,r3,1,30,30
|
||||||
|
130: (00 f8 64 54|54 64 f8 00) rlwinm r4,r3,31,0,0
|
||||||
|
#pass
|
||||||
|
|||||||
@ -1,7 +1,7 @@
|
|||||||
#objdump: -Drx
|
#objdump: -Drx
|
||||||
#name: PowerPC Test 1, 32 bit elf
|
#name: PowerPC Test 1, 32 bit elf
|
||||||
|
|
||||||
.*: +file format elf32-powerpc
|
.*
|
||||||
.*
|
.*
|
||||||
architecture: powerpc:common, flags 0x00000011:
|
architecture: powerpc:common, flags 0x00000011:
|
||||||
HAS_RELOC, HAS_SYMS
|
HAS_RELOC, HAS_SYMS
|
||||||
@ -35,56 +35,56 @@ SYMBOL TABLE:
|
|||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+0000 <\.text>:
|
0+0000 <\.text>:
|
||||||
0: 80 63 00 00 lwz r3,0\(r3\)
|
0: (80 63 00 00|00 00 63 80) lwz r3,0\(r3\)
|
||||||
2: R_PPC_ADDR16_LO \.data
|
(2|0): R_PPC_ADDR16_LO \.data
|
||||||
4: 80 63 00 04 lwz r3,4\(r3\)
|
4: (80 63 00 0.|0. 00 63 80) lwz r3,.\(r3\)
|
||||||
6: R_PPC_ADDR16_LO \.data\+0x4
|
(6|4): R_PPC_ADDR16_LO \.data\+0x4
|
||||||
8: 80 63 00 04 lwz r3,4\(r3\)
|
8: (80 63 00 0.|0. 00 63 80) lwz r3,.\(r3\)
|
||||||
a: R_PPC_ADDR16_LO \.data\+0x4
|
(a|8): R_PPC_ADDR16_LO \.data\+0x4
|
||||||
c: 80 63 00 08 lwz r3,8\(r3\)
|
c: (80 63 00 0.|0. 00 63 80) lwz r3,.\(r3\)
|
||||||
e: R_PPC_ADDR16_LO \.data\+0x8
|
(e|c): R_PPC_ADDR16_LO \.data\+0x8
|
||||||
10: 80 63 00 00 lwz r3,0\(r3\)
|
10: (80 63 00 00|00 00 63 80) lwz r3,0\(r3\)
|
||||||
12: R_PPC_ADDR16_LO esym0
|
(12|10): R_PPC_ADDR16_LO esym0
|
||||||
14: 80 63 00 00 lwz r3,0\(r3\)
|
14: (80 63 00 00|00 00 63 80) lwz r3,0\(r3\)
|
||||||
16: R_PPC_ADDR16_LO esym1
|
(16|14): R_PPC_ADDR16_LO esym1
|
||||||
18: 38 60 00 04 li r3,4
|
18: (38 60 00 04|04 00 60 38) li r3,4
|
||||||
1c: 38 60 ff fc li r3,-4
|
1c: (38 60 ff fc|fc ff 60 38) li r3,-4
|
||||||
20: 38 60 00 04 li r3,4
|
20: (38 60 00 04|04 00 60 38) li r3,4
|
||||||
24: 38 60 ff fc li r3,-4
|
24: (38 60 ff fc|fc ff 60 38) li r3,-4
|
||||||
28: 38 60 ff fc li r3,-4
|
28: (38 60 ff fc|fc ff 60 38) li r3,-4
|
||||||
2c: 38 60 00 04 li r3,4
|
2c: (38 60 00 04|04 00 60 38) li r3,4
|
||||||
30: 38 60 00 00 li r3,0
|
30: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
32: R_PPC_ADDR16_LO \.data
|
(32|30): R_PPC_ADDR16_LO \.data
|
||||||
34: 38 60 00 00 li r3,0
|
34: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
36: R_PPC_ADDR16_HI \.data
|
(36|34): R_PPC_ADDR16_HI \.data
|
||||||
38: 38 60 00 00 li r3,0
|
38: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
3a: R_PPC_ADDR16_HA \.data
|
(3a|38): R_PPC_ADDR16_HA \.data
|
||||||
3c: 38 60 ff fc li r3,-4
|
3c: (38 60 ff fc|fc ff 60 38) li r3,-4
|
||||||
40: 38 60 ff ff li r3,-1
|
40: (38 60 ff ff|ff ff 60 38) li r3,-1
|
||||||
44: 38 60 00 00 li r3,0
|
44: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
48: 80 64 00 04 lwz r3,4\(r4\)
|
48: (80 64 00 04|04 00 64 80) lwz r3,4\(r4\)
|
||||||
4c: 80 60 00 00 lwz r3,0\(0\)
|
4c: (80 60 00 00|00 00 60 80) lwz r3,0\(0\)
|
||||||
4e: R_PPC_ADDR16_LO \.text
|
(4e|4c): R_PPC_ADDR16_LO \.text
|
||||||
Disassembly of section \.data:
|
Disassembly of section \.data:
|
||||||
|
|
||||||
0+0000 <dsym0>:
|
0+0000 <dsym0>:
|
||||||
0: de ad be ef stfdu f21,-16657\(r13\)
|
0: (de ad be ef|ef be ad de) stfdu f21,-16657\(r13\)
|
||||||
|
|
||||||
0+0004 <dsym1>:
|
0+0004 <dsym1>:
|
||||||
4: ca fe ba be lfd f23,-17730\(r30\)
|
4: (ca fe ba be|be ba fe ca) lfd f23,-17730\(r30\)
|
||||||
|
|
||||||
0+0008 <datpt>:
|
0+0008 <datpt>:
|
||||||
8: 00 98 96 80 \.long 0x989680
|
8: (00 98 96 80|80 96 98 00) \.long 0x989680
|
||||||
8: R_PPC_REL32 jk\+0x989680
|
8: R_PPC_REL32 jk\+0x989680
|
||||||
|
|
||||||
0+000c <dat0>:
|
0+000c <dat0>:
|
||||||
c: ff ff ff fc fnmsub f31,f31,f31,f31
|
c: (ff ff ff fc|fc ff ff ff) fnmsub f31,f31,f31,f31
|
||||||
c: R_PPC_REL32 jk-0x4
|
c: R_PPC_REL32 jk-0x4
|
||||||
|
|
||||||
0+0010 <dat1>:
|
0+0010 <dat1>:
|
||||||
10: 00 00 00 00 \.long 0x0
|
10: (00 00 00 00|00 00 00 00) \.long 0x0
|
||||||
10: R_PPC_REL32 jk
|
10: R_PPC_REL32 jk
|
||||||
|
|
||||||
0+0014 <dat2>:
|
0+0014 <dat2>:
|
||||||
14: 00 00 00 04 \.long 0x4
|
14: (00 00 00 04|04 00 00 00) \.long 0x4
|
||||||
14: R_PPC_REL32 jk\+0x4
|
14: R_PPC_REL32 jk\+0x4
|
||||||
|
|||||||
@ -1,7 +1,7 @@
|
|||||||
#objdump: -Drx
|
#objdump: -Drx
|
||||||
#name: PowerPC Test 1, 64 bit elf
|
#name: PowerPC Test 1, 64 bit elf
|
||||||
|
|
||||||
.*: +file format elf64-powerpc
|
.*
|
||||||
.*
|
.*
|
||||||
architecture: powerpc:common64, flags 0x00000011:
|
architecture: powerpc:common64, flags 0x00000011:
|
||||||
HAS_RELOC, HAS_SYMS
|
HAS_RELOC, HAS_SYMS
|
||||||
@ -40,112 +40,110 @@ SYMBOL TABLE:
|
|||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0000000000000000 <\.text>:
|
0000000000000000 <\.text>:
|
||||||
0: e8 63 00 00 ld r3,0\(r3\)
|
0: (e8 63 00 00|00 00 63 e8) ld r3,0\(r3\)
|
||||||
2: R_PPC64_ADDR16_LO_DS \.data
|
(2|0): R_PPC64_ADDR16_LO_DS \.data
|
||||||
4: e8 63 00 08 ld r3,8\(r3\)
|
4: (e8 63 00 0.|0. 00 63 e8) ld r3,.\(r3\)
|
||||||
6: R_PPC64_ADDR16_LO_DS \.data\+0x8
|
(6|4): R_PPC64_ADDR16_LO_DS \.data\+0x8
|
||||||
8: e8 63 00 08 ld r3,8\(r3\)
|
8: (e8 63 00 0.|0. 00 63 e8) ld r3,.\(r3\)
|
||||||
a: R_PPC64_ADDR16_LO_DS \.data\+0x8
|
(a|8): R_PPC64_ADDR16_LO_DS \.data\+0x8
|
||||||
c: e8 63 00 10 ld r3,16\(r3\)
|
c: (e8 63 00 .0|.0 00 63 e8) ld r3,.*\(r3\)
|
||||||
e: R_PPC64_ADDR16_LO_DS \.data\+0x10
|
(e|c): R_PPC64_ADDR16_LO_DS \.data\+0x10
|
||||||
10: e8 63 00 00 ld r3,0\(r3\)
|
10: (e8 63 00 00|00 00 63 e8) ld r3,0\(r3\)
|
||||||
12: R_PPC64_ADDR16_LO_DS esym0
|
1(0|2): R_PPC64_ADDR16_LO_DS esym0
|
||||||
14: e8 63 00 00 ld r3,0\(r3\)
|
14: (e8 63 00 00|00 00 63 e8) ld r3,0\(r3\)
|
||||||
16: R_PPC64_ADDR16_LO_DS esym1
|
1(6|4): R_PPC64_ADDR16_LO_DS esym1
|
||||||
18: e8 62 00 00 ld r3,0\(r2\)
|
18: (e8 62 00 00|00 00 62 e8) ld r3,0\(r2\)
|
||||||
1a: R_PPC64_TOC16_DS \.toc
|
1(a|8): R_PPC64_TOC16_DS \.toc
|
||||||
1c: e8 62 00 08 ld r3,8\(r2\)
|
1c: (e8 62 00 0.|0. 00 62 e8) ld r3,.\(r2\)
|
||||||
1e: R_PPC64_TOC16_DS \.toc\+0x8
|
1(e|c): R_PPC64_TOC16_DS \.toc\+0x8
|
||||||
20: e8 62 00 10 ld r3,16\(r2\)
|
20: (e8 62 00 .0|.0 00 62 e8) ld r3,.*\(r2\)
|
||||||
22: R_PPC64_TOC16_DS \.toc\+0x10
|
2(2|0): R_PPC64_TOC16_DS \.toc\+0x10
|
||||||
24: e8 62 00 18 ld r3,24\(r2\)
|
24: (e8 62 00 ..|.. 00 62 e8) ld r3,.*\(r2\)
|
||||||
26: R_PPC64_TOC16_DS \.toc\+0x18
|
2(6|4): R_PPC64_TOC16_DS \.toc\+0x18
|
||||||
28: e8 62 00 20 ld r3,32\(r2\)
|
28: (e8 62 00 .0|.0 00 62 e8) ld r3,.*\(r2\)
|
||||||
2a: R_PPC64_TOC16_DS \.toc\+0x20
|
2(a|8): R_PPC64_TOC16_DS \.toc\+0x20
|
||||||
2c: e8 62 00 28 ld r3,40\(r2\)
|
2c: (e8 62 00 ..|.. 00 62 e8) ld r3,.*\(r2\)
|
||||||
2e: R_PPC64_TOC16_DS \.toc\+0x28
|
2(e|c): R_PPC64_TOC16_DS \.toc\+0x28
|
||||||
30: 3c 80 00 28 lis r4,40
|
30: (3c 80 00 ..|.. 00 80 3c) lis r4,.*
|
||||||
32: R_PPC64_TOC16_HA \.toc\+0x28
|
3(2|0): R_PPC64_TOC16_HA \.toc\+0x28
|
||||||
34: e8 62 00 28 ld r3,40\(r2\)
|
34: (e8 62 00 ..|.. 00 62 e8) ld r3,.*\(r2\)
|
||||||
36: R_PPC64_TOC16_LO_DS \.toc\+0x28
|
3(6|4): R_PPC64_TOC16_LO_DS \.toc\+0x28
|
||||||
38: 38 60 00 08 li r3,8
|
38: (38 60 00 08|08 00 60 38) li r3,8
|
||||||
3c: 38 60 ff f8 li r3,-8
|
3c: (38 60 ff f8|f8 ff 60 38) li r3,-8
|
||||||
40: 38 60 00 08 li r3,8
|
40: (38 60 00 08|08 00 60 38) li r3,8
|
||||||
44: 38 60 ff f8 li r3,-8
|
44: (38 60 ff f8|f8 ff 60 38) li r3,-8
|
||||||
48: 38 60 ff f8 li r3,-8
|
48: (38 60 ff f8|f8 ff 60 38) li r3,-8
|
||||||
4c: 38 60 00 08 li r3,8
|
4c: (38 60 00 08|08 00 60 38) li r3,8
|
||||||
50: 38 60 00 00 li r3,0
|
50: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
52: R_PPC64_ADDR16_LO \.data
|
5(2|0): R_PPC64_ADDR16_LO \.data
|
||||||
54: 38 60 00 00 li r3,0
|
54: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
56: R_PPC64_ADDR16_HI \.data
|
5(6|4): R_PPC64_ADDR16_HI \.data
|
||||||
58: 38 60 00 00 li r3,0
|
58: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
5a: R_PPC64_ADDR16_HA \.data
|
5(a|8): R_PPC64_ADDR16_HA \.data
|
||||||
5c: 38 60 00 00 li r3,0
|
5c: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
5e: R_PPC64_ADDR16_HIGHER \.data
|
5(e|c): R_PPC64_ADDR16_HIGHER \.data
|
||||||
60: 38 60 00 00 li r3,0
|
60: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
62: R_PPC64_ADDR16_HIGHERA \.data
|
6(2|0): R_PPC64_ADDR16_HIGHERA \.data
|
||||||
64: 38 60 00 00 li r3,0
|
64: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
66: R_PPC64_ADDR16_HIGHEST \.data
|
6(6|4): R_PPC64_ADDR16_HIGHEST \.data
|
||||||
68: 38 60 00 00 li r3,0
|
68: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
6a: R_PPC64_ADDR16_HIGHESTA \.data
|
6(a|8): R_PPC64_ADDR16_HIGHESTA \.data
|
||||||
6c: 38 60 ff f8 li r3,-8
|
6c: (38 60 ff f8|f8 ff 60 38) li r3,-8
|
||||||
70: 38 60 ff ff li r3,-1
|
70: (38 60 ff ff|ff ff 60 38) li r3,-1
|
||||||
74: 38 60 00 00 li r3,0
|
74: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
78: 38 60 ff ff li r3,-1
|
78: (38 60 ff ff|ff ff 60 38) li r3,-1
|
||||||
7c: 38 60 00 00 li r3,0
|
7c: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
80: 38 60 ff ff li r3,-1
|
80: (38 60 ff ff|ff ff 60 38) li r3,-1
|
||||||
84: 38 60 00 00 li r3,0
|
84: (38 60 00 00|00 00 60 38) li r3,0
|
||||||
88: e8 64 00 08 ld r3,8\(r4\)
|
88: (e8 64 00 08|08 00 64 e8) ld r3,8\(r4\)
|
||||||
8c: e8 60 00 00 ld r3,0\(0\)
|
8c: (e8 60 00 00|00 00 60 e8) ld r3,0\(0\)
|
||||||
8e: R_PPC64_ADDR16_LO_DS \.text
|
8(e|c): R_PPC64_ADDR16_LO_DS \.text
|
||||||
Disassembly of section \.data:
|
Disassembly of section \.data:
|
||||||
|
|
||||||
0000000000000000 <dsym0>:
|
0000000000000000 <dsym0>:
|
||||||
0: 00 00 00 00 \.long 0x0
|
0: (00 00 00 00|ef be ad de) .*
|
||||||
4: de ad be ef stfdu f21,-16657\(r13\)
|
4: (de ad be ef|00 00 00 00) .*
|
||||||
|
|
||||||
0000000000000008 <dsym1>:
|
0000000000000008 <dsym1>:
|
||||||
8: 00 00 00 00 \.long 0x0
|
8: (00 00 00 00|be ba fe ca) .*
|
||||||
c: ca fe ba be lfd f23,-17730\(r30\)
|
c: (ca fe ba be|00 00 00 00) .*
|
||||||
|
|
||||||
0000000000000010 <datpt>:
|
0000000000000010 <datpt>:
|
||||||
10: 00 98 96 80 \.long 0x989680
|
10: (00 98 96 80|80 96 98 00) .*
|
||||||
10: R_PPC64_REL32 jk\+0x989680
|
10: R_PPC64_REL32 jk\+0x989680
|
||||||
|
|
||||||
0000000000000014 <dat0>:
|
0000000000000014 <dat0>:
|
||||||
14: ff ff ff fc fnmsub f31,f31,f31,f31
|
14: (ff ff ff fc|fc ff ff ff) .*
|
||||||
14: R_PPC64_REL32 jk-0x4
|
14: R_PPC64_REL32 jk-0x4
|
||||||
|
|
||||||
0000000000000018 <dat1>:
|
0000000000000018 <dat1>:
|
||||||
18: 00 00 00 00 \.long 0x0
|
18: 00 00 00 00 .*
|
||||||
18: R_PPC64_REL32 jk
|
18: R_PPC64_REL32 jk
|
||||||
|
|
||||||
000000000000001c <dat2>:
|
000000000000001c <dat2>:
|
||||||
1c: 00 00 00 04 \.long 0x4
|
1c: (00 00 00 04|04 00 00 00) .*
|
||||||
1c: R_PPC64_REL32 jk\+0x4
|
1c: R_PPC64_REL32 jk\+0x4
|
||||||
|
|
||||||
0000000000000020 <dat3>:
|
0000000000000020 <dat3>:
|
||||||
20: 00 00 00 00 \.long 0x0
|
20: (00 00 00 00|08 00 00 00) .*
|
||||||
20: R_PPC64_REL64 jk\+0x8
|
20: R_PPC64_REL64 jk\+0x8
|
||||||
24: 00 00 00 08 \.long 0x8
|
24: (00 00 00 08|00 00 00 00) .*
|
||||||
|
|
||||||
0000000000000028 <dat4>:
|
0000000000000028 <dat4>:
|
||||||
28: 00 00 00 00 \.long 0x0
|
28: (00 00 00 00|10 00 00 00) .*
|
||||||
28: R_PPC64_REL64 jk\+0x10
|
28: R_PPC64_REL64 jk\+0x10
|
||||||
2c: 00 00 00 10 \.long 0x10
|
2c: (00 00 00 10|00 00 00 00) .*
|
||||||
Disassembly of section \.toc:
|
Disassembly of section \.toc:
|
||||||
|
|
||||||
0000000000000000 <\.toc>:
|
0000000000000000 <\.toc>:
|
||||||
\.\.\.
|
#...
|
||||||
0: R_PPC64_ADDR64 \.data
|
0: R_PPC64_ADDR64 \.data
|
||||||
|
#...
|
||||||
8: R_PPC64_ADDR64 \.data\+0x8
|
8: R_PPC64_ADDR64 \.data\+0x8
|
||||||
c: 00 00 00 08 \.long 0x8
|
#...
|
||||||
10: 00 00 00 00 \.long 0x0
|
|
||||||
10: R_PPC64_ADDR64 \.data\+0x8
|
10: R_PPC64_ADDR64 \.data\+0x8
|
||||||
14: 00 00 00 08 \.long 0x8
|
#...
|
||||||
18: 00 00 00 00 \.long 0x0
|
|
||||||
18: R_PPC64_ADDR64 \.data\+0x10
|
18: R_PPC64_ADDR64 \.data\+0x10
|
||||||
1c: 00 00 00 10 \.long 0x10
|
#...
|
||||||
\.\.\.
|
|
||||||
20: R_PPC64_ADDR64 esym0
|
20: R_PPC64_ADDR64 esym0
|
||||||
28: R_PPC64_ADDR64 esym1
|
28: R_PPC64_ADDR64 esym1
|
||||||
|
|||||||
@ -2,266 +2,266 @@
|
|||||||
#objdump: -dr -Mtitan
|
#objdump: -dr -Mtitan
|
||||||
#name: AppliedMicro Titan tests
|
#name: AppliedMicro Titan tests
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+0000000 <start>:
|
0+0000000 <start>:
|
||||||
0: 4e 80 00 20 blr
|
0: (4e 80 00 20|20 00 80 4e) blr
|
||||||
4: 0c 81 00 00 tweqi r1,0
|
4: (0c 81 00 00|00 00 81 0c) tweqi r1,0
|
||||||
8: 10 41 01 58 macchw r2,r1,r0
|
8: (10 41 01 58|58 01 41 10) macchw r2,r1,r0
|
||||||
c: 10 41 01 59 macchw\. r2,r1,r0
|
c: (10 41 01 59|59 01 41 10) macchw\. r2,r1,r0
|
||||||
10: 10 41 05 58 macchwo r2,r1,r0
|
10: (10 41 05 58|58 05 41 10) macchwo r2,r1,r0
|
||||||
14: 10 41 05 59 macchwo\. r2,r1,r0
|
14: (10 41 05 59|59 05 41 10) macchwo\. r2,r1,r0
|
||||||
18: 10 41 01 d8 macchws r2,r1,r0
|
18: (10 41 01 d8|d8 01 41 10) macchws r2,r1,r0
|
||||||
1c: 10 41 01 d9 macchws\. r2,r1,r0
|
1c: (10 41 01 d9|d9 01 41 10) macchws\. r2,r1,r0
|
||||||
20: 10 41 05 d8 macchwso r2,r1,r0
|
20: (10 41 05 d8|d8 05 41 10) macchwso r2,r1,r0
|
||||||
24: 10 41 05 d9 macchwso\. r2,r1,r0
|
24: (10 41 05 d9|d9 05 41 10) macchwso\. r2,r1,r0
|
||||||
28: 10 41 01 98 macchwsu r2,r1,r0
|
28: (10 41 01 98|98 01 41 10) macchwsu r2,r1,r0
|
||||||
2c: 10 41 01 99 macchwsu\. r2,r1,r0
|
2c: (10 41 01 99|99 01 41 10) macchwsu\. r2,r1,r0
|
||||||
30: 10 41 05 98 macchwsuo r2,r1,r0
|
30: (10 41 05 98|98 05 41 10) macchwsuo r2,r1,r0
|
||||||
34: 10 41 05 99 macchwsuo\. r2,r1,r0
|
34: (10 41 05 99|99 05 41 10) macchwsuo\. r2,r1,r0
|
||||||
38: 10 41 01 18 macchwu r2,r1,r0
|
38: (10 41 01 18|18 01 41 10) macchwu r2,r1,r0
|
||||||
3c: 10 41 01 19 macchwu\. r2,r1,r0
|
3c: (10 41 01 19|19 01 41 10) macchwu\. r2,r1,r0
|
||||||
40: 10 41 05 18 macchwuo r2,r1,r0
|
40: (10 41 05 18|18 05 41 10) macchwuo r2,r1,r0
|
||||||
44: 10 41 05 19 macchwuo\. r2,r1,r0
|
44: (10 41 05 19|19 05 41 10) macchwuo\. r2,r1,r0
|
||||||
48: 10 41 00 58 machhw r2,r1,r0
|
48: (10 41 00 58|58 00 41 10) machhw r2,r1,r0
|
||||||
4c: 10 41 00 59 machhw\. r2,r1,r0
|
4c: (10 41 00 59|59 00 41 10) machhw\. r2,r1,r0
|
||||||
50: 10 41 04 58 machhwo r2,r1,r0
|
50: (10 41 04 58|58 04 41 10) machhwo r2,r1,r0
|
||||||
54: 10 41 04 59 machhwo\. r2,r1,r0
|
54: (10 41 04 59|59 04 41 10) machhwo\. r2,r1,r0
|
||||||
58: 10 41 00 d8 machhws r2,r1,r0
|
58: (10 41 00 d8|d8 00 41 10) machhws r2,r1,r0
|
||||||
5c: 10 41 00 d9 machhws\. r2,r1,r0
|
5c: (10 41 00 d9|d9 00 41 10) machhws\. r2,r1,r0
|
||||||
60: 10 41 04 d8 machhwso r2,r1,r0
|
60: (10 41 04 d8|d8 04 41 10) machhwso r2,r1,r0
|
||||||
64: 10 41 04 d9 machhwso\. r2,r1,r0
|
64: (10 41 04 d9|d9 04 41 10) machhwso\. r2,r1,r0
|
||||||
68: 10 41 00 98 machhwsu r2,r1,r0
|
68: (10 41 00 98|98 00 41 10) machhwsu r2,r1,r0
|
||||||
6c: 10 41 00 99 machhwsu\. r2,r1,r0
|
6c: (10 41 00 99|99 00 41 10) machhwsu\. r2,r1,r0
|
||||||
70: 10 41 04 98 machhwsuo r2,r1,r0
|
70: (10 41 04 98|98 04 41 10) machhwsuo r2,r1,r0
|
||||||
74: 10 41 04 99 machhwsuo\. r2,r1,r0
|
74: (10 41 04 99|99 04 41 10) machhwsuo\. r2,r1,r0
|
||||||
78: 10 41 00 18 machhwu r2,r1,r0
|
78: (10 41 00 18|18 00 41 10) machhwu r2,r1,r0
|
||||||
7c: 10 41 00 19 machhwu\. r2,r1,r0
|
7c: (10 41 00 19|19 00 41 10) machhwu\. r2,r1,r0
|
||||||
80: 10 41 04 18 machhwuo r2,r1,r0
|
80: (10 41 04 18|18 04 41 10) machhwuo r2,r1,r0
|
||||||
84: 10 41 04 19 machhwuo\. r2,r1,r0
|
84: (10 41 04 19|19 04 41 10) machhwuo\. r2,r1,r0
|
||||||
88: 10 41 03 58 maclhw r2,r1,r0
|
88: (10 41 03 58|58 03 41 10) maclhw r2,r1,r0
|
||||||
8c: 10 41 03 59 maclhw\. r2,r1,r0
|
8c: (10 41 03 59|59 03 41 10) maclhw\. r2,r1,r0
|
||||||
90: 10 41 07 58 maclhwo r2,r1,r0
|
90: (10 41 07 58|58 07 41 10) maclhwo r2,r1,r0
|
||||||
94: 10 41 07 59 maclhwo\. r2,r1,r0
|
94: (10 41 07 59|59 07 41 10) maclhwo\. r2,r1,r0
|
||||||
98: 10 41 03 d8 maclhws r2,r1,r0
|
98: (10 41 03 d8|d8 03 41 10) maclhws r2,r1,r0
|
||||||
9c: 10 41 03 d9 maclhws\. r2,r1,r0
|
9c: (10 41 03 d9|d9 03 41 10) maclhws\. r2,r1,r0
|
||||||
a0: 10 41 07 d8 maclhwso r2,r1,r0
|
a0: (10 41 07 d8|d8 07 41 10) maclhwso r2,r1,r0
|
||||||
a4: 10 41 07 d9 maclhwso\. r2,r1,r0
|
a4: (10 41 07 d9|d9 07 41 10) maclhwso\. r2,r1,r0
|
||||||
a8: 10 41 03 98 maclhwsu r2,r1,r0
|
a8: (10 41 03 98|98 03 41 10) maclhwsu r2,r1,r0
|
||||||
ac: 10 41 03 99 maclhwsu\. r2,r1,r0
|
ac: (10 41 03 99|99 03 41 10) maclhwsu\. r2,r1,r0
|
||||||
b0: 10 41 07 98 maclhwsuo r2,r1,r0
|
b0: (10 41 07 98|98 07 41 10) maclhwsuo r2,r1,r0
|
||||||
b4: 10 41 07 99 maclhwsuo\. r2,r1,r0
|
b4: (10 41 07 99|99 07 41 10) maclhwsuo\. r2,r1,r0
|
||||||
b8: 10 41 03 18 maclhwu r2,r1,r0
|
b8: (10 41 03 18|18 03 41 10) maclhwu r2,r1,r0
|
||||||
bc: 10 41 03 19 maclhwu\. r2,r1,r0
|
bc: (10 41 03 19|19 03 41 10) maclhwu\. r2,r1,r0
|
||||||
c0: 10 41 07 18 maclhwuo r2,r1,r0
|
c0: (10 41 07 18|18 07 41 10) maclhwuo r2,r1,r0
|
||||||
c4: 10 41 07 19 maclhwuo\. r2,r1,r0
|
c4: (10 41 07 19|19 07 41 10) maclhwuo\. r2,r1,r0
|
||||||
c8: 10 41 01 5c nmacchw r2,r1,r0
|
c8: (10 41 01 5c|5c 01 41 10) nmacchw r2,r1,r0
|
||||||
cc: 10 41 01 5d nmacchw\. r2,r1,r0
|
cc: (10 41 01 5d|5d 01 41 10) nmacchw\. r2,r1,r0
|
||||||
d0: 10 41 05 5c nmacchwo r2,r1,r0
|
d0: (10 41 05 5c|5c 05 41 10) nmacchwo r2,r1,r0
|
||||||
d4: 10 41 05 5d nmacchwo\. r2,r1,r0
|
d4: (10 41 05 5d|5d 05 41 10) nmacchwo\. r2,r1,r0
|
||||||
d8: 10 41 01 dc nmacchws r2,r1,r0
|
d8: (10 41 01 dc|dc 01 41 10) nmacchws r2,r1,r0
|
||||||
dc: 10 41 01 dd nmacchws\. r2,r1,r0
|
dc: (10 41 01 dd|dd 01 41 10) nmacchws\. r2,r1,r0
|
||||||
e0: 10 41 05 dc nmacchwso r2,r1,r0
|
e0: (10 41 05 dc|dc 05 41 10) nmacchwso r2,r1,r0
|
||||||
e4: 10 41 05 dd nmacchwso\. r2,r1,r0
|
e4: (10 41 05 dd|dd 05 41 10) nmacchwso\. r2,r1,r0
|
||||||
e8: 10 41 00 5c nmachhw r2,r1,r0
|
e8: (10 41 00 5c|5c 00 41 10) nmachhw r2,r1,r0
|
||||||
ec: 10 41 00 5d nmachhw\. r2,r1,r0
|
ec: (10 41 00 5d|5d 00 41 10) nmachhw\. r2,r1,r0
|
||||||
f0: 10 41 04 5c nmachhwo r2,r1,r0
|
f0: (10 41 04 5c|5c 04 41 10) nmachhwo r2,r1,r0
|
||||||
f4: 10 41 04 5d nmachhwo\. r2,r1,r0
|
f4: (10 41 04 5d|5d 04 41 10) nmachhwo\. r2,r1,r0
|
||||||
f8: 10 41 00 dc nmachhws r2,r1,r0
|
f8: (10 41 00 dc|dc 00 41 10) nmachhws r2,r1,r0
|
||||||
fc: 10 41 00 dd nmachhws\. r2,r1,r0
|
fc: (10 41 00 dd|dd 00 41 10) nmachhws\. r2,r1,r0
|
||||||
100: 10 41 04 dc nmachhwso r2,r1,r0
|
100: (10 41 04 dc|dc 04 41 10) nmachhwso r2,r1,r0
|
||||||
104: 10 41 04 dd nmachhwso\. r2,r1,r0
|
104: (10 41 04 dd|dd 04 41 10) nmachhwso\. r2,r1,r0
|
||||||
108: 10 41 03 5c nmaclhw r2,r1,r0
|
108: (10 41 03 5c|5c 03 41 10) nmaclhw r2,r1,r0
|
||||||
10c: 10 41 03 5d nmaclhw\. r2,r1,r0
|
10c: (10 41 03 5d|5d 03 41 10) nmaclhw\. r2,r1,r0
|
||||||
110: 10 41 07 5c nmaclhwo r2,r1,r0
|
110: (10 41 07 5c|5c 07 41 10) nmaclhwo r2,r1,r0
|
||||||
114: 10 41 07 5d nmaclhwo\. r2,r1,r0
|
114: (10 41 07 5d|5d 07 41 10) nmaclhwo\. r2,r1,r0
|
||||||
118: 10 41 03 dc nmaclhws r2,r1,r0
|
118: (10 41 03 dc|dc 03 41 10) nmaclhws r2,r1,r0
|
||||||
11c: 10 41 03 dd nmaclhws\. r2,r1,r0
|
11c: (10 41 03 dd|dd 03 41 10) nmaclhws\. r2,r1,r0
|
||||||
120: 10 41 07 dc nmaclhwso r2,r1,r0
|
120: (10 41 07 dc|dc 07 41 10) nmaclhwso r2,r1,r0
|
||||||
124: 10 41 07 dd nmaclhwso\. r2,r1,r0
|
124: (10 41 07 dd|dd 07 41 10) nmaclhwso\. r2,r1,r0
|
||||||
128: 10 41 01 50 mulchw r2,r1,r0
|
128: (10 41 01 50|50 01 41 10) mulchw r2,r1,r0
|
||||||
12c: 10 41 01 51 mulchw\. r2,r1,r0
|
12c: (10 41 01 51|51 01 41 10) mulchw\. r2,r1,r0
|
||||||
130: 10 41 01 10 mulchwu r2,r1,r0
|
130: (10 41 01 10|10 01 41 10) mulchwu r2,r1,r0
|
||||||
134: 10 41 01 11 mulchwu\. r2,r1,r0
|
134: (10 41 01 11|11 01 41 10) mulchwu\. r2,r1,r0
|
||||||
138: 10 41 00 50 mulhhw r2,r1,r0
|
138: (10 41 00 50|50 00 41 10) mulhhw r2,r1,r0
|
||||||
13c: 10 41 00 51 mulhhw\. r2,r1,r0
|
13c: (10 41 00 51|51 00 41 10) mulhhw\. r2,r1,r0
|
||||||
140: 10 41 00 10 mulhhwu r2,r1,r0
|
140: (10 41 00 10|10 00 41 10) mulhhwu r2,r1,r0
|
||||||
144: 10 41 00 11 mulhhwu\. r2,r1,r0
|
144: (10 41 00 11|11 00 41 10) mulhhwu\. r2,r1,r0
|
||||||
148: 10 41 03 50 mullhw r2,r1,r0
|
148: (10 41 03 50|50 03 41 10) mullhw r2,r1,r0
|
||||||
14c: 10 41 03 51 mullhw\. r2,r1,r0
|
14c: (10 41 03 51|51 03 41 10) mullhw\. r2,r1,r0
|
||||||
150: 10 41 03 10 mullhwu r2,r1,r0
|
150: (10 41 03 10|10 03 41 10) mullhwu r2,r1,r0
|
||||||
154: 10 41 03 11 mullhwu\. r2,r1,r0
|
154: (10 41 03 11|11 03 41 10) mullhwu\. r2,r1,r0
|
||||||
158: 7c 22 00 9c dlmzb r2,r1,r0
|
158: (7c 22 00 9c|9c 00 22 7c) dlmzb r2,r1,r0
|
||||||
15c: 7c 22 00 9d dlmzb\. r2,r1,r0
|
15c: (7c 22 00 9d|9d 00 22 7c) dlmzb\. r2,r1,r0
|
||||||
160: 7c 02 0b 8c dccci r2,r1
|
160: (7c 02 0b 8c|8c 0b 02 7c) dccci r2,r1
|
||||||
164: 7c 02 0f 8c iccci r2,r1
|
164: (7c 02 0f 8c|8c 0f 02 7c) iccci r2,r1
|
||||||
168: 7c 02 0b 0c dcblc r2,r1
|
168: (7c 02 0b 0c|0c 0b 02 7c) dcblc r2,r1
|
||||||
16c: 7c 02 0b 0c dcblc r2,r1
|
16c: (7c 02 0b 0c|0c 0b 02 7c) dcblc r2,r1
|
||||||
170: 7c 22 0b 0c dcblc 1,r2,r1
|
170: (7c 22 0b 0c|0c 0b 22 7c) dcblc 1,r2,r1
|
||||||
174: 7c 02 09 4c dcbtls r2,r1
|
174: (7c 02 09 4c|4c 09 02 7c) dcbtls r2,r1
|
||||||
178: 7c 02 09 4c dcbtls r2,r1
|
178: (7c 02 09 4c|4c 09 02 7c) dcbtls r2,r1
|
||||||
17c: 7c 22 09 4c dcbtls 1,r2,r1
|
17c: (7c 22 09 4c|4c 09 22 7c) dcbtls 1,r2,r1
|
||||||
180: 7c 02 09 0c dcbtstls r2,r1
|
180: (7c 02 09 0c|0c 09 02 7c) dcbtstls r2,r1
|
||||||
184: 7c 02 09 0c dcbtstls r2,r1
|
184: (7c 02 09 0c|0c 09 02 7c) dcbtstls r2,r1
|
||||||
188: 7c 22 09 0c dcbtstls 1,r2,r1
|
188: (7c 22 09 0c|0c 09 22 7c) dcbtstls 1,r2,r1
|
||||||
18c: 7c 02 09 cc icblc r2,r1
|
18c: (7c 02 09 cc|cc 09 02 7c) icblc r2,r1
|
||||||
190: 7c 02 09 cc icblc r2,r1
|
190: (7c 02 09 cc|cc 09 02 7c) icblc r2,r1
|
||||||
194: 7c 22 09 cc icblc 1,r2,r1
|
194: (7c 22 09 cc|cc 09 22 7c) icblc 1,r2,r1
|
||||||
198: 7c 02 0b cc icbtls r2,r1
|
198: (7c 02 0b cc|cc 0b 02 7c) icbtls r2,r1
|
||||||
19c: 7c 02 0b cc icbtls r2,r1
|
19c: (7c 02 0b cc|cc 0b 02 7c) icbtls r2,r1
|
||||||
1a0: 7c 22 0b cc icbtls 1,r2,r1
|
1a0: (7c 22 0b cc|cc 0b 22 7c) icbtls 1,r2,r1
|
||||||
1a4: 7c 41 02 8c dcread r2,r1,r0
|
1a4: (7c 41 02 8c|8c 02 41 7c) dcread r2,r1,r0
|
||||||
1a8: 7c 02 0f cc icread r2,r1
|
1a8: (7c 02 0f cc|cc 0f 02 7c) icread r2,r1
|
||||||
1ac: 7c 41 02 9c mfpmr r2,1
|
1ac: (7c 41 02 9c|9c 02 41 7c) mfpmr r2,1
|
||||||
1b0: 7c 22 02 9c mfpmr r1,2
|
1b0: (7c 22 02 9c|9c 02 22 7c) mfpmr r1,2
|
||||||
1b4: 7c 81 02 a6 mfxer r4
|
1b4: (7c 81 02 a6|a6 02 81 7c) mfxer r4
|
||||||
1b8: 7c 81 02 a6 mfxer r4
|
1b8: (7c 81 02 a6|a6 02 81 7c) mfxer r4
|
||||||
1bc: 7c 88 02 a6 mflr r4
|
1bc: (7c 88 02 a6|a6 02 88 7c) mflr r4
|
||||||
1c0: 7c 88 02 a6 mflr r4
|
1c0: (7c 88 02 a6|a6 02 88 7c) mflr r4
|
||||||
1c4: 7c 89 02 a6 mfctr r4
|
1c4: (7c 89 02 a6|a6 02 89 7c) mfctr r4
|
||||||
1c8: 7c 89 02 a6 mfctr r4
|
1c8: (7c 89 02 a6|a6 02 89 7c) mfctr r4
|
||||||
1cc: 7c 96 02 a6 mfdec r4
|
1cc: (7c 96 02 a6|a6 02 96 7c) mfdec r4
|
||||||
1d0: 7c 96 02 a6 mfdec r4
|
1d0: (7c 96 02 a6|a6 02 96 7c) mfdec r4
|
||||||
1d4: 7c 9a 02 a6 mfsrr0 r4
|
1d4: (7c 9a 02 a6|a6 02 9a 7c) mfsrr0 r4
|
||||||
1d8: 7c 9a 02 a6 mfsrr0 r4
|
1d8: (7c 9a 02 a6|a6 02 9a 7c) mfsrr0 r4
|
||||||
1dc: 7c 9b 02 a6 mfsrr1 r4
|
1dc: (7c 9b 02 a6|a6 02 9b 7c) mfsrr1 r4
|
||||||
1e0: 7c 9b 02 a6 mfsrr1 r4
|
1e0: (7c 9b 02 a6|a6 02 9b 7c) mfsrr1 r4
|
||||||
1e4: 7c 90 0a a6 mfpid r4
|
1e4: (7c 90 0a a6|a6 0a 90 7c) mfpid r4
|
||||||
1e8: 7c 90 0a a6 mfpid r4
|
1e8: (7c 90 0a a6|a6 0a 90 7c) mfpid r4
|
||||||
1ec: 7c 9a 0a a6 mfcsrr0 r4
|
1ec: (7c 9a 0a a6|a6 0a 9a 7c) mfcsrr0 r4
|
||||||
1f0: 7c 9a 0a a6 mfcsrr0 r4
|
1f0: (7c 9a 0a a6|a6 0a 9a 7c) mfcsrr0 r4
|
||||||
1f4: 7c 9b 0a a6 mfcsrr1 r4
|
1f4: (7c 9b 0a a6|a6 0a 9b 7c) mfcsrr1 r4
|
||||||
1f8: 7c 9b 0a a6 mfcsrr1 r4
|
1f8: (7c 9b 0a a6|a6 0a 9b 7c) mfcsrr1 r4
|
||||||
1fc: 7c 9d 0a a6 mfdear r4
|
1fc: (7c 9d 0a a6|a6 0a 9d 7c) mfdear r4
|
||||||
200: 7c 9d 0a a6 mfdear r4
|
200: (7c 9d 0a a6|a6 0a 9d 7c) mfdear r4
|
||||||
204: 7c 9e 0a a6 mfesr r4
|
204: (7c 9e 0a a6|a6 0a 9e 7c) mfesr r4
|
||||||
208: 7c 9e 0a a6 mfesr r4
|
208: (7c 9e 0a a6|a6 0a 9e 7c) mfesr r4
|
||||||
20c: 7c 9f 0a a6 mfivpr r4
|
20c: (7c 9f 0a a6|a6 0a 9f 7c) mfivpr r4
|
||||||
210: 7c 9f 0a a6 mfivpr r4
|
210: (7c 9f 0a a6|a6 0a 9f 7c) mfivpr r4
|
||||||
214: 7c 80 42 a6 mfusprg0 r4
|
214: (7c 80 42 a6|a6 42 80 7c) mfusprg0 r4
|
||||||
218: 7c 80 42 a6 mfusprg0 r4
|
218: (7c 80 42 a6|a6 42 80 7c) mfusprg0 r4
|
||||||
21c: 7c 84 42 a6 mfsprg r4,4
|
21c: (7c 84 42 a6|a6 42 84 7c) mfsprg r4,4
|
||||||
220: 7c 84 42 a6 mfsprg r4,4
|
220: (7c 84 42 a6|a6 42 84 7c) mfsprg r4,4
|
||||||
224: 7c 85 42 a6 mfsprg r4,5
|
224: (7c 85 42 a6|a6 42 85 7c) mfsprg r4,5
|
||||||
228: 7c 85 42 a6 mfsprg r4,5
|
228: (7c 85 42 a6|a6 42 85 7c) mfsprg r4,5
|
||||||
22c: 7c 86 42 a6 mfsprg r4,6
|
22c: (7c 86 42 a6|a6 42 86 7c) mfsprg r4,6
|
||||||
230: 7c 86 42 a6 mfsprg r4,6
|
230: (7c 86 42 a6|a6 42 86 7c) mfsprg r4,6
|
||||||
234: 7c 87 42 a6 mfsprg r4,7
|
234: (7c 87 42 a6|a6 42 87 7c) mfsprg r4,7
|
||||||
238: 7c 87 42 a6 mfsprg r4,7
|
238: (7c 87 42 a6|a6 42 87 7c) mfsprg r4,7
|
||||||
23c: 7c 8c 42 a6 mftb r4
|
23c: (7c 8c 42 a6|a6 42 8c 7c) mftb r4
|
||||||
240: 7c 8c 42 a6 mftb r4
|
240: (7c 8c 42 a6|a6 42 8c 7c) mftb r4
|
||||||
244: 7c 8c 42 a6 mftb r4
|
244: (7c 8c 42 a6|a6 42 8c 7c) mftb r4
|
||||||
248: 7c 8d 42 a6 mftbu r4
|
248: (7c 8d 42 a6|a6 42 8d 7c) mftbu r4
|
||||||
24c: 7c 8d 42 a6 mftbu r4
|
24c: (7c 8d 42 a6|a6 42 8d 7c) mftbu r4
|
||||||
250: 7c 90 42 a6 mfsprg r4,0
|
250: (7c 90 42 a6|a6 42 90 7c) mfsprg r4,0
|
||||||
254: 7c 90 42 a6 mfsprg r4,0
|
254: (7c 90 42 a6|a6 42 90 7c) mfsprg r4,0
|
||||||
258: 7c 91 42 a6 mfsprg r4,1
|
258: (7c 91 42 a6|a6 42 91 7c) mfsprg r4,1
|
||||||
25c: 7c 91 42 a6 mfsprg r4,1
|
25c: (7c 91 42 a6|a6 42 91 7c) mfsprg r4,1
|
||||||
260: 7c 92 42 a6 mfsprg r4,2
|
260: (7c 92 42 a6|a6 42 92 7c) mfsprg r4,2
|
||||||
264: 7c 92 42 a6 mfsprg r4,2
|
264: (7c 92 42 a6|a6 42 92 7c) mfsprg r4,2
|
||||||
268: 7c 93 42 a6 mfsprg r4,3
|
268: (7c 93 42 a6|a6 42 93 7c) mfsprg r4,3
|
||||||
26c: 7c 93 42 a6 mfsprg r4,3
|
26c: (7c 93 42 a6|a6 42 93 7c) mfsprg r4,3
|
||||||
270: 7c 9e 42 a6 mfpir r4
|
270: (7c 9e 42 a6|a6 42 9e 7c) mfpir r4
|
||||||
274: 7c 9e 42 a6 mfpir r4
|
274: (7c 9e 42 a6|a6 42 9e 7c) mfpir r4
|
||||||
278: 7c 9f 42 a6 mfpvr r4
|
278: (7c 9f 42 a6|a6 42 9f 7c) mfpvr r4
|
||||||
27c: 7c 9f 42 a6 mfpvr r4
|
27c: (7c 9f 42 a6|a6 42 9f 7c) mfpvr r4
|
||||||
280: 7c 90 4a a6 mfdbsr r4
|
280: (7c 90 4a a6|a6 4a 90 7c) mfdbsr r4
|
||||||
284: 7c 90 4a a6 mfdbsr r4
|
284: (7c 90 4a a6|a6 4a 90 7c) mfdbsr r4
|
||||||
288: 7c 94 4a a6 mfdbcr0 r4
|
288: (7c 94 4a a6|a6 4a 94 7c) mfdbcr0 r4
|
||||||
28c: 7c 94 4a a6 mfdbcr0 r4
|
28c: (7c 94 4a a6|a6 4a 94 7c) mfdbcr0 r4
|
||||||
290: 7c 95 4a a6 mfdbcr1 r4
|
290: (7c 95 4a a6|a6 4a 95 7c) mfdbcr1 r4
|
||||||
294: 7c 95 4a a6 mfdbcr1 r4
|
294: (7c 95 4a a6|a6 4a 95 7c) mfdbcr1 r4
|
||||||
298: 7c 96 4a a6 mfdbcr2 r4
|
298: (7c 96 4a a6|a6 4a 96 7c) mfdbcr2 r4
|
||||||
29c: 7c 96 4a a6 mfdbcr2 r4
|
29c: (7c 96 4a a6|a6 4a 96 7c) mfdbcr2 r4
|
||||||
2a0: 7c 98 4a a6 mfiac1 r4
|
2a0: (7c 98 4a a6|a6 4a 98 7c) mfiac1 r4
|
||||||
2a4: 7c 98 4a a6 mfiac1 r4
|
2a4: (7c 98 4a a6|a6 4a 98 7c) mfiac1 r4
|
||||||
2a8: 7c 99 4a a6 mfiac2 r4
|
2a8: (7c 99 4a a6|a6 4a 99 7c) mfiac2 r4
|
||||||
2ac: 7c 99 4a a6 mfiac2 r4
|
2ac: (7c 99 4a a6|a6 4a 99 7c) mfiac2 r4
|
||||||
2b0: 7c 9a 4a a6 mfiac3 r4
|
2b0: (7c 9a 4a a6|a6 4a 9a 7c) mfiac3 r4
|
||||||
2b4: 7c 9a 4a a6 mfiac3 r4
|
2b4: (7c 9a 4a a6|a6 4a 9a 7c) mfiac3 r4
|
||||||
2b8: 7c 9b 4a a6 mfiac4 r4
|
2b8: (7c 9b 4a a6|a6 4a 9b 7c) mfiac4 r4
|
||||||
2bc: 7c 9b 4a a6 mfiac4 r4
|
2bc: (7c 9b 4a a6|a6 4a 9b 7c) mfiac4 r4
|
||||||
2c0: 7c 9c 4a a6 mfdac1 r4
|
2c0: (7c 9c 4a a6|a6 4a 9c 7c) mfdac1 r4
|
||||||
2c4: 7c 9c 4a a6 mfdac1 r4
|
2c4: (7c 9c 4a a6|a6 4a 9c 7c) mfdac1 r4
|
||||||
2c8: 7c 9d 4a a6 mfdac2 r4
|
2c8: (7c 9d 4a a6|a6 4a 9d 7c) mfdac2 r4
|
||||||
2cc: 7c 9d 4a a6 mfdac2 r4
|
2cc: (7c 9d 4a a6|a6 4a 9d 7c) mfdac2 r4
|
||||||
2d0: 7c 9e 4a a6 mfdvc1 r4
|
2d0: (7c 9e 4a a6|a6 4a 9e 7c) mfdvc1 r4
|
||||||
2d4: 7c 9e 4a a6 mfdvc1 r4
|
2d4: (7c 9e 4a a6|a6 4a 9e 7c) mfdvc1 r4
|
||||||
2d8: 7c 9f 4a a6 mfdvc2 r4
|
2d8: (7c 9f 4a a6|a6 4a 9f 7c) mfdvc2 r4
|
||||||
2dc: 7c 9f 4a a6 mfdvc2 r4
|
2dc: (7c 9f 4a a6|a6 4a 9f 7c) mfdvc2 r4
|
||||||
2e0: 7c 90 52 a6 mftsr r4
|
2e0: (7c 90 52 a6|a6 52 90 7c) mftsr r4
|
||||||
2e4: 7c 90 52 a6 mftsr r4
|
2e4: (7c 90 52 a6|a6 52 90 7c) mftsr r4
|
||||||
2e8: 7c 94 52 a6 mftcr r4
|
2e8: (7c 94 52 a6|a6 52 94 7c) mftcr r4
|
||||||
2ec: 7c 94 52 a6 mftcr r4
|
2ec: (7c 94 52 a6|a6 52 94 7c) mftcr r4
|
||||||
2f0: 7c 90 62 a6 mfivor0 r4
|
2f0: (7c 90 62 a6|a6 62 90 7c) mfivor0 r4
|
||||||
2f4: 7c 90 62 a6 mfivor0 r4
|
2f4: (7c 90 62 a6|a6 62 90 7c) mfivor0 r4
|
||||||
2f8: 7c 91 62 a6 mfivor1 r4
|
2f8: (7c 91 62 a6|a6 62 91 7c) mfivor1 r4
|
||||||
2fc: 7c 91 62 a6 mfivor1 r4
|
2fc: (7c 91 62 a6|a6 62 91 7c) mfivor1 r4
|
||||||
300: 7c 92 62 a6 mfivor2 r4
|
300: (7c 92 62 a6|a6 62 92 7c) mfivor2 r4
|
||||||
304: 7c 92 62 a6 mfivor2 r4
|
304: (7c 92 62 a6|a6 62 92 7c) mfivor2 r4
|
||||||
308: 7c 93 62 a6 mfivor3 r4
|
308: (7c 93 62 a6|a6 62 93 7c) mfivor3 r4
|
||||||
30c: 7c 93 62 a6 mfivor3 r4
|
30c: (7c 93 62 a6|a6 62 93 7c) mfivor3 r4
|
||||||
310: 7c 94 62 a6 mfivor4 r4
|
310: (7c 94 62 a6|a6 62 94 7c) mfivor4 r4
|
||||||
314: 7c 94 62 a6 mfivor4 r4
|
314: (7c 94 62 a6|a6 62 94 7c) mfivor4 r4
|
||||||
318: 7c 95 62 a6 mfivor5 r4
|
318: (7c 95 62 a6|a6 62 95 7c) mfivor5 r4
|
||||||
31c: 7c 95 62 a6 mfivor5 r4
|
31c: (7c 95 62 a6|a6 62 95 7c) mfivor5 r4
|
||||||
320: 7c 96 62 a6 mfivor6 r4
|
320: (7c 96 62 a6|a6 62 96 7c) mfivor6 r4
|
||||||
324: 7c 96 62 a6 mfivor6 r4
|
324: (7c 96 62 a6|a6 62 96 7c) mfivor6 r4
|
||||||
328: 7c 97 62 a6 mfivor7 r4
|
328: (7c 97 62 a6|a6 62 97 7c) mfivor7 r4
|
||||||
32c: 7c 97 62 a6 mfivor7 r4
|
32c: (7c 97 62 a6|a6 62 97 7c) mfivor7 r4
|
||||||
330: 7c 98 62 a6 mfivor8 r4
|
330: (7c 98 62 a6|a6 62 98 7c) mfivor8 r4
|
||||||
334: 7c 98 62 a6 mfivor8 r4
|
334: (7c 98 62 a6|a6 62 98 7c) mfivor8 r4
|
||||||
338: 7c 99 62 a6 mfivor9 r4
|
338: (7c 99 62 a6|a6 62 99 7c) mfivor9 r4
|
||||||
33c: 7c 99 62 a6 mfivor9 r4
|
33c: (7c 99 62 a6|a6 62 99 7c) mfivor9 r4
|
||||||
340: 7c 9a 62 a6 mfivor10 r4
|
340: (7c 9a 62 a6|a6 62 9a 7c) mfivor10 r4
|
||||||
344: 7c 9a 62 a6 mfivor10 r4
|
344: (7c 9a 62 a6|a6 62 9a 7c) mfivor10 r4
|
||||||
348: 7c 9b 62 a6 mfivor11 r4
|
348: (7c 9b 62 a6|a6 62 9b 7c) mfivor11 r4
|
||||||
34c: 7c 9b 62 a6 mfivor11 r4
|
34c: (7c 9b 62 a6|a6 62 9b 7c) mfivor11 r4
|
||||||
350: 7c 9c 62 a6 mfivor12 r4
|
350: (7c 9c 62 a6|a6 62 9c 7c) mfivor12 r4
|
||||||
354: 7c 9c 62 a6 mfivor12 r4
|
354: (7c 9c 62 a6|a6 62 9c 7c) mfivor12 r4
|
||||||
358: 7c 9d 62 a6 mfivor13 r4
|
358: (7c 9d 62 a6|a6 62 9d 7c) mfivor13 r4
|
||||||
35c: 7c 9d 62 a6 mfivor13 r4
|
35c: (7c 9d 62 a6|a6 62 9d 7c) mfivor13 r4
|
||||||
360: 7c 9e 62 a6 mfivor14 r4
|
360: (7c 9e 62 a6|a6 62 9e 7c) mfivor14 r4
|
||||||
364: 7c 9e 62 a6 mfivor14 r4
|
364: (7c 9e 62 a6|a6 62 9e 7c) mfivor14 r4
|
||||||
368: 7c 9f 62 a6 mfivor15 r4
|
368: (7c 9f 62 a6|a6 62 9f 7c) mfivor15 r4
|
||||||
36c: 7c 9f 62 a6 mfivor15 r4
|
36c: (7c 9f 62 a6|a6 62 9f 7c) mfivor15 r4
|
||||||
370: 7c 93 82 a6 mfivor35 r4
|
370: (7c 93 82 a6|a6 82 93 7c) mfivor35 r4
|
||||||
374: 7c 93 82 a6 mfivor35 r4
|
374: (7c 93 82 a6|a6 82 93 7c) mfivor35 r4
|
||||||
378: 7c 9a 8a a6 mfdc_dat r4
|
378: (7c 9a 8a a6|a6 8a 9a 7c) mfdc_dat r4
|
||||||
37c: 7c 9a 8a a6 mfdc_dat r4
|
37c: (7c 9a 8a a6|a6 8a 9a 7c) mfdc_dat r4
|
||||||
380: 7c 9b 8a a6 mfmcsrr1 r4
|
380: (7c 9b 8a a6|a6 8a 9b 7c) mfmcsrr1 r4
|
||||||
384: 7c 9b 8a a6 mfmcsrr1 r4
|
384: (7c 9b 8a a6|a6 8a 9b 7c) mfmcsrr1 r4
|
||||||
388: 7c 9c 8a a6 mfmcsr r4
|
388: (7c 9c 8a a6|a6 8a 9c 7c) mfmcsr r4
|
||||||
38c: 7c 9c 8a a6 mfmcsr r4
|
38c: (7c 9c 8a a6|a6 8a 9c 7c) mfmcsr r4
|
||||||
390: 7c 90 da a6 mfivndx r4
|
390: (7c 90 da a6|a6 da 90 7c) mfivndx r4
|
||||||
394: 7c 90 da a6 mfivndx r4
|
394: (7c 90 da a6|a6 da 90 7c) mfivndx r4
|
||||||
398: 7c 91 da a6 mfdvndx r4
|
398: (7c 91 da a6|a6 da 91 7c) mfdvndx r4
|
||||||
39c: 7c 91 da a6 mfdvndx r4
|
39c: (7c 91 da a6|a6 da 91 7c) mfdvndx r4
|
||||||
3a0: 7c 92 da a6 mfivlim r4
|
3a0: (7c 92 da a6|a6 da 92 7c) mfivlim r4
|
||||||
3a4: 7c 92 da a6 mfivlim r4
|
3a4: (7c 92 da a6|a6 da 92 7c) mfivlim r4
|
||||||
3a8: 7c 93 da a6 mfdvlim r4
|
3a8: (7c 93 da a6|a6 da 93 7c) mfdvlim r4
|
||||||
3ac: 7c 93 da a6 mfdvlim r4
|
3ac: (7c 93 da a6|a6 da 93 7c) mfdvlim r4
|
||||||
3b0: 7c 94 da a6 mfclcsr r4
|
3b0: (7c 94 da a6|a6 da 94 7c) mfclcsr r4
|
||||||
3b4: 7c 94 da a6 mfclcsr r4
|
3b4: (7c 94 da a6|a6 da 94 7c) mfclcsr r4
|
||||||
3b8: 7c 98 da a6 mfccr1 r4
|
3b8: (7c 98 da a6|a6 da 98 7c) mfccr1 r4
|
||||||
3bc: 7c 98 da a6 mfccr1 r4
|
3bc: (7c 98 da a6|a6 da 98 7c) mfccr1 r4
|
||||||
3c0: 7c 9b e2 a6 mfrstcfg r4
|
3c0: (7c 9b e2 a6|a6 e2 9b 7c) mfrstcfg r4
|
||||||
3c4: 7c 9b e2 a6 mfrstcfg r4
|
3c4: (7c 9b e2 a6|a6 e2 9b 7c) mfrstcfg r4
|
||||||
3c8: 7c 9c e2 a6 mfdcdbtrl r4
|
3c8: (7c 9c e2 a6|a6 e2 9c 7c) mfdcdbtrl r4
|
||||||
3cc: 7c 9c e2 a6 mfdcdbtrl r4
|
3cc: (7c 9c e2 a6|a6 e2 9c 7c) mfdcdbtrl r4
|
||||||
3d0: 7c 9d e2 a6 mfdcdbtrh r4
|
3d0: (7c 9d e2 a6|a6 e2 9d 7c) mfdcdbtrh r4
|
||||||
3d4: 7c 9d e2 a6 mfdcdbtrh r4
|
3d4: (7c 9d e2 a6|a6 e2 9d 7c) mfdcdbtrh r4
|
||||||
3d8: 7c 9f e2 a6 mficdbtr r4
|
3d8: (7c 9f e2 a6|a6 e2 9f 7c) mficdbtr r4
|
||||||
3dc: 7c 9f e2 a6 mficdbtr r4
|
3dc: (7c 9f e2 a6|a6 e2 9f 7c) mficdbtr r4
|
||||||
3e0: 7c 92 ea a6 mfmmucr r4
|
3e0: (7c 92 ea a6|a6 ea 92 7c) mfmmucr r4
|
||||||
3e4: 7c 92 ea a6 mfmmucr r4
|
3e4: (7c 92 ea a6|a6 ea 92 7c) mfmmucr r4
|
||||||
3e8: 7c 93 ea a6 mfccr0 r4
|
3e8: (7c 93 ea a6|a6 ea 93 7c) mfccr0 r4
|
||||||
3ec: 7c 93 ea a6 mfccr0 r4
|
3ec: (7c 93 ea a6|a6 ea 93 7c) mfccr0 r4
|
||||||
3f0: 7c 93 f2 a6 mficdbdr r4
|
3f0: (7c 93 f2 a6|a6 f2 93 7c) mficdbdr r4
|
||||||
3f4: 7c 93 f2 a6 mficdbdr r4
|
3f4: (7c 93 f2 a6|a6 f2 93 7c) mficdbdr r4
|
||||||
3f8: 7c 93 fa a6 mfdbdr r4
|
3f8: (7c 93 fa a6|a6 fa 93 7c) mfdbdr r4
|
||||||
3fc: 7c 93 fa a6 mfdbdr r4
|
3fc: (7c 93 fa a6|a6 fa 93 7c) mfdbdr r4
|
||||||
400: 7c 96 0b a6 mtdecar r4
|
400: (7c 96 0b a6|a6 0b 96 7c) mtdecar r4
|
||||||
404: 7c 96 0b a6 mtdecar r4
|
404: (7c 96 0b a6|a6 0b 96 7c) mtdecar r4
|
||||||
|
|||||||
@ -1,5 +1,5 @@
|
|||||||
# AppliedMicro Titan tests
|
# AppliedMicro Titan tests
|
||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
blr
|
blr
|
||||||
tweqi 1, 0
|
tweqi 1, 0
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section .text
|
.text
|
||||||
se_b sub1
|
se_b sub1
|
||||||
se_bl sub1
|
se_bl sub1
|
||||||
se_bc 0,1,sub2
|
se_bc 0,1,sub2
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section .text
|
.text
|
||||||
|
|
||||||
target0:
|
target0:
|
||||||
se_beq target3
|
se_beq target3
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section .text
|
.text
|
||||||
|
|
||||||
target0:
|
target0:
|
||||||
e_bdnz target1
|
e_bdnz target1
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section .text
|
.text
|
||||||
trap:
|
trap:
|
||||||
trap
|
trap
|
||||||
twlt 1, 2
|
twlt 1, 2
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section .text
|
.text
|
||||||
|
|
||||||
subtract:
|
subtract:
|
||||||
sub 1, 2, 3
|
sub 1, 2, 3
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section .text
|
.text
|
||||||
|
|
||||||
e_extlwi 2, 2, 1, 0
|
e_extlwi 2, 2, 1, 0
|
||||||
e_extrwi 2, 3, 10, 5
|
e_extrwi 2, 3, 10, 5
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section .text
|
.text
|
||||||
|
|
||||||
mtmas1 5
|
mtmas1 5
|
||||||
|
|
||||||
|
|||||||
@ -1,6 +1,6 @@
|
|||||||
# Freescale PowerPC VLE instruction tests
|
# Freescale PowerPC VLE instruction tests
|
||||||
#as: -mvle
|
#as: -mvle
|
||||||
.section .text
|
.text
|
||||||
.extern extern_subr
|
.extern extern_subr
|
||||||
.equ UI8,0x37
|
.equ UI8,0x37
|
||||||
.equ SCI0,UI8<<0
|
.equ SCI0,UI8<<0
|
||||||
|
|||||||
@ -2,167 +2,167 @@
|
|||||||
#objdump: -d -Mvsx
|
#objdump: -d -Mvsx
|
||||||
#name: VSX tests
|
#name: VSX tests
|
||||||
|
|
||||||
.*: +file format elf(32)?(64)?-powerpc.*
|
.*
|
||||||
|
|
||||||
|
|
||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0+00 <start>:
|
0+00 <start>:
|
||||||
0: 7d 0a a4 99 lxsdx vs40,r10,r20
|
0: (7d 0a a4 99|99 a4 0a 7d) lxsdx vs40,r10,r20
|
||||||
4: 7d 0a a6 99 lxvd2x vs40,r10,r20
|
4: (7d 0a a6 99|99 a6 0a 7d) lxvd2x vs40,r10,r20
|
||||||
8: 7d 0a a2 99 lxvdsx vs40,r10,r20
|
8: (7d 0a a2 99|99 a2 0a 7d) lxvdsx vs40,r10,r20
|
||||||
c: 7d 0a a6 19 lxvw4x vs40,r10,r20
|
c: (7d 0a a6 19|19 a6 0a 7d) lxvw4x vs40,r10,r20
|
||||||
10: 7d 0a a5 99 stxsdx vs40,r10,r20
|
10: (7d 0a a5 99|99 a5 0a 7d) stxsdx vs40,r10,r20
|
||||||
14: 7d 0a a7 99 stxvd2x vs40,r10,r20
|
14: (7d 0a a7 99|99 a7 0a 7d) stxvd2x vs40,r10,r20
|
||||||
18: 7d 0a a7 19 stxvw4x vs40,r10,r20
|
18: (7d 0a a7 19|19 a7 0a 7d) stxvw4x vs40,r10,r20
|
||||||
1c: f1 00 e5 67 xsabsdp vs40,vs60
|
1c: (f1 00 e5 67|67 e5 00 f1) xsabsdp vs40,vs60
|
||||||
20: f1 12 e1 07 xsadddp vs40,vs50,vs60
|
20: (f1 12 e1 07|07 e1 12 f1) xsadddp vs40,vs50,vs60
|
||||||
24: f0 92 e1 5e xscmpodp cr1,vs50,vs60
|
24: (f0 92 e1 5e|5e e1 92 f0) xscmpodp cr1,vs50,vs60
|
||||||
28: f0 92 e1 1e xscmpudp cr1,vs50,vs60
|
28: (f0 92 e1 1e|1e e1 92 f0) xscmpudp cr1,vs50,vs60
|
||||||
2c: f1 12 e5 87 xscpsgndp vs40,vs50,vs60
|
2c: (f1 12 e5 87|87 e5 12 f1) xscpsgndp vs40,vs50,vs60
|
||||||
30: f1 00 e4 27 xscvdpsp vs40,vs60
|
30: (f1 00 e4 27|27 e4 00 f1) xscvdpsp vs40,vs60
|
||||||
34: f1 00 e5 63 xscvdpsxds vs40,vs60
|
34: (f1 00 e5 63|63 e5 00 f1) xscvdpsxds vs40,vs60
|
||||||
38: f1 00 e1 63 xscvdpsxws vs40,vs60
|
38: (f1 00 e1 63|63 e1 00 f1) xscvdpsxws vs40,vs60
|
||||||
3c: f1 00 e5 23 xscvdpuxds vs40,vs60
|
3c: (f1 00 e5 23|23 e5 00 f1) xscvdpuxds vs40,vs60
|
||||||
40: f1 00 e1 23 xscvdpuxws vs40,vs60
|
40: (f1 00 e1 23|23 e1 00 f1) xscvdpuxws vs40,vs60
|
||||||
44: f1 00 e5 27 xscvspdp vs40,vs60
|
44: (f1 00 e5 27|27 e5 00 f1) xscvspdp vs40,vs60
|
||||||
48: f1 00 e5 e3 xscvsxddp vs40,vs60
|
48: (f1 00 e5 e3|e3 e5 00 f1) xscvsxddp vs40,vs60
|
||||||
4c: f1 00 e5 a3 xscvuxddp vs40,vs60
|
4c: (f1 00 e5 a3|a3 e5 00 f1) xscvuxddp vs40,vs60
|
||||||
50: f1 12 e1 c7 xsdivdp vs40,vs50,vs60
|
50: (f1 12 e1 c7|c7 e1 12 f1) xsdivdp vs40,vs50,vs60
|
||||||
54: f1 12 e1 0f xsmaddadp vs40,vs50,vs60
|
54: (f1 12 e1 0f|0f e1 12 f1) xsmaddadp vs40,vs50,vs60
|
||||||
58: f1 12 e1 4f xsmaddmdp vs40,vs50,vs60
|
58: (f1 12 e1 4f|4f e1 12 f1) xsmaddmdp vs40,vs50,vs60
|
||||||
5c: f1 12 e5 07 xsmaxdp vs40,vs50,vs60
|
5c: (f1 12 e5 07|07 e5 12 f1) xsmaxdp vs40,vs50,vs60
|
||||||
60: f1 12 e5 47 xsmindp vs40,vs50,vs60
|
60: (f1 12 e5 47|47 e5 12 f1) xsmindp vs40,vs50,vs60
|
||||||
64: f1 12 e1 8f xsmsubadp vs40,vs50,vs60
|
64: (f1 12 e1 8f|8f e1 12 f1) xsmsubadp vs40,vs50,vs60
|
||||||
68: f1 12 e1 cf xsmsubmdp vs40,vs50,vs60
|
68: (f1 12 e1 cf|cf e1 12 f1) xsmsubmdp vs40,vs50,vs60
|
||||||
6c: f1 12 e1 87 xsmuldp vs40,vs50,vs60
|
6c: (f1 12 e1 87|87 e1 12 f1) xsmuldp vs40,vs50,vs60
|
||||||
70: f1 00 e5 a7 xsnabsdp vs40,vs60
|
70: (f1 00 e5 a7|a7 e5 00 f1) xsnabsdp vs40,vs60
|
||||||
74: f1 00 e5 e7 xsnegdp vs40,vs60
|
74: (f1 00 e5 e7|e7 e5 00 f1) xsnegdp vs40,vs60
|
||||||
78: f1 12 e5 0f xsnmaddadp vs40,vs50,vs60
|
78: (f1 12 e5 0f|0f e5 12 f1) xsnmaddadp vs40,vs50,vs60
|
||||||
7c: f1 12 e5 4f xsnmaddmdp vs40,vs50,vs60
|
7c: (f1 12 e5 4f|4f e5 12 f1) xsnmaddmdp vs40,vs50,vs60
|
||||||
80: f1 12 e5 8f xsnmsubadp vs40,vs50,vs60
|
80: (f1 12 e5 8f|8f e5 12 f1) xsnmsubadp vs40,vs50,vs60
|
||||||
84: f1 12 e5 cf xsnmsubmdp vs40,vs50,vs60
|
84: (f1 12 e5 cf|cf e5 12 f1) xsnmsubmdp vs40,vs50,vs60
|
||||||
88: f1 00 e1 27 xsrdpi vs40,vs60
|
88: (f1 00 e1 27|27 e1 00 f1) xsrdpi vs40,vs60
|
||||||
8c: f1 00 e1 af xsrdpic vs40,vs60
|
8c: (f1 00 e1 af|af e1 00 f1) xsrdpic vs40,vs60
|
||||||
90: f1 00 e1 e7 xsrdpim vs40,vs60
|
90: (f1 00 e1 e7|e7 e1 00 f1) xsrdpim vs40,vs60
|
||||||
94: f1 00 e1 a7 xsrdpip vs40,vs60
|
94: (f1 00 e1 a7|a7 e1 00 f1) xsrdpip vs40,vs60
|
||||||
98: f1 00 e1 67 xsrdpiz vs40,vs60
|
98: (f1 00 e1 67|67 e1 00 f1) xsrdpiz vs40,vs60
|
||||||
9c: f1 00 e1 6b xsredp vs40,vs60
|
9c: (f1 00 e1 6b|6b e1 00 f1) xsredp vs40,vs60
|
||||||
a0: f1 00 e1 2b xsrsqrtedp vs40,vs60
|
a0: (f1 00 e1 2b|2b e1 00 f1) xsrsqrtedp vs40,vs60
|
||||||
a4: f1 00 e1 2f xssqrtdp vs40,vs60
|
a4: (f1 00 e1 2f|2f e1 00 f1) xssqrtdp vs40,vs60
|
||||||
a8: f1 12 e1 47 xssubdp vs40,vs50,vs60
|
a8: (f1 12 e1 47|47 e1 12 f1) xssubdp vs40,vs50,vs60
|
||||||
ac: f0 92 e1 ee xstdivdp cr1,vs50,vs60
|
ac: (f0 92 e1 ee|ee e1 92 f0) xstdivdp cr1,vs50,vs60
|
||||||
b0: f0 80 e1 aa xstsqrtdp cr1,vs60
|
b0: (f0 80 e1 aa|aa e1 80 f0) xstsqrtdp cr1,vs60
|
||||||
b4: f1 00 e7 67 xvabsdp vs40,vs60
|
b4: (f1 00 e7 67|67 e7 00 f1) xvabsdp vs40,vs60
|
||||||
b8: f1 00 e6 67 xvabssp vs40,vs60
|
b8: (f1 00 e6 67|67 e6 00 f1) xvabssp vs40,vs60
|
||||||
bc: f1 12 e3 07 xvadddp vs40,vs50,vs60
|
bc: (f1 12 e3 07|07 e3 12 f1) xvadddp vs40,vs50,vs60
|
||||||
c0: f1 12 e2 07 xvaddsp vs40,vs50,vs60
|
c0: (f1 12 e2 07|07 e2 12 f1) xvaddsp vs40,vs50,vs60
|
||||||
c4: f1 12 e3 1f xvcmpeqdp vs40,vs50,vs60
|
c4: (f1 12 e3 1f|1f e3 12 f1) xvcmpeqdp vs40,vs50,vs60
|
||||||
c8: f1 12 e7 1f xvcmpeqdp\. vs40,vs50,vs60
|
c8: (f1 12 e7 1f|1f e7 12 f1) xvcmpeqdp\. vs40,vs50,vs60
|
||||||
cc: f1 12 e2 1f xvcmpeqsp vs40,vs50,vs60
|
cc: (f1 12 e2 1f|1f e2 12 f1) xvcmpeqsp vs40,vs50,vs60
|
||||||
d0: f1 12 e6 1f xvcmpeqsp\. vs40,vs50,vs60
|
d0: (f1 12 e6 1f|1f e6 12 f1) xvcmpeqsp\. vs40,vs50,vs60
|
||||||
d4: f1 12 e3 9f xvcmpgedp vs40,vs50,vs60
|
d4: (f1 12 e3 9f|9f e3 12 f1) xvcmpgedp vs40,vs50,vs60
|
||||||
d8: f1 12 e7 9f xvcmpgedp\. vs40,vs50,vs60
|
d8: (f1 12 e7 9f|9f e7 12 f1) xvcmpgedp\. vs40,vs50,vs60
|
||||||
dc: f1 12 e2 9f xvcmpgesp vs40,vs50,vs60
|
dc: (f1 12 e2 9f|9f e2 12 f1) xvcmpgesp vs40,vs50,vs60
|
||||||
e0: f1 12 e6 9f xvcmpgesp\. vs40,vs50,vs60
|
e0: (f1 12 e6 9f|9f e6 12 f1) xvcmpgesp\. vs40,vs50,vs60
|
||||||
e4: f1 12 e3 5f xvcmpgtdp vs40,vs50,vs60
|
e4: (f1 12 e3 5f|5f e3 12 f1) xvcmpgtdp vs40,vs50,vs60
|
||||||
e8: f1 12 e7 5f xvcmpgtdp\. vs40,vs50,vs60
|
e8: (f1 12 e7 5f|5f e7 12 f1) xvcmpgtdp\. vs40,vs50,vs60
|
||||||
ec: f1 12 e2 5f xvcmpgtsp vs40,vs50,vs60
|
ec: (f1 12 e2 5f|5f e2 12 f1) xvcmpgtsp vs40,vs50,vs60
|
||||||
f0: f1 12 e6 5f xvcmpgtsp\. vs40,vs50,vs60
|
f0: (f1 12 e6 5f|5f e6 12 f1) xvcmpgtsp\. vs40,vs50,vs60
|
||||||
f4: f1 12 e7 87 xvcpsgndp vs40,vs50,vs60
|
f4: (f1 12 e7 87|87 e7 12 f1) xvcpsgndp vs40,vs50,vs60
|
||||||
f8: f1 1c e7 87 xvmovdp vs40,vs60
|
f8: (f1 1c e7 87|87 e7 1c f1) xvmovdp vs40,vs60
|
||||||
fc: f1 1c e7 87 xvmovdp vs40,vs60
|
fc: (f1 1c e7 87|87 e7 1c f1) xvmovdp vs40,vs60
|
||||||
100: f1 12 e6 87 xvcpsgnsp vs40,vs50,vs60
|
100: (f1 12 e6 87|87 e6 12 f1) xvcpsgnsp vs40,vs50,vs60
|
||||||
104: f1 1c e6 87 xvmovsp vs40,vs60
|
104: (f1 1c e6 87|87 e6 1c f1) xvmovsp vs40,vs60
|
||||||
108: f1 1c e6 87 xvmovsp vs40,vs60
|
108: (f1 1c e6 87|87 e6 1c f1) xvmovsp vs40,vs60
|
||||||
10c: f1 00 e6 27 xvcvdpsp vs40,vs60
|
10c: (f1 00 e6 27|27 e6 00 f1) xvcvdpsp vs40,vs60
|
||||||
110: f1 00 e7 63 xvcvdpsxds vs40,vs60
|
110: (f1 00 e7 63|63 e7 00 f1) xvcvdpsxds vs40,vs60
|
||||||
114: f1 00 e3 63 xvcvdpsxws vs40,vs60
|
114: (f1 00 e3 63|63 e3 00 f1) xvcvdpsxws vs40,vs60
|
||||||
118: f1 00 e7 23 xvcvdpuxds vs40,vs60
|
118: (f1 00 e7 23|23 e7 00 f1) xvcvdpuxds vs40,vs60
|
||||||
11c: f1 00 e3 23 xvcvdpuxws vs40,vs60
|
11c: (f1 00 e3 23|23 e3 00 f1) xvcvdpuxws vs40,vs60
|
||||||
120: f1 00 e7 27 xvcvspdp vs40,vs60
|
120: (f1 00 e7 27|27 e7 00 f1) xvcvspdp vs40,vs60
|
||||||
124: f1 00 e6 63 xvcvspsxds vs40,vs60
|
124: (f1 00 e6 63|63 e6 00 f1) xvcvspsxds vs40,vs60
|
||||||
128: f1 00 e2 63 xvcvspsxws vs40,vs60
|
128: (f1 00 e2 63|63 e2 00 f1) xvcvspsxws vs40,vs60
|
||||||
12c: f1 00 e6 23 xvcvspuxds vs40,vs60
|
12c: (f1 00 e6 23|23 e6 00 f1) xvcvspuxds vs40,vs60
|
||||||
130: f1 00 e2 23 xvcvspuxws vs40,vs60
|
130: (f1 00 e2 23|23 e2 00 f1) xvcvspuxws vs40,vs60
|
||||||
134: f1 00 e7 e3 xvcvsxddp vs40,vs60
|
134: (f1 00 e7 e3|e3 e7 00 f1) xvcvsxddp vs40,vs60
|
||||||
138: f1 00 e6 e3 xvcvsxdsp vs40,vs60
|
138: (f1 00 e6 e3|e3 e6 00 f1) xvcvsxdsp vs40,vs60
|
||||||
13c: f1 00 e3 e3 xvcvsxwdp vs40,vs60
|
13c: (f1 00 e3 e3|e3 e3 00 f1) xvcvsxwdp vs40,vs60
|
||||||
140: f1 00 e2 e3 xvcvsxwsp vs40,vs60
|
140: (f1 00 e2 e3|e3 e2 00 f1) xvcvsxwsp vs40,vs60
|
||||||
144: f1 00 e7 a3 xvcvuxddp vs40,vs60
|
144: (f1 00 e7 a3|a3 e7 00 f1) xvcvuxddp vs40,vs60
|
||||||
148: f1 00 e6 a3 xvcvuxdsp vs40,vs60
|
148: (f1 00 e6 a3|a3 e6 00 f1) xvcvuxdsp vs40,vs60
|
||||||
14c: f1 00 e3 a3 xvcvuxwdp vs40,vs60
|
14c: (f1 00 e3 a3|a3 e3 00 f1) xvcvuxwdp vs40,vs60
|
||||||
150: f1 00 e2 a3 xvcvuxwsp vs40,vs60
|
150: (f1 00 e2 a3|a3 e2 00 f1) xvcvuxwsp vs40,vs60
|
||||||
154: f1 12 e3 c7 xvdivdp vs40,vs50,vs60
|
154: (f1 12 e3 c7|c7 e3 12 f1) xvdivdp vs40,vs50,vs60
|
||||||
158: f1 12 e2 c7 xvdivsp vs40,vs50,vs60
|
158: (f1 12 e2 c7|c7 e2 12 f1) xvdivsp vs40,vs50,vs60
|
||||||
15c: f1 12 e3 0f xvmaddadp vs40,vs50,vs60
|
15c: (f1 12 e3 0f|0f e3 12 f1) xvmaddadp vs40,vs50,vs60
|
||||||
160: f1 12 e3 4f xvmaddmdp vs40,vs50,vs60
|
160: (f1 12 e3 4f|4f e3 12 f1) xvmaddmdp vs40,vs50,vs60
|
||||||
164: f1 12 e2 0f xvmaddasp vs40,vs50,vs60
|
164: (f1 12 e2 0f|0f e2 12 f1) xvmaddasp vs40,vs50,vs60
|
||||||
168: f1 12 e2 4f xvmaddmsp vs40,vs50,vs60
|
168: (f1 12 e2 4f|4f e2 12 f1) xvmaddmsp vs40,vs50,vs60
|
||||||
16c: f1 12 e7 07 xvmaxdp vs40,vs50,vs60
|
16c: (f1 12 e7 07|07 e7 12 f1) xvmaxdp vs40,vs50,vs60
|
||||||
170: f1 12 e6 07 xvmaxsp vs40,vs50,vs60
|
170: (f1 12 e6 07|07 e6 12 f1) xvmaxsp vs40,vs50,vs60
|
||||||
174: f1 12 e7 47 xvmindp vs40,vs50,vs60
|
174: (f1 12 e7 47|47 e7 12 f1) xvmindp vs40,vs50,vs60
|
||||||
178: f1 12 e6 47 xvminsp vs40,vs50,vs60
|
178: (f1 12 e6 47|47 e6 12 f1) xvminsp vs40,vs50,vs60
|
||||||
17c: f1 12 e3 8f xvmsubadp vs40,vs50,vs60
|
17c: (f1 12 e3 8f|8f e3 12 f1) xvmsubadp vs40,vs50,vs60
|
||||||
180: f1 12 e3 cf xvmsubmdp vs40,vs50,vs60
|
180: (f1 12 e3 cf|cf e3 12 f1) xvmsubmdp vs40,vs50,vs60
|
||||||
184: f1 12 e2 8f xvmsubasp vs40,vs50,vs60
|
184: (f1 12 e2 8f|8f e2 12 f1) xvmsubasp vs40,vs50,vs60
|
||||||
188: f1 12 e2 cf xvmsubmsp vs40,vs50,vs60
|
188: (f1 12 e2 cf|cf e2 12 f1) xvmsubmsp vs40,vs50,vs60
|
||||||
18c: f1 12 e3 87 xvmuldp vs40,vs50,vs60
|
18c: (f1 12 e3 87|87 e3 12 f1) xvmuldp vs40,vs50,vs60
|
||||||
190: f1 12 e2 87 xvmulsp vs40,vs50,vs60
|
190: (f1 12 e2 87|87 e2 12 f1) xvmulsp vs40,vs50,vs60
|
||||||
194: f1 00 e7 a7 xvnabsdp vs40,vs60
|
194: (f1 00 e7 a7|a7 e7 00 f1) xvnabsdp vs40,vs60
|
||||||
198: f1 00 e6 a7 xvnabssp vs40,vs60
|
198: (f1 00 e6 a7|a7 e6 00 f1) xvnabssp vs40,vs60
|
||||||
19c: f1 00 e7 e7 xvnegdp vs40,vs60
|
19c: (f1 00 e7 e7|e7 e7 00 f1) xvnegdp vs40,vs60
|
||||||
1a0: f1 00 e6 e7 xvnegsp vs40,vs60
|
1a0: (f1 00 e6 e7|e7 e6 00 f1) xvnegsp vs40,vs60
|
||||||
1a4: f1 12 e7 0f xvnmaddadp vs40,vs50,vs60
|
1a4: (f1 12 e7 0f|0f e7 12 f1) xvnmaddadp vs40,vs50,vs60
|
||||||
1a8: f1 12 e7 4f xvnmaddmdp vs40,vs50,vs60
|
1a8: (f1 12 e7 4f|4f e7 12 f1) xvnmaddmdp vs40,vs50,vs60
|
||||||
1ac: f1 12 e6 0f xvnmaddasp vs40,vs50,vs60
|
1ac: (f1 12 e6 0f|0f e6 12 f1) xvnmaddasp vs40,vs50,vs60
|
||||||
1b0: f1 12 e6 4f xvnmaddmsp vs40,vs50,vs60
|
1b0: (f1 12 e6 4f|4f e6 12 f1) xvnmaddmsp vs40,vs50,vs60
|
||||||
1b4: f1 12 e7 8f xvnmsubadp vs40,vs50,vs60
|
1b4: (f1 12 e7 8f|8f e7 12 f1) xvnmsubadp vs40,vs50,vs60
|
||||||
1b8: f1 12 e7 cf xvnmsubmdp vs40,vs50,vs60
|
1b8: (f1 12 e7 cf|cf e7 12 f1) xvnmsubmdp vs40,vs50,vs60
|
||||||
1bc: f1 12 e6 8f xvnmsubasp vs40,vs50,vs60
|
1bc: (f1 12 e6 8f|8f e6 12 f1) xvnmsubasp vs40,vs50,vs60
|
||||||
1c0: f1 12 e6 cf xvnmsubmsp vs40,vs50,vs60
|
1c0: (f1 12 e6 cf|cf e6 12 f1) xvnmsubmsp vs40,vs50,vs60
|
||||||
1c4: f1 00 e3 27 xvrdpi vs40,vs60
|
1c4: (f1 00 e3 27|27 e3 00 f1) xvrdpi vs40,vs60
|
||||||
1c8: f1 00 e3 af xvrdpic vs40,vs60
|
1c8: (f1 00 e3 af|af e3 00 f1) xvrdpic vs40,vs60
|
||||||
1cc: f1 00 e3 e7 xvrdpim vs40,vs60
|
1cc: (f1 00 e3 e7|e7 e3 00 f1) xvrdpim vs40,vs60
|
||||||
1d0: f1 00 e3 a7 xvrdpip vs40,vs60
|
1d0: (f1 00 e3 a7|a7 e3 00 f1) xvrdpip vs40,vs60
|
||||||
1d4: f1 00 e3 67 xvrdpiz vs40,vs60
|
1d4: (f1 00 e3 67|67 e3 00 f1) xvrdpiz vs40,vs60
|
||||||
1d8: f1 00 e3 6b xvredp vs40,vs60
|
1d8: (f1 00 e3 6b|6b e3 00 f1) xvredp vs40,vs60
|
||||||
1dc: f1 00 e2 6b xvresp vs40,vs60
|
1dc: (f1 00 e2 6b|6b e2 00 f1) xvresp vs40,vs60
|
||||||
1e0: f1 00 e2 27 xvrspi vs40,vs60
|
1e0: (f1 00 e2 27|27 e2 00 f1) xvrspi vs40,vs60
|
||||||
1e4: f1 00 e2 af xvrspic vs40,vs60
|
1e4: (f1 00 e2 af|af e2 00 f1) xvrspic vs40,vs60
|
||||||
1e8: f1 00 e2 e7 xvrspim vs40,vs60
|
1e8: (f1 00 e2 e7|e7 e2 00 f1) xvrspim vs40,vs60
|
||||||
1ec: f1 00 e2 a7 xvrspip vs40,vs60
|
1ec: (f1 00 e2 a7|a7 e2 00 f1) xvrspip vs40,vs60
|
||||||
1f0: f1 00 e2 67 xvrspiz vs40,vs60
|
1f0: (f1 00 e2 67|67 e2 00 f1) xvrspiz vs40,vs60
|
||||||
1f4: f1 00 e3 2b xvrsqrtedp vs40,vs60
|
1f4: (f1 00 e3 2b|2b e3 00 f1) xvrsqrtedp vs40,vs60
|
||||||
1f8: f1 00 e2 2b xvrsqrtesp vs40,vs60
|
1f8: (f1 00 e2 2b|2b e2 00 f1) xvrsqrtesp vs40,vs60
|
||||||
1fc: f1 00 e3 2f xvsqrtdp vs40,vs60
|
1fc: (f1 00 e3 2f|2f e3 00 f1) xvsqrtdp vs40,vs60
|
||||||
200: f1 00 e2 2f xvsqrtsp vs40,vs60
|
200: (f1 00 e2 2f|2f e2 00 f1) xvsqrtsp vs40,vs60
|
||||||
204: f1 12 e3 47 xvsubdp vs40,vs50,vs60
|
204: (f1 12 e3 47|47 e3 12 f1) xvsubdp vs40,vs50,vs60
|
||||||
208: f1 12 e2 47 xvsubsp vs40,vs50,vs60
|
208: (f1 12 e2 47|47 e2 12 f1) xvsubsp vs40,vs50,vs60
|
||||||
20c: f0 92 e3 ee xvtdivdp cr1,vs50,vs60
|
20c: (f0 92 e3 ee|ee e3 92 f0) xvtdivdp cr1,vs50,vs60
|
||||||
210: f0 92 e2 ee xvtdivsp cr1,vs50,vs60
|
210: (f0 92 e2 ee|ee e2 92 f0) xvtdivsp cr1,vs50,vs60
|
||||||
214: f0 80 e3 aa xvtsqrtdp cr1,vs60
|
214: (f0 80 e3 aa|aa e3 80 f0) xvtsqrtdp cr1,vs60
|
||||||
218: f0 80 e2 aa xvtsqrtsp cr1,vs60
|
218: (f0 80 e2 aa|aa e2 80 f0) xvtsqrtsp cr1,vs60
|
||||||
21c: f1 12 e4 17 xxland vs40,vs50,vs60
|
21c: (f1 12 e4 17|17 e4 12 f1) xxland vs40,vs50,vs60
|
||||||
220: f1 12 e4 57 xxlandc vs40,vs50,vs60
|
220: (f1 12 e4 57|57 e4 12 f1) xxlandc vs40,vs50,vs60
|
||||||
224: f1 12 e5 17 xxlnor vs40,vs50,vs60
|
224: (f1 12 e5 17|17 e5 12 f1) xxlnor vs40,vs50,vs60
|
||||||
228: f1 12 e4 97 xxlor vs40,vs50,vs60
|
228: (f1 12 e4 97|97 e4 12 f1) xxlor vs40,vs50,vs60
|
||||||
22c: f1 12 e4 d7 xxlxor vs40,vs50,vs60
|
22c: (f1 12 e4 d7|d7 e4 12 f1) xxlxor vs40,vs50,vs60
|
||||||
230: f1 12 e0 97 xxmrghw vs40,vs50,vs60
|
230: (f1 12 e0 97|97 e0 12 f1) xxmrghw vs40,vs50,vs60
|
||||||
234: f1 12 e1 97 xxmrglw vs40,vs50,vs60
|
234: (f1 12 e1 97|97 e1 12 f1) xxmrglw vs40,vs50,vs60
|
||||||
238: f1 12 e0 57 xxmrghd vs40,vs50,vs60
|
238: (f1 12 e0 57|57 e0 12 f1) xxmrghd vs40,vs50,vs60
|
||||||
23c: f1 12 e1 57 xxpermdi vs40,vs50,vs60,1
|
23c: (f1 12 e1 57|57 e1 12 f1) xxpermdi vs40,vs50,vs60,1
|
||||||
240: f1 12 e2 57 xxpermdi vs40,vs50,vs60,2
|
240: (f1 12 e2 57|57 e2 12 f1) xxpermdi vs40,vs50,vs60,2
|
||||||
244: f1 12 e3 57 xxmrgld vs40,vs50,vs60
|
244: (f1 12 e3 57|57 e3 12 f1) xxmrgld vs40,vs50,vs60
|
||||||
248: f1 12 90 57 xxspltd vs40,vs50,0
|
248: (f1 12 90 57|57 90 12 f1) xxspltd vs40,vs50,0
|
||||||
24c: f1 12 90 57 xxspltd vs40,vs50,0
|
24c: (f1 12 90 57|57 90 12 f1) xxspltd vs40,vs50,0
|
||||||
250: f1 12 93 57 xxspltd vs40,vs50,1
|
250: (f1 12 93 57|57 93 12 f1) xxspltd vs40,vs50,1
|
||||||
254: f1 12 93 57 xxspltd vs40,vs50,1
|
254: (f1 12 93 57|57 93 12 f1) xxspltd vs40,vs50,1
|
||||||
258: f1 12 e0 57 xxmrghd vs40,vs50,vs60
|
258: (f1 12 e0 57|57 e0 12 f1) xxmrghd vs40,vs50,vs60
|
||||||
25c: f1 12 e0 57 xxmrghd vs40,vs50,vs60
|
25c: (f1 12 e0 57|57 e0 12 f1) xxmrghd vs40,vs50,vs60
|
||||||
260: f1 12 e3 57 xxmrgld vs40,vs50,vs60
|
260: (f1 12 e3 57|57 e3 12 f1) xxmrgld vs40,vs50,vs60
|
||||||
264: f1 12 92 57 xxswapd vs40,vs50
|
264: (f1 12 92 57|57 92 12 f1) xxswapd vs40,vs50
|
||||||
268: f1 12 92 57 xxswapd vs40,vs50
|
268: (f1 12 92 57|57 92 12 f1) xxswapd vs40,vs50
|
||||||
26c: f1 12 e7 bf xxsel vs40,vs50,vs60,vs62
|
26c: (f1 12 e7 bf|bf e7 12 f1) xxsel vs40,vs50,vs60,vs62
|
||||||
270: f1 12 e2 17 xxsldwi vs40,vs50,vs60,2
|
270: (f1 12 e2 17|17 e2 12 f1) xxsldwi vs40,vs50,vs60,2
|
||||||
274: f1 02 e2 93 xxspltw vs40,vs60,2
|
274: (f1 02 e2 93|93 e2 02 f1) xxspltw vs40,vs60,2
|
||||||
|
|||||||
@ -1,4 +1,4 @@
|
|||||||
.section ".text"
|
.text
|
||||||
start:
|
start:
|
||||||
lxsdx 40,10,20
|
lxsdx 40,10,20
|
||||||
lxvd2x 40,10,20
|
lxvd2x 40,10,20
|
||||||
|
|||||||
Reference in New Issue
Block a user