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RISC-V: Add pause hint instruction.

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Add support for the pause hint instruction, as specified in the
Zihintpause extension.  The pause instruction is encoded as a
special form of a memory fence (which is available as part of the
base instruction set).  The chosen encoding does not mandate any
particular memory ordering and therefore is a true hint.

bfd/
    * elfxx-riscv.c (riscv_std_z_ext_strtab): Added zihintpause.
gas/
    * config/tc-riscv.c (riscv_multi_subset_supports): Added
    INSN_CLASS_ZIHINTPAUSE.
    * testsuite/gas/riscv/pause.d: New testcase.  Adding coverage for
    the pause hint instruction.
    * testsuite/gas/riscv/pause.s: Likewise.
include/
    * opcode/riscv-opc.h: Added MATCH_PAUSE, MASK_PAUSE and DECLARE_INSN
    for pause hint instruction.
    * opcode/riscv.h (enum riscv_insn_class): Added INSN_CLASS_ZIHINTPAUSE.
opcodes/
    * riscv-opc.c (riscv_opcodes): Add pause hint instruction.
This commit is contained in:
Philipp Tomsich
2021-01-07 15:53:25 +08:00
committed by Nelson Chu
parent 4d4490b8d7
commit aa881ecde4
11 changed files with 44 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
include/opcode/riscv-opc.h
View File

@ -157,6 +157,8 @@
#define MASK_SW 0x707f
#define MATCH_SD 0x3023
#define MASK_SD 0x707f
#define MATCH_PAUSE 0x0100000f
#define MASK_PAUSE 0xffffffff
#define MATCH_FENCE 0xf
#define MASK_FENCE 0x707f
#define MATCH_FENCE_I 0x100f
@ -984,6 +986,7 @@ DECLARE_INSN(sb, MATCH_SB, MASK_SB)
DECLARE_INSN(sh, MATCH_SH, MASK_SH)
DECLARE_INSN(sw, MATCH_SW, MASK_SW)
DECLARE_INSN(sd, MATCH_SD, MASK_SD)
DECLARE_INSN(pause, MATCH_PAUSE, MASK_PAUSE)
DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE)
DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I)
DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)

1
include/opcode/riscv.h
View File

@ -311,6 +311,7 @@ enum riscv_insn_class
INSN_CLASS_D_AND_C,
INSN_CLASS_ZICSR,
INSN_CLASS_ZIFENCEI,
INSN_CLASS_ZIHINTPAUSE,
INSN_CLASS_ZBA,
INSN_CLASS_ZBB,
INSN_CLASS_ZBC,