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[AArch64] Fix code formatting in the cpu-table
2015-02-11 Matthew Wahab <matthew.wahab@arm.com> * config/tc-aarch64.c (aarch64_cpus): Fix code formatting.
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@ -1,3 +1,7 @@
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2015-02-11 Matthew Wahab <matthew.wahab@arm.com>
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* config/tc-aarch64.c (aarch64_cpus): Fix code formatting.
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2015-02-11 Matthew Wahab <matthew.wahab@arm.com>
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2015-02-11 Matthew Wahab <matthew.wahab@arm.com>
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* config/tc-arm.c: Add support for Cortex-A72.
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* config/tc-arm.c: Add support for Cortex-A72.
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@ -7227,10 +7227,10 @@ struct aarch64_cpu_option_table
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recognized by GCC. */
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recognized by GCC. */
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static const struct aarch64_cpu_option_table aarch64_cpus[] = {
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static const struct aarch64_cpu_option_table aarch64_cpus[] = {
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{"all", AARCH64_ANY, NULL},
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{"all", AARCH64_ANY, NULL},
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{"cortex-a53", AARCH64_FEATURE(AARCH64_ARCH_V8,
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{"cortex-a53", AARCH64_FEATURE (AARCH64_ARCH_V8,
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AARCH64_FEATURE_CRC), "Cortex-A53"},
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AARCH64_FEATURE_CRC), "Cortex-A53"},
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{"cortex-a57", AARCH64_FEATURE(AARCH64_ARCH_V8,
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{"cortex-a57", AARCH64_FEATURE (AARCH64_ARCH_V8,
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AARCH64_FEATURE_CRC), "Cortex-A57"},
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AARCH64_FEATURE_CRC), "Cortex-A57"},
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{"cortex-a72", AARCH64_FEATURE (AARCH64_ARCH_V8,
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{"cortex-a72", AARCH64_FEATURE (AARCH64_ARCH_V8,
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AARCH64_FEATURE_CRC), "Cortex-A72"},
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AARCH64_FEATURE_CRC), "Cortex-A72"},
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{"thunderx", AARCH64_ARCH_V8, "Cavium ThunderX"},
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{"thunderx", AARCH64_ARCH_V8, "Cavium ThunderX"},
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@ -7239,8 +7239,8 @@ static const struct aarch64_cpu_option_table aarch64_cpus[] = {
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tools. */
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tools. */
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{"xgene-1", AARCH64_ARCH_V8, "APM X-Gene 1"},
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{"xgene-1", AARCH64_ARCH_V8, "APM X-Gene 1"},
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{"xgene1", AARCH64_ARCH_V8, "APM X-Gene 1"},
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{"xgene1", AARCH64_ARCH_V8, "APM X-Gene 1"},
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{"xgene2", AARCH64_FEATURE(AARCH64_ARCH_V8,
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{"xgene2", AARCH64_FEATURE (AARCH64_ARCH_V8,
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AARCH64_FEATURE_CRC), "APM X-Gene 2"},
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AARCH64_FEATURE_CRC), "APM X-Gene 2"},
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{"generic", AARCH64_ARCH_V8, NULL},
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{"generic", AARCH64_ARCH_V8, NULL},
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{NULL, AARCH64_ARCH_NONE, NULL}
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{NULL, AARCH64_ARCH_NONE, NULL}
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