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https://github.com/espressif/binutils-gdb.git
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Enable Intel MOVDIRI, MOVDIR64B instructions.
gas/
* config/tc-i386.c (cpu_arch): Add .movdir, .movdir64b.
(cpu_noarch): Likewise.
(process_suffix): Add check for register size.
* doc/c-i386.texi: Document movdiri, movdir64b.
* testsuite/gas/i386/i386.exp: Run MOVDIR{I,64B} tests.
* testsuite/gas/i386/movdir-intel.d: New test.
* testsuite/gas/i386/movdir.d: Likewise.
* testsuite/gas/i386/movdir.s: Likewise.
* testsuite/gas/i386/movdir64b-reg.s: Likewise.
* testsuite/gas/i386/movdir64b-reg.l: Likewise.
* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
* testsuite/gas/i386/x86-64-movdir.d: Likewise.
* testsuite/gas/i386/x86-64-movdir.s: Likewise.
* testsuite/gas/i386/x86-64-movdir64b-reg.s: Likewise.
* testsuite/gas/i386/x86-64-movdir64b-reg.l: Likewise.
opcodes/
* i386-dis.c (enum): Add PREFIX_0F38F8, PREFIX_0F38F9.
(prefix_table): New instructions (see prefix above).
Add Gva macro and handling in OP_G.
* i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
CPU_MOVDIR64B_FLAGS.
(cpu_flags): Likewise.
(opcode_modifiers): Add AddrPrefixOpReg.
(i386_opcode_modifier): Likewise.
* i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
(i386_cpu_flags): Likewise.
* i386-opc.tbl: Add movidir{i,64b}.
* i386-init.h: Regenerate.
* i386-tbl.h: Likewise.
This commit is contained in:
Igor Tsimbalist
@ -1,3 +1,21 @@
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2018-04-26 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
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* i386-dis.c (enum): Add PREFIX_0F38F8, PREFIX_0F38F9,
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MOD_0F38F8_PREFIX_2, MOD_0F38F9_PREFIX_0.
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(prefix_table): New instructions (see prefix above).
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(mod_table): New instructions (see prefix above).
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Add Gva macro and handle in OP_G.
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* i386-gen.c (cpu_flag_init): Add CPU_MOVDIRI_FLAGS,
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CPU_MOVDIR64B_FLAGS.
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(cpu_flags): Likewise.
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(opcode_modifiers): Add AddrPrefixOpReg.
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(i386_opcode_modifier): Likewise.
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* i386-opc.h (enum): Add CpuMOVDIRI, CpuMOVDIR64B.
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(i386_cpu_flags): Likewise.
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* i386-opc.tbl: Add movidir{i,64b}.
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* i386-init.h: Regenerate.
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* i386-tbl.h: Likewise.
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2018-04-26 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl: Fold various non-memory operand AVX512VL
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@ -281,6 +281,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define Gd { OP_G, d_mode }
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#define Gdq { OP_G, dq_mode }
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#define Gm { OP_G, m_mode }
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#define Gva { OP_G, va_mode }
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#define Gw { OP_G, w_mode }
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#define Rd { OP_R, d_mode }
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#define Rdq { OP_R, dq_mode }
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@ -835,6 +836,8 @@ enum
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MOD_0F382A_PREFIX_2,
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MOD_0F38F5_PREFIX_2,
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MOD_0F38F6_PREFIX_0,
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MOD_0F38F8_PREFIX_2,
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MOD_0F38F9_PREFIX_0,
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MOD_62_32BIT,
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MOD_C4_32BIT,
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MOD_C5_32BIT,
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@ -1081,6 +1084,8 @@ enum
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PREFIX_0F38F1,
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PREFIX_0F38F5,
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PREFIX_0F38F6,
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PREFIX_0F38F8,
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PREFIX_0F38F9,
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PREFIX_0F3A08,
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PREFIX_0F3A09,
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PREFIX_0F3A0A,
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@ -4680,6 +4685,18 @@ static const struct dis386 prefix_table[][4] = {
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{ Bad_Opcode },
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},
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/* PREFIX_0F38F8 */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ MOD_TABLE (MOD_0F38F8_PREFIX_2) },
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},
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/* PREFIX_0F38F9 */
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{
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{ MOD_TABLE (MOD_0F38F9_PREFIX_0) },
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},
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/* PREFIX_0F3A08 */
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{
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{ Bad_Opcode },
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@ -7444,8 +7461,8 @@ static const struct dis386 three_byte_table[][256] = {
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{ PREFIX_TABLE (PREFIX_0F38F6) },
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{ Bad_Opcode },
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/* f8 */
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ PREFIX_TABLE (PREFIX_0F38F8) },
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{ PREFIX_TABLE (PREFIX_0F38F9) },
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ Bad_Opcode },
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@ -11836,6 +11853,14 @@ static const struct dis386 mod_table[][2] = {
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/* MOD_0F38F6_PREFIX_0 */
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{ "wrssK", { M, Gdq }, PREFIX_OPCODE },
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},
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{
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/* MOD_0F38F8_PREFIX_2 */
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{ "movdir64b", { Gva, M }, PREFIX_OPCODE },
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},
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{
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/* MOD_0F38F9_PREFIX_0 */
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{ "movdiri", { Em, Gm }, PREFIX_OPCODE },
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},
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{
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/* MOD_62_32BIT */
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{ "bound{S|}", { Gv, Ma }, 0 },
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@ -15152,8 +15177,10 @@ OP_E_register (int bytemode, int sizeflag)
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names = (address_mode == mode_64bit
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? names64 : names32);
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if (!(prefixes & PREFIX_ADDR))
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names = (address_mode == mode_16bit
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? names16 : names);
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{
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if (address_mode == mode_16bit)
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names = names16;
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}
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else
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{
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/* Remove "addr16/addr32". */
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@ -15652,6 +15679,7 @@ static void
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OP_G (int bytemode, int sizeflag)
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{
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int add = 0;
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const char **names;
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USED_REX (REX_R);
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if (rex & REX_R)
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add += 8;
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@ -15700,6 +15728,24 @@ OP_G (int bytemode, int sizeflag)
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used_prefixes |= (prefixes & PREFIX_DATA);
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}
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break;
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case va_mode:
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names = (address_mode == mode_64bit
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? names64 : names32);
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if (!(prefixes & PREFIX_ADDR))
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{
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if (address_mode == mode_16bit)
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names = names16;
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}
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else
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{
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/* Remove "addr16/addr32". */
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all_prefixes[last_addr_prefix] = 0;
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names = (address_mode != mode_32bit
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? names32 : names16);
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used_prefixes |= PREFIX_ADDR;
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}
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oappend (names[modrm.reg + add]);
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break;
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case m_mode:
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if (address_mode == mode_64bit)
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oappend (names64[modrm.reg + add]);
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@ -283,6 +283,10 @@ static initializer cpu_flag_init[] =
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"CpuWAITPKG" },
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{ "CPU_CLDEMOTE_FLAGS",
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"CpuCLDEMOTE" },
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{ "CPU_MOVDIRI_FLAGS",
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"CpuMOVDIRI" },
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{ "CPU_MOVDIR64B_FLAGS",
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"CpuMOVDIR64B" },
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{ "CPU_ANY_X87_FLAGS",
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"CPU_ANY_287_FLAGS|Cpu8087" },
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{ "CPU_ANY_287_FLAGS",
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@ -343,6 +347,10 @@ static initializer cpu_flag_init[] =
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"CpuAVX512_VNNI" },
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{ "CPU_ANY_AVX512_BITALG_FLAGS",
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"CpuAVX512_BITALG" },
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{ "CPU_ANY_MOVDIRI_FLAGS",
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"CpuMOVDIRI" },
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{ "CPU_ANY_MOVDIR64B_FLAGS",
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"CpuMOVDIR64B" },
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};
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static const initializer operand_type_shorthands[] =
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@ -577,6 +585,13 @@ static bitfield cpu_flags[] =
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BITFIELD (CpuPCONFIG),
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BITFIELD (CpuWAITPKG),
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BITFIELD (CpuCLDEMOTE),
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BITFIELD (CpuMOVDIRI),
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BITFIELD (CpuMOVDIR64B),
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BITFIELD (CpuRegMMX),
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BITFIELD (CpuRegXMM),
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BITFIELD (CpuRegYMM),
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BITFIELD (CpuRegZMM),
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BITFIELD (CpuRegMask),
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#ifdef CpuUnused
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BITFIELD (CpuUnused),
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#endif
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@ -619,6 +634,7 @@ static bitfield opcode_modifiers[] =
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BITFIELD (ToDword),
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BITFIELD (ToQword),
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BITFIELD (AddrPrefixOp0),
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BITFIELD (AddrPrefixOpReg),
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BITFIELD (IsPrefix),
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BITFIELD (ImmExt),
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BITFIELD (NoRex64),
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File diff suppressed because it is too large
Load Diff
@ -231,6 +231,20 @@ enum
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CpuWAITPKG,
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/* CLDEMOTE instruction required */
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CpuCLDEMOTE,
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/* MOVDIRI instruction support required */
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CpuMOVDIRI,
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/* MOVDIRR64B instruction required */
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CpuMOVDIR64B,
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/* MMX register support required */
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CpuRegMMX,
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/* XMM register support required */
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CpuRegXMM,
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/* YMM register support required */
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CpuRegYMM,
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/* ZMM register support required */
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CpuRegZMM,
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/* Mask register support required */
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CpuRegMask,
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/* 64bit support required */
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Cpu64,
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/* Not supported in the 64bit mode */
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@ -354,6 +368,13 @@ typedef union i386_cpu_flags
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unsigned int cpupconfig:1;
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unsigned int cpuwaitpkg:1;
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unsigned int cpucldemote:1;
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unsigned int cpumovdiri:1;
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unsigned int cpumovdir64b:1;
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unsigned int cpuregmmx:1;
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unsigned int cpuregxmm:1;
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unsigned int cpuregymm:1;
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unsigned int cpuregzmm:1;
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unsigned int cpuregmask:1;
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unsigned int cpu64:1;
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unsigned int cpuno64:1;
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#ifdef CpuUnused
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@ -447,6 +468,8 @@ enum
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ToQword,
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/* Address prefix changes operand 0 */
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AddrPrefixOp0,
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/* Address prefix changes register operand */
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AddrPrefixOpReg,
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/* opcode is a prefix */
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IsPrefix,
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/* instruction has extension in 8 bit imm */
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@ -628,6 +651,7 @@ typedef struct i386_opcode_modifier
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unsigned int todword:1;
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unsigned int toqword:1;
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unsigned int addrprefixop0:1;
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unsigned int addrprefixopreg:1;
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unsigned int isprefix:1;
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unsigned int immext:1;
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unsigned int norex64:1;
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@ -5829,3 +5829,13 @@ umwait, 1, 0xf20fae, 0x6, 2, CpuWAITPKG, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|N
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cldemote, 1, 0x0f1c, 0x0, 2, CpuCLDEMOTE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Anysize|BaseIndex }
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// CLDEMOTE instructions end.
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// MOVDIR[I,64B] instructions.
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movdiri, 2, 0xf38f9, None, 3, CpuMOVDIRI, Modrm|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg32, Dword|Qword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S }
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movdiri, 2, 0xf38f9, None, 3, CpuMOVDIRI|Cpu64, Modrm|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|Rex64, { Reg64, Dword|Qword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S }
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movdir64b, 2, 0x660f38f8, None, 3, CpuMOVDIR64B|CpuNo64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|AddrPrefixOpReg, { Unspecified|ZMMword|BaseIndex|Disp8|Disp32|Disp32S, Reg16|Reg32 }
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movdir64b, 2, 0x660f38f8, None, 3, CpuMOVDIR64B|Cpu64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64|AddrPrefixOpReg, { Unspecified|ZMMword|BaseIndex|Disp8|Disp32|Disp32S, Reg32|Reg64 }
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// MOVEDIR instructions end.
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29952
opcodes/i386-tbl.h
29952
opcodes/i386-tbl.h
File diff suppressed because it is too large
Load Diff
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