espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-19 09:14:14 +08:00
Code Issues Packages Projects Releases Wiki Activity

opcodes/

Browse Source 
* aarch64-opc.c (print_register_offset_address): Call
	get_int_reg_name to prepare the register name.

gas/testsuite/

	* gas/aarch64/ldst-reg-reg-offset.s: Add tests.
	* gas/aarch64/ldst-reg-reg-offset.d: Update.
This commit is contained in:
Yufeng Zhang
2014-02-27 14:55:46 +00:00
parent 2fa0369e51
commit a58549dda5
5 changed files with 25 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
opcodes/ChangeLog
View File

@ -1,3 +1,8 @@
2014-02-27 Yufeng Zhang <yufeng.zhang@arm.com>
* aarch64-opc.c (print_register_offset_address): Call
get_int_reg_name to prepare the register name.
2014-02-25 Ilya Tocar <ilya.tocar@intel.com>
* i386-opc.tbl: Remove wrong variant of vcvtps2ph

7
opcodes/aarch64-opc.c
View File

@ -2282,9 +2282,12 @@ print_register_offset_address (char *buf, size_t size,
else
tb[0] = '\0';
snprintf (buf, size, "[%s,%c%d%s]",
snprintf (buf, size, "[%s,%s%s]",
get_64bit_int_reg_name (opnd->addr.base_regno, 1),
wm_p ? 'w' : 'x', opnd->addr.offset.regno, tb);
get_int_reg_name (opnd->addr.offset.regno,
wm_p ? AARCH64_OPND_QLF_W : AARCH64_OPND_QLF_X,
0 /* sp_reg_p */),
tb);
}
/* Generate the string representation of the operand OPNDS[IDX] for OPCODE