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PPC_OPERAND_SIGNOPT range.

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Commit b84bf58a accidentally extended the range of allowed negative
numbers.

	* config/tc-ppc.c (ppc_insert_operand): Trim PPC_OPERAND_SIGNOPT
	allowed negative range.
	* testsuite/gas/ppc/power9.s: Test xxspltib of -128, not -256.
	* testsuite/gas/ppc/power9.d: Update.
This commit is contained in:
Alan Modra
2016-05-18 11:27:56 +09:30
parent dec880ee27
commit a255f00a28
4 changed files with 14 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
gas/ChangeLog
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@ -1,3 +1,10 @@
2016-05-18 Alan Modra <amodra@gmail.com>
* config/tc-ppc.c (ppc_insert_operand): Trim PPC_OPERAND_SIGNOPT
allowed negative range.
* testsuite/gas/ppc/power9.s: Test xxspltib of -128, not -256.
* testsuite/gas/ppc/power9.d: Update.
2016-05-17 Thomas Preud'homme <thomas.preudhomme@arm.com> 2016-05-17 Thomas Preud'homme <thomas.preudhomme@arm.com>
* testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when * testsuite/gas/arm/archv8m-cmse-msr-base.d: Force Thumb when

12
gas/config/tc-ppc.c
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@ -1787,17 +1787,15 @@ ppc_insert_operand (unsigned long insn,
if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0) if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
{ {
/* Extend the allowed range for addis to [-65536, 65535]. /* Extend the allowed range for addis to [-32768, 65535].
Similarly for some VLE high part insns. For 64-bit it Similarly for cmpli and some VLE high part insns. For 64-bit
would be good to disable this for signed fields since the it would be good to disable this for signed fields since the
value is sign extended into the high 32 bits of the register. value is sign extended into the high 32 bits of the register.
If the value is, say, an address, then we might care about If the value is, say, an address, then we might care about
the high bits. However, gcc as of 2014-06 uses unsigned the high bits. However, gcc as of 2014-06 uses unsigned
values when loading the high part of 64-bit constants using values when loading the high part of 64-bit constants using
lis. lis. */
Use the same extended range for cmpli, to allow at least min = ~(max >> 1) & -right;
[-32768, 65535]. */
min = ~max & -right;
} }
else if ((operand->flags & PPC_OPERAND_SIGNED) != 0) else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
{ {

2
gas/testsuite/gas/ppc/power9.d
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@ -140,7 +140,7 @@ Disassembly of section \.text:
.*: (f0 80 2a 94|94 2a 80 f0) xxextractuw vs4,vs5,0 .*: (f0 80 2a 94|94 2a 80 f0) xxextractuw vs4,vs5,0
.*: (f1 0f 92 97|97 92 0f f1) xxextractuw vs40,vs50,15 .*: (f1 0f 92 97|97 92 0f f1) xxextractuw vs40,vs50,15
.*: (f0 80 02 d0|d0 02 80 f0) xxspltib vs4,0 .*: (f0 80 02 d0|d0 02 80 f0) xxspltib vs4,0
.*: (f0 80 02 d0|d0 02 80 f0) xxspltib vs4,0 .*: (f0 84 02 d0|d0 02 84 f0) xxspltib vs4,128
.*: (f1 27 fa d1|d1 fa 27 f1) xxspltib vs41,255 .*: (f1 27 fa d1|d1 fa 27 f1) xxspltib vs41,255
.*: (f1 27 fa d1|d1 fa 27 f1) xxspltib vs41,255 .*: (f1 27 fa d1|d1 fa 27 f1) xxspltib vs41,255
.*: (f0 a0 32 d4|d4 32 a0 f0) xxinsertw vs5,vs6,0 .*: (f0 a0 32 d4|d4 32 a0 f0) xxinsertw vs5,vs6,0

2
gas/testsuite/gas/ppc/power9.s
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@ -131,7 +131,7 @@ power9:
xxextractuw 4,5,0x0 xxextractuw 4,5,0x0
xxextractuw 40,50,0xf xxextractuw 40,50,0xf
xxspltib 4,0x0 xxspltib 4,0x0
xxspltib 4,-256 xxspltib 4,-128
xxspltib 41,255 xxspltib 41,255
xxspltib 41,-1 xxspltib 41,-1
xxinsertw 5,6,0 xxinsertw 5,6,0