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[AArch64][5/8] GAS support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC

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2015-08-11  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
  BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers.
  (md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
  (aarch64_force_relocation): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise.
  * gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file.
  * gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
This commit is contained in:
Jiong Wang
2015-08-11 17:15:56 +01:00
parent 56a2e4507a
commit a12fad50d2
12 changed files with 90 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
bfd/ChangeLog
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@ -1,3 +1,11 @@
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC): New entry.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elfnn-aarch64.c (elfNN_aarch64_howto_table): New entry for
BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
2015-08-11 Jiong Wang <jiong.wang@arm.com> 2015-08-11 Jiong Wang <jiong.wang@arm.com>
* elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize * elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize

5
bfd/bfd-in2.h
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@ -5794,6 +5794,11 @@ BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21. */
/* AArch64 TLS INITIAL EXEC relocation. */ /* AArch64 TLS INITIAL EXEC relocation. */
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19, BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19,
/* Unsigned 12 bit byte offset to global offset table entry for a symbols
tls_index structure. Used in conjunction with
BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21. */
BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC,
/* GOT entry page address for AArch64 TLS Local Dynamic, used with ADRP /* GOT entry page address for AArch64 TLS Local Dynamic, used with ADRP
instruction. */ instruction. */
BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21, BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21,

15
bfd/elfnn-aarch64.c
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@ -1026,6 +1026,21 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
0x1ffffc, /* dst_mask */ 0x1ffffc, /* dst_mask */
FALSE), /* pcrel_offset */ FALSE), /* pcrel_offset */
/* ADD: GOT offset G(S) & 0xff8 [no overflow check] */
HOWTO (AARCH64_R (TLSLD_ADD_LO12_NC), /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
12, /* bitsize */
FALSE, /* pc_relative */
0, /* bitpos */
complain_overflow_dont, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
AARCH64_R_STR (TLSLD_ADD_LO12_NC), /* name */
FALSE, /* partial_inplace */
0xfff, /* src_mask */
0xfff, /* dst_mask */
FALSE), /* pcrel_offset */
/* Get to the page for the GOT entry for the symbol /* Get to the page for the GOT entry for the symbol
(G(S) - P) using an ADRP instruction. */ (G(S) - P) using an ADRP instruction. */
HOWTO (AARCH64_R (TLSLD_ADR_PAGE21), /* type */ HOWTO (AARCH64_R (TLSLD_ADR_PAGE21), /* type */

1
bfd/libbfd.h
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@ -2759,6 +2759,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC", "BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC",
"BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC", "BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC",
"BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19", "BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19",
"BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC",
"BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21", "BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21",
"BFD_RELOC_AARCH64_TLSLD_ADR_PREL21", "BFD_RELOC_AARCH64_TLSLD_ADR_PREL21",
"BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2", "BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2",

6
bfd/reloc.c
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@ -6843,6 +6843,12 @@ ENUM
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
ENUMDOC ENUMDOC
AArch64 TLS INITIAL EXEC relocation. AArch64 TLS INITIAL EXEC relocation.
ENUM
BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
ENUMDOC
Unsigned 12 bit byte offset to global offset table entry for a symbols
tls_index structure. Used in conjunction with
BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
ENUM ENUM
BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
ENUMDOC ENUMDOC

6
gas/ChangeLog
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@ -1,3 +1,9 @@
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* config/tc-aarch64.c (reloc_table): New relocation modifiers.
(md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC.
(aarch64_force_relocation): Likewise.
2015-08-11 Jiong Wang <jiong.wang@arm.com> 2015-08-11 Jiong Wang <jiong.wang@arm.com>
* config/tc-aarch64.c (reloc_table): New relocation modifiers. * config/tc-aarch64.c (reloc_table): New relocation modifiers.

11
gas/config/tc-aarch64.c
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@ -2513,6 +2513,15 @@ static struct reloc_table_entry reloc_table[] = {
0, 0,
0}, 0},
/* 12 bit offset into the page containing GOT TLS entry for a symbol */
{"tlsldm_lo12_nc", 0,
0, /* adr_type */
0,
0,
BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC,
0,
0},
/* Get to the page containing GOT TLS entry for a symbol */ /* Get to the page containing GOT TLS entry for a symbol */
{"gottprel", 0, {"gottprel", 0,
0, /* adr_type */ 0, /* adr_type */
@ -6778,6 +6787,7 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19: case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21: case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21: case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12: case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
@ -6989,6 +6999,7 @@ aarch64_force_relocation (struct fix *fixp)
case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC: case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19: case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21: case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21: case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12: case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:

7
gas/testsuite/ChangeLog
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@ -1,3 +1,10 @@
2015-08-11 Jiong Wang <jiong.wang@arm.com>
* gas/aarch64/reloc-tlsldm_lo12_nc-1.s: New testcase.
* gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s: Likewise.
* gas/aarch64/reloc-tlsldm_lo12_nc-1.d: New expectation file.
* gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d: Likewise.
2015-08-11 Jiong Wang <jiong.wang@arm.com> 2015-08-11 Jiong Wang <jiong.wang@arm.com>
* gas/aarch64/reloc-tlsldm-page-1.s: New testcase. * gas/aarch64/reloc-tlsldm-page-1.s: New testcase.

10
gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.d Normal file
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@ -0,0 +1,10 @@
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
0000000000000000 <.*>:
0: 91000000 add x0, x0, #0x0
0: R_AARCH64_TLSLD_ADD_LO12_NC x

5
gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-1.s Normal file
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@ -0,0 +1,5 @@
// Test file for AArch64 GAS -- reloc 519
func:
// BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
add x0, x0, #:tlsldm_lo12_nc:x

11
gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.d Normal file
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@ -0,0 +1,11 @@
#as: -mabi=ilp32
#objdump: -dr
.*: file format .*
Disassembly of section \.text:
00000000 <.*>:
0: 91000000 add x0, x0, #0x0
0: R_AARCH64_P32_TLSLD_ADD_LO12_NC x

5
gas/testsuite/gas/aarch64/reloc-tlsldm_lo12_nc-ilp32-1.s Normal file
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@ -0,0 +1,5 @@
// Test file for AArch64 GAS -- reloc 85
func:
// BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
add x0, x0, #:tlsldm_lo12_nc:x