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[AArch64] Add support for Cortex-A35

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This patch adds support to the AArch64 back-end for the Cortex-A35
processor, as recently announced by ARM. The ARM Cortex-A35 provides
full support for the ARMv8-A architecture, including the CRC extension,
with optional Advanced-SIMD and Floating-Point support. We therefore set
feature flags for this CPU to AARCH64_ARCH_V8 and AARCH64_FEATURE_CRC, in
the same fashion as Cortex-A53 and Cortex-A57.

Tested in a cross environment for AArch64 with no issues.
This commit is contained in:
James Greenhalgh
2015-11-12 12:04:22 +00:00
committed by Marcus Shawcroft
parent 8915a9b7e8
commit 9c352f1c23
3 changed files with 8 additions and 0 deletions
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5
gas/ChangeLog
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@ -1,3 +1,8 @@
2015-11-12 James Greenhalgh <james.greenhalgh@arm.com>
* config/tc-aarch64.c (aarch64_cpus): Add cortex-a35.
* doc/c-aarch64.texi (-mcpu=): Likewise.
2015-11-12 James Greenhalgh <james.greenhalgh@arm.com> 2015-11-12 James Greenhalgh <james.greenhalgh@arm.com>
* config/tc-arm.c (arm_cpus): Likewise. * config/tc-arm.c (arm_cpus): Likewise.

2
gas/config/tc-aarch64.c
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@ -7676,6 +7676,8 @@ struct aarch64_cpu_option_table
recognized by GCC. */ recognized by GCC. */
static const struct aarch64_cpu_option_table aarch64_cpus[] = { static const struct aarch64_cpu_option_table aarch64_cpus[] = {
{"all", AARCH64_ANY, NULL}, {"all", AARCH64_ANY, NULL},
{"cortex-a35", AARCH64_FEATURE (AARCH64_ARCH_V8,
AARCH64_FEATURE_CRC), "Cortex-A35"},
{"cortex-a53", AARCH64_FEATURE (AARCH64_ARCH_V8, {"cortex-a53", AARCH64_FEATURE (AARCH64_ARCH_V8,
AARCH64_FEATURE_CRC), "Cortex-A53"}, AARCH64_FEATURE_CRC), "Cortex-A53"},
{"cortex-a57", AARCH64_FEATURE (AARCH64_ARCH_V8, {"cortex-a57", AARCH64_FEATURE (AARCH64_ARCH_V8,

1
gas/doc/c-aarch64.texi
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@ -55,6 +55,7 @@ file in ELF32 and ELF64 format respectively. The default is @code{lp64}.
This option specifies the target processor. The assembler will issue an error This option specifies the target processor. The assembler will issue an error
message if an attempt is made to assemble an instruction which will not execute message if an attempt is made to assemble an instruction which will not execute
on the target processor. The following processor names are recognized: on the target processor. The following processor names are recognized:
@code{cortex-a35},
@code{cortex-a53}, @code{cortex-a53},
@code{cortex-a57}, @code{cortex-a57},
@code{cortex-a72}, @code{cortex-a72},