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Bye bye PPC_OPCODE_ALTIVEC2

Browse Source 
This bit is worse than useless.  Using it prevents the assembler and
disassembler distinguishing between opcodes added for power8 and those
added for power9.

include/
	* opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete.
opcodes/
	* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_ALTIVEC2.
	* ppc-opc.c (PPCVEC2): Define as PPC_OPCODE_POWER8|PPC_OPCODE_E6500.
	(PPCVEC3): Define as PPC_OPCODE_POWER9.
This commit is contained in:
Alan Modra
2017-04-11 07:33:50 +09:30
parent a5bef50fdb
commit 9a85b496ac
5 changed files with 17 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
include/ChangeLog
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@ -1,3 +1,7 @@
2017-04-11 Alan Modra <amodra@gmail.com>
* opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete.
2017-04-06 Pip Cet <pipcet@gmail.com> 2017-04-06 Pip Cet <pipcet@gmail.com>
* dis-asm.h: Add prototypes for wasm32 disassembler. * dis-asm.h: Add prototypes for wasm32 disassembler.

3
include/opcode/ppc.h
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@ -179,9 +179,6 @@ extern const int vle_num_opcodes;
/* Opcode which is supported by the e500 family */ /* Opcode which is supported by the e500 family */
#define PPC_OPCODE_E500 0x100000000ull #define PPC_OPCODE_E500 0x100000000ull
/* Opcode is supported by Extended Altivec Vector Unit */
#define PPC_OPCODE_ALTIVEC2 0x200000000ull
/* Opcode is supported by Power E6500 */ /* Opcode is supported by Power E6500 */
#define PPC_OPCODE_E6500 0x400000000ull #define PPC_OPCODE_E6500 0x400000000ull

6
opcodes/ChangeLog
View File

@ -1,3 +1,9 @@
2017-04-11 Alan Modra <amodra@gmail.com>
* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_ALTIVEC2.
* ppc-opc.c (PPCVEC2): Define as PPC_OPCODE_POWER8|PPC_OPCODE_E6500.
(PPCVEC3): Define as PPC_OPCODE_POWER9.
2017-04-10 Alan Modra <amodra@gmail.com> 2017-04-10 Alan Modra <amodra@gmail.com>
* ppc-dis.c (ppc_opts <476>): Remove PPC_OPCODE_440. * ppc-dis.c (ppc_opts <476>): Remove PPC_OPCODE_440.

10
opcodes/ppc-dis.c
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@ -147,7 +147,7 @@ struct ppc_mopt ppc_opts[] = {
{ "e6500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL { "e6500", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
| PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
| PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_ALTIVEC
| PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_E6500 | PPC_OPCODE_POWER4 | PPC_OPCODE_E6500 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7), | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7),
0 }, 0 },
{ "e500x2", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE { "e500x2", (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
@ -172,12 +172,12 @@ struct ppc_mopt ppc_opts[] = {
{ "power8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 { "power8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX), | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 }, 0 },
{ "power9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 { "power9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
| PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ), | PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ),
0 }, 0 },
{ "ppc", PPC_OPCODE_PPC, { "ppc", PPC_OPCODE_PPC,
@ -216,12 +216,12 @@ struct ppc_mopt ppc_opts[] = {
{ "pwr8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 { "pwr8", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_HTM
| PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_VSX), | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
0 }, 0 },
{ "pwr9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64 { "pwr9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9 | PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
| PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ), | PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ),
0 }, 0 },
{ "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2, { "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2,

4
opcodes/ppc-opc.c
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@ -3089,8 +3089,8 @@ extract_vleil (unsigned long insn,
#define PPC860 PPC_OPCODE_860 #define PPC860 PPC_OPCODE_860
#define PPCPS PPC_OPCODE_PPCPS #define PPCPS PPC_OPCODE_PPCPS
#define PPCVEC PPC_OPCODE_ALTIVEC #define PPCVEC PPC_OPCODE_ALTIVEC
#define PPCVEC2 PPC_OPCODE_ALTIVEC2 #define PPCVEC2 (PPC_OPCODE_POWER8 | PPC_OPCODE_E6500)
#define PPCVEC3 PPC_OPCODE_ALTIVEC2 #define PPCVEC3 PPC_OPCODE_POWER9
#define PPCVSX PPC_OPCODE_VSX #define PPCVSX PPC_OPCODE_VSX
#define PPCVSX2 PPC_OPCODE_VSX #define PPCVSX2 PPC_OPCODE_VSX
#define PPCVSX3 PPC_OPCODE_VSX3 #define PPCVSX3 PPC_OPCODE_VSX3