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or1k: add support for l.swa/l.lwa atomic instructions

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This adds support for the load-link/store-conditional
l.lwa/l.swa atomic instructions.
The support is added in such way, that the cpu description not
only describes the mnemonics, but also the functionality.

A couple of fixes to typos in nearby/related code are also snuck
into this.

cpu/
	* or1korbis.cpu (h-atomic-reserve): New hardware.
	(h-atomic-address): Likewise.
	(insn-opcode): Add opcodes for LWA and SWA.
	(atomic-reserve): New operand.
	(atomic-address): Likewise.
	(l-lwa, l-swa): New instructions.
	(l-lbs): Fix typo in comment.
	(store-insn): Clear atomic reserve on store to atomic-address.
	Fix register names in fmt field.

opcodes/
	* or1k-desc.c: Regenerated.
	* or1k-desc.h: Likewise.
	* or1k-opc.c: Likewise.
	* or1k-opc.h: Likewise.
	* or1k-opinst.c: Likewise.
This commit is contained in:
Stefan Kristiansson
2014-05-08 08:53:09 +03:00
parent efefdd6362
commit 999b995ddc
8 changed files with 178 additions and 49 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
opcodes/or1k-opc.c
View File

@ -88,7 +88,11 @@ static const CGEN_IFMT ifmt_l_lwz ATTRIBUTE_UNUSED = {
};
static const CGEN_IFMT ifmt_l_sw ATTRIBUTE_UNUSED = {
32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R1) }, { F (F_R3) }, { F (F_SIMM16_SPLIT) }, { 0 } }
32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R2) }, { F (F_R3) }, { F (F_SIMM16_SPLIT) }, { 0 } }
};
static const CGEN_IFMT ifmt_l_swa ATTRIBUTE_UNUSED = {
32, 32, 0xfc000000, { { F (F_OPCODE) }, { F (F_R2) }, { F (F_R3) }, { F (F_SIMM16) }, { 0 } }
};
static const CGEN_IFMT ifmt_l_sll ATTRIBUTE_UNUSED = {
@ -276,6 +280,12 @@ static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] =
{ { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } },
& ifmt_l_lwz, { 0x88000000 }
},
/* l.lwa $rD,${simm16}($rA) */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (RD), ',', OP (SIMM16), '(', OP (RA), ')', 0 } },
& ifmt_l_lwz, { 0x6c000000 }
},
/* l.lbz $rD,${simm16}($rA) */
{
{ 0, 0, 0, 0 },
@ -318,6 +328,12 @@ static const CGEN_OPCODE or1k_cgen_insn_opcode_table[MAX_INSNS] =
{ { MNEM, ' ', OP (SIMM16_SPLIT), '(', OP (RA), ')', ',', OP (RB), 0 } },
& ifmt_l_sw, { 0xdc000000 }
},
/* l.swa ${simm16-split}($rA),$rB */
{
{ 0, 0, 0, 0 },
{ { MNEM, ' ', OP (SIMM16_SPLIT), '(', OP (RA), ')', ',', OP (RB), 0 } },
& ifmt_l_swa, { 0xcc000000 }
},
/* l.sll $rD,$rA,$rB */
{
{ 0, 0, 0, 0 },