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* config/tc-m68hc11.h (LISTING_HEADER): Use m68hc11_listing_header

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function to select the header according to the cpu.
	(md_after_pass_hook, md_do_align): Remove.
	(md_cleanup, m68hc11_cleanup): Remove.
	(md_pcrel_from_section): Declare.
	* config/tc-m68hc11.c (build_dbranch_insn): Remove insn_size.
	(build_jump_insn, build_insn): Likewise.
	(m68hc11_listing_header): New function.
	(m68hc11_cleanup): Remove.
This commit is contained in:
Stephane Carrez
2001-02-04 13:58:30 +00:00
parent 4f69f9744a
commit 986c6f4ba0
3 changed files with 44 additions and 39 deletions

12
gas/ChangeLog

@ -1,3 +1,15 @@
2001-02-04 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* config/tc-m68hc11.h (LISTING_HEADER): Use m68hc11_listing_header
function to select the header according to the cpu.
(md_after_pass_hook, md_do_align): Remove.
(md_cleanup, m68hc11_cleanup): Remove.
(md_pcrel_from_section): Declare.
* config/tc-m68hc11.c (build_dbranch_insn): Remove insn_size.
(build_jump_insn, build_insn): Likewise.
(m68hc11_listing_header): New function.
(m68hc11_cleanup): Remove.
2001-02-02 Stephane Carrez <Stephane.Carrez@worldnet.fr> 2001-02-02 Stephane Carrez <Stephane.Carrez@worldnet.fr>
* config/tc-m68hc11.c (relaxable_symbol): Relax externally visible * config/tc-m68hc11.c (relaxable_symbol): Relax externally visible

47
gas/config/tc-m68hc11.c

@ -226,6 +226,8 @@ const pseudo_typeS md_pseudo_table[] = {
{"fdb", cons, 2}, {"fdb", cons, 2},
{"fcc", stringer, 1}, {"fcc", stringer, 1},
{"rmb", s_space, 0}, {"rmb", s_space, 0},
/* Dwarf2 support for Gcc. */
{"file", dwarf2_directive_file, 0}, {"file", dwarf2_directive_file, 0},
{"loc", dwarf2_directive_loc, 0}, {"loc", dwarf2_directive_loc, 0},
@ -288,6 +290,16 @@ m68hc11_mach ()
return 0; return 0;
} }
/* Listing header selected according to cpu. */
const char *
m68hc11_listing_header ()
{
if (current_architecture & cpu6811)
return "M68HC11 GAS ";
else
return "M68HC12 GAS ";
}
void void
md_show_usage (stream) md_show_usage (stream)
FILE *stream; FILE *stream;
@ -371,7 +383,7 @@ md_parse_option (c, arg)
get_default_target (); get_default_target ();
switch (c) switch (c)
{ {
/* -S means keep external to 2 bits offset rather than 16 bits one. */ /* -S means keep external to 2 bit offset rather than 16 bit one. */
case OPTION_SHORT_BRANCHS: case OPTION_SHORT_BRANCHS:
case 'S': case 'S':
flag_fixed_branchs = 1; flag_fixed_branchs = 1;
@ -1198,7 +1210,7 @@ check_range (num, mode)
if (mode & M6812_AUTO_INC_DEC) if (mode & M6812_AUTO_INC_DEC)
return (num != 0 && num <= 8 && num >= -8); return (num != 0 && num <= 8 && num >= -8);
/* The 68HC12 supports 5, 9 and 16-bits offsets. */ /* The 68HC12 supports 5, 9 and 16-bit offsets. */
if (mode & (M6812_INDEXED_IND | M6812_INDEXED | M6812_OP_IDX)) if (mode & (M6812_INDEXED_IND | M6812_INDEXED | M6812_OP_IDX))
mode = M6811_OP_IND16; mode = M6811_OP_IND16;
@ -1307,7 +1319,7 @@ fixup8 (oper, mode, opmode)
} }
} }
/* Put a 2 bytes expression described by 'oper'. If this expression contains /* Put a 2 byte expression described by 'oper'. If this expression contains
unresolved symbols, generate a 16-bit fixup. */ unresolved symbols, generate a 16-bit fixup. */
static void static void
fixup16 (oper, mode, opmode) fixup16 (oper, mode, opmode)
@ -1392,7 +1404,6 @@ build_jump_insn (opcode, operands, nb_operands, jmp_mode)
int jmp_mode; int jmp_mode;
{ {
unsigned char code; unsigned char code;
int insn_size;
char *f; char *f;
unsigned long n; unsigned long n;
@ -1403,7 +1414,6 @@ build_jump_insn (opcode, operands, nb_operands, jmp_mode)
assert (operands[0].reg1 == REG_NONE && operands[0].reg2 == REG_NONE); assert (operands[0].reg1 == REG_NONE && operands[0].reg2 == REG_NONE);
code = opcode->opcode; code = opcode->opcode;
insn_size = 1;
n = operands[0].exp.X_add_number; n = operands[0].exp.X_add_number;
@ -1527,7 +1537,6 @@ build_dbranch_insn (opcode, operands, nb_operands, jmp_mode)
int jmp_mode; int jmp_mode;
{ {
unsigned char code; unsigned char code;
int insn_size;
char *f; char *f;
unsigned long n; unsigned long n;
@ -1538,7 +1547,6 @@ build_dbranch_insn (opcode, operands, nb_operands, jmp_mode)
assert (operands[0].reg1 != REG_NONE); assert (operands[0].reg1 != REG_NONE);
code = opcode->opcode & 0x0FF; code = opcode->opcode & 0x0FF;
insn_size = 1;
f = m68hc11_new_insn (1); f = m68hc11_new_insn (1);
number_to_chars_bigendian (f, code, 1); number_to_chars_bigendian (f, code, 1);
@ -1872,7 +1880,6 @@ build_insn (opcode, operands, nb_operands)
{ {
int i; int i;
char *f; char *f;
int insn_size = 1;
long format; long format;
int move_insn = 0; int move_insn = 0;
@ -1892,7 +1899,6 @@ build_insn (opcode, operands, nb_operands)
number_to_chars_bigendian (f, page_code, 1); number_to_chars_bigendian (f, page_code, 1);
f++; f++;
insn_size = 2;
} }
else else
f = m68hc11_new_insn (1); f = m68hc11_new_insn (1);
@ -1908,13 +1914,13 @@ build_insn (opcode, operands, nb_operands)
move_insn = 1; move_insn = 1;
if (format & M6812_OP_IDX) if (format & M6812_OP_IDX)
{ {
insn_size += build_indexed_byte (&operands[0], format, 1); build_indexed_byte (&operands[0], format, 1);
i = 1; i = 1;
format &= ~M6812_OP_IDX; format &= ~M6812_OP_IDX;
} }
if (format & M6812_OP_IDX_P2) if (format & M6812_OP_IDX_P2)
{ {
insn_size += build_indexed_byte (&operands[1], format, 1); build_indexed_byte (&operands[1], format, 1);
i = 0; i = 0;
format &= ~M6812_OP_IDX_P2; format &= ~M6812_OP_IDX_P2;
} }
@ -1922,7 +1928,6 @@ build_insn (opcode, operands, nb_operands)
if (format & (M6811_OP_DIRECT | M6811_OP_IMM8)) if (format & (M6811_OP_DIRECT | M6811_OP_IMM8))
{ {
insn_size++;
fixup8 (&operands[i].exp, fixup8 (&operands[i].exp,
format & (M6811_OP_DIRECT | M6811_OP_IMM8 | M6812_OP_TRAP_ID), format & (M6811_OP_DIRECT | M6811_OP_IMM8 | M6812_OP_TRAP_ID),
operands[i].mode); operands[i].mode);
@ -1930,7 +1935,6 @@ build_insn (opcode, operands, nb_operands)
} }
else if (format & (M6811_OP_IMM16 | M6811_OP_IND16)) else if (format & (M6811_OP_IMM16 | M6811_OP_IND16))
{ {
insn_size += 2;
fixup16 (&operands[i].exp, format & (M6811_OP_IMM16 | M6811_OP_IND16), fixup16 (&operands[i].exp, format & (M6811_OP_IMM16 | M6811_OP_IND16),
operands[i].mode); operands[i].mode);
i++; i++;
@ -1942,36 +1946,31 @@ build_insn (opcode, operands, nb_operands)
if ((format & M6811_OP_IY) && (operands[0].reg1 != REG_Y)) if ((format & M6811_OP_IY) && (operands[0].reg1 != REG_Y))
as_bad (_("Invalid indexed register, expecting register Y.")); as_bad (_("Invalid indexed register, expecting register Y."));
insn_size++;
fixup8 (&operands[0].exp, M6811_OP_IX, operands[0].mode); fixup8 (&operands[0].exp, M6811_OP_IX, operands[0].mode);
i = 1; i = 1;
} }
else if (format & else if (format &
(M6812_OP_IDX | M6812_OP_IDX_2 | M6812_OP_IDX_1 | M6812_OP_D_IDX)) (M6812_OP_IDX | M6812_OP_IDX_2 | M6812_OP_IDX_1 | M6812_OP_D_IDX))
{ {
insn_size += build_indexed_byte (&operands[i], format, move_insn); build_indexed_byte (&operands[i], format, move_insn);
i++; i++;
} }
else if (format & M6812_OP_REG && current_architecture & cpu6812) else if (format & M6812_OP_REG && current_architecture & cpu6812)
{ {
insn_size += build_reg_mode (&operands[i], format); build_reg_mode (&operands[i], format);
i++; i++;
} }
if (format & M6811_OP_BITMASK) if (format & M6811_OP_BITMASK)
{ {
insn_size++;
fixup8 (&operands[i].exp, M6811_OP_BITMASK, operands[i].mode); fixup8 (&operands[i].exp, M6811_OP_BITMASK, operands[i].mode);
i++; i++;
} }
if (format & M6811_OP_JUMP_REL) if (format & M6811_OP_JUMP_REL)
{ {
insn_size++;
fixup8 (&operands[i].exp, M6811_OP_JUMP_REL, operands[i].mode); fixup8 (&operands[i].exp, M6811_OP_JUMP_REL, operands[i].mode);
i++;
} }
else if (format & M6812_OP_IND16_P2) else if (format & M6812_OP_IND16_P2)
{ {
insn_size += 2;
fixup16 (&operands[1].exp, M6811_OP_IND16, operands[1].mode); fixup16 (&operands[1].exp, M6811_OP_IND16, operands[1].mode);
} }
} }
@ -2288,7 +2287,7 @@ md_assemble (str)
} }
/* Identify a possible instruction alias. There are some on the /* Identify a possible instruction alias. There are some on the
68HC12 to emulate a fiew 68HC11 instructions. */ 68HC12 to emulate a few 68HC11 instructions. */
if (opc == NULL && (current_architecture & cpu6812)) if (opc == NULL && (current_architecture & cpu6812))
{ {
int i; int i;
@ -2809,9 +2808,3 @@ md_apply_fix (fixp, valuep)
return 0; return 0;
} }
int
m68hc11_cleanup ()
{
return 1;
}

24
gas/config/tc-m68hc11.h

@ -1,5 +1,5 @@
/* tc-m68hc11.h -- Header file for tc-m68hc11.c. /* tc-m68hc11.h -- Header file for tc-m68hc11.c.
Copyright (C) 1999, 2000 Free Software Foundation, Inc. Copyright (C) 1999, 2000, 2001 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler. This file is part of GAS, the GNU Assembler.
@ -21,6 +21,10 @@
#define TC_M68HC11 #define TC_M68HC11
#define TC_M68HC12 #define TC_M68HC12
#ifdef ANSI_PROTOTYPES
struct fix;
#endif
/* Define TC_M68K so that we can use the MRI mode. */ /* Define TC_M68K so that we can use the MRI mode. */
#define TC_M68K #define TC_M68K
@ -63,21 +67,23 @@ extern const char *m68hc11_arch_format PARAMS ((void));
#define LISTING_LHS_WIDTH 4 /* One word on the first line */ #define LISTING_LHS_WIDTH 4 /* One word on the first line */
#define LISTING_LHS_WIDTH_SECOND 4 /* One word on the second line */ #define LISTING_LHS_WIDTH_SECOND 4 /* One word on the second line */
#define LISTING_LHS_CONT_LINES 4 /* And 4 lines max */ #define LISTING_LHS_CONT_LINES 4 /* And 4 lines max */
#define LISTING_HEADER "M68HC11 GAS " #define LISTING_HEADER m68hc11_listing_header ()
extern const char *m68hc11_listing_header PARAMS (());
/* call md_pcrel_from_section, not md_pcrel_from */ /* call md_pcrel_from_section, not md_pcrel_from */
#define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section(FIXP, SEC) #define MD_PCREL_FROM_SECTION(FIXP, SEC) md_pcrel_from_section(FIXP, SEC)
extern long md_pcrel_from_section PARAMS ((struct fix *fixp, segT sec));
/* Permit temporary numeric labels. */ /* Permit temporary numeric labels. */
#define LOCAL_LABELS_FB 1 #define LOCAL_LABELS_FB 1
#define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs */ #define DIFF_EXPR_OK /* .-foo gets turned into PC relative relocs */
extern void m68hc11_init_after_args PARAMS ((void));
#define tc_init_after_args m68hc11_init_after_args #define tc_init_after_args m68hc11_init_after_args
extern void m68hc11_init_after_args PARAMS ((void));
extern int m68hc11_parse_long_option PARAMS ((char *));
#define md_parse_long_option m68hc11_parse_long_option #define md_parse_long_option m68hc11_parse_long_option
extern int m68hc11_parse_long_option PARAMS ((char *));
#define DWARF2_LINE_MIN_INSN_LENGTH 1 #define DWARF2_LINE_MIN_INSN_LENGTH 1
@ -88,19 +94,13 @@ extern int m68hc11_parse_long_option PARAMS ((char *));
/* Relax table to translate short relative branches (-128..127) into /* Relax table to translate short relative branches (-128..127) into
absolute branches. */ absolute branches. */
extern struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table #define TC_GENERIC_RELAX_TABLE md_relax_table
extern struct relax_type md_relax_table[];
extern int m68hc11_cleanup PARAMS ((void));
#define md_operand(x) #define md_operand(x)
#define md_after_pass_hook() m68hc11_cleanup()
#define md_cleanup() m68hc11_cleanup()
#define md_do_align(a,b,c,d,e) m68hc11_cleanup()
#define tc_frob_label(sym) do {\ #define tc_frob_label(sym) do {\
m68hc11_cleanup(); \
S_SET_VALUE (sym, (valueT) frag_now_fix ()); \ S_SET_VALUE (sym, (valueT) frag_now_fix ()); \
} while (0) } while (0)
#define tc_print_statistics m68hc11_print_statistics #define tc_print_statistics(FILE) m68hc11_print_statistics (FILE)
extern void m68hc11_print_statistics PARAMS ((FILE *)); extern void m68hc11_print_statistics PARAMS ((FILE *));