espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-10-15 20:05:46 +08:00
Code Issues Packages Projects Releases Wiki Activity

[include/opcode/]

Browse Source 
* mips.h: Update comment for new opcodes.
	(OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
	(OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
	(INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
	(CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
	(OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
	Don't match CPU_R4111 with INSN_4100.

[opcodes/]
	* mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
	(mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
	and bfd_mach_mips5500.
	* mips-opc.c (V1): Include INSN_4111 and INSN_4120.
	(N411, N412, N5, N54, N55): New convenience defines.
	(mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
	Change dmadd16 and madd16 from V1 to N411.
This commit is contained in:
Richard Sandiford
2002-09-30 11:58:10 +00:00
parent 00707a0e89
commit 9752cf1b67
5 changed files with 218 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
opcodes/mips-dis.c
View File

@ -110,6 +110,8 @@ print_insn_arg (d, l, pc, info)
case ',':
case '(':
case ')':
case '[':
case ']':
(*info->fprintf_func) (info->stream, "%c", *d);
break;
@ -279,6 +281,16 @@ print_insn_arg (d, l, pc, info)
(l >> OP_SH_PERFREG) & OP_MASK_PERFREG);
break;
case 'e':
(*info->fprintf_func) (info->stream, "%d",
(l >> OP_SH_VECBYTE) & OP_MASK_VECBYTE);
break;
case '%':
(*info->fprintf_func) (info->stream, "%d",
(l >> OP_SH_VECALIGN) & OP_MASK_VECALIGN);
break;
case 'H':
(*info->fprintf_func) (info->stream, "%d",
(l >> OP_SH_SEL) & OP_MASK_SEL);
@ -374,6 +386,10 @@ mips_isa_type (mach, isa, cputype)
*cputype = CPU_R4111;
*isa = ISA_MIPS3;
break;
case bfd_mach_mips4120:
*cputype = CPU_VR4120;
*isa = ISA_MIPS3;
break;
case bfd_mach_mips4300:
*cputype = CPU_R4300;
*isa = ISA_MIPS3;
@ -394,6 +410,14 @@ mips_isa_type (mach, isa, cputype)
*cputype = CPU_R5000;
*isa = ISA_MIPS4;
break;
case bfd_mach_mips5400:
*cputype = CPU_VR5400;
*isa = ISA_MIPS4;
break;
case bfd_mach_mips5500:
*cputype = CPU_VR5500;
*isa = ISA_MIPS4;
break;
case bfd_mach_mips6000:
*cputype = CPU_R6000;
*isa = ISA_MIPS2;