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aarch64: [SME] Add SME instructions
Patch is adding new SME matrix instructions. Please note additional instructions will be added in following patches. gas/ChangeLog: * config/tc-aarch64.c (parse_sme_zada_operand): New parser. * config/tc-aarch64.c (parse_reg_with_qual): New reg parser. * config/tc-aarch64.c (R_ZA): New egister type. (parse_operands): New parser. * testsuite/gas/aarch64/sme-illegal.d: New test. * testsuite/gas/aarch64/sme-illegal.l: New test. * testsuite/gas/aarch64/sme-illegal.s: New test. * testsuite/gas/aarch64/sme.d: New test. * testsuite/gas/aarch64/sme.s: New test. * testsuite/gas/aarch64/sme-f64.d: New test. * testsuite/gas/aarch64/sme-f64.s: New test. * testsuite/gas/aarch64/sme-i64.d: New test. * testsuite/gas/aarch64/sme-i64.s: New test. include/ChangeLog: * opcode/aarch64.h (enum aarch64_opnd): New operands AARCH64_OPND_SME_ZAda_2b, AARCH64_OPND_SME_ZAda_3b and AARCH64_OPND_SME_Pm. (enum aarch64_insn_class): New instruction class sme_misc. opcodes/ChangeLog: * aarch64-opc.c (aarch64_print_operand): Print OPND_SME_ZAda_2b and OPND_SME_ZAda_3b operands. (verify_constraints): Handle OPND_SME_Pm. * aarch64-opc.h (enum aarch64_field_kind): New bit fields FLD_SME_ZAda_2b, FLD_SME_ZAda_3b and FLD_SME_Pm. * aarch64-tbl.h (OP_SME_ZADA_PN_PM_ZN_S): New qualifier set. (OP_SME_ZADA_PN_PM_ZN_D): New qualifier. (OP_SME_ZADA_PN_PM_ZN_ZM): New qualifier. (OP_SME_ZADA_S_PM_PM_S_S): New qualifier. (OP_SME_ZADA_D_PM_PM_D_D): New qualifier. (OP_SME_ZADA_S_PM_PM_H_H): New qualifier. (OP_SME_ZADA_S_PM_PM_B_B): New qualifier. (OP_SME_ZADA_D_PM_PM_H_H): New qualifier. (SME_INSN): New instruction macro. (SME_F64_INSN): New instruction macro. (SME_I64_INSN): New instruction macro. (SME_INSNC): New instruction macro. (struct aarch64_opcode): New SME instructions. aarch64-asm-2.c: Regenerate. aarch64-dis-2.c: Regenerate. aarch64-opc-2.c: Regenerate.
This commit is contained in:
Przemyslaw Wirkus
@ -278,6 +278,7 @@ struct reloc_entry
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BASIC_REG_TYPE(VN) /* v[0-31] */ \
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BASIC_REG_TYPE(ZN) /* z[0-31] */ \
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BASIC_REG_TYPE(PN) /* p[0-15] */ \
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BASIC_REG_TYPE(ZA) /* za[0-15] */ \
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/* Typecheck: any 64-bit int reg (inc SP exc XZR). */ \
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MULTI_REG_TYPE(R64_SP, REG_TYPE(R_64) | REG_TYPE(SP_64)) \
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/* Typecheck: same, plus SVE registers. */ \
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@ -4164,6 +4165,117 @@ parse_bti_operand (char **str,
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return 0;
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}
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/* Parse STR for reg of REG_TYPE and following '.' and QUALIFIER.
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Function returns REG_ENTRY struct and QUALIFIER [bhsdq] or NULL
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on failure. Format:
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REG_TYPE.QUALIFIER
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Side effect: Update STR with current parse position of success.
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*/
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static const reg_entry *
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parse_reg_with_qual (char **str, aarch64_reg_type reg_type,
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aarch64_opnd_qualifier_t *qualifier)
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{
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char *q;
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reg_entry *reg = parse_reg (str);
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if (reg != NULL && reg->type == reg_type)
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{
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if (!skip_past_char (str, '.'))
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{
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set_syntax_error (_("missing ZA tile element size separator"));
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return NULL;
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}
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q = *str;
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switch (TOLOWER (*q))
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{
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case 'b':
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*qualifier = AARCH64_OPND_QLF_S_B;
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break;
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case 'h':
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*qualifier = AARCH64_OPND_QLF_S_H;
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break;
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case 's':
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*qualifier = AARCH64_OPND_QLF_S_S;
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break;
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case 'd':
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*qualifier = AARCH64_OPND_QLF_S_D;
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break;
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case 'q':
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*qualifier = AARCH64_OPND_QLF_S_Q;
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break;
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default:
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return NULL;
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}
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q++;
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*str = q;
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return reg;
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}
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return NULL;
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}
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/* Parse SME ZA tile encoded in <ZAda> assembler symbol.
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Function return tile QUALIFIER on success.
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Tiles are in example format: za[0-9]\.[bhsd]
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Function returns <ZAda> register number or PARSE_FAIL.
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*/
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static int
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parse_sme_zada_operand (char **str, aarch64_opnd_qualifier_t *qualifier)
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{
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int regno;
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const reg_entry *reg = parse_reg_with_qual (str, REG_TYPE_ZA, qualifier);
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if (reg == NULL)
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return PARSE_FAIL;
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regno = reg->number;
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switch (*qualifier)
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{
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case AARCH64_OPND_QLF_S_B:
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if (regno != 0x00)
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{
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set_syntax_error (_("invalid ZA tile register number, expected za0"));
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return PARSE_FAIL;
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}
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break;
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case AARCH64_OPND_QLF_S_H:
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if (regno > 0x01)
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{
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set_syntax_error (_("invalid ZA tile register number, expected za0-za1"));
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return PARSE_FAIL;
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}
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break;
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case AARCH64_OPND_QLF_S_S:
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if (regno > 0x03)
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{
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/* For the 32-bit variant: is the name of the ZA tile ZA0-ZA3. */
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set_syntax_error (_("invalid ZA tile register number, expected za0-za3"));
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return PARSE_FAIL;
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}
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break;
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case AARCH64_OPND_QLF_S_D:
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if (regno > 0x07)
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{
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/* For the 64-bit variant: is the name of the ZA tile ZA0-ZA7 */
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set_syntax_error (_("invalid ZA tile register number, expected za0-za7"));
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return PARSE_FAIL;
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}
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break;
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default:
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set_syntax_error (_("invalid ZA tile element size, allowed b, h, s and d"));
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return PARSE_FAIL;
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}
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return regno;
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}
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/* Parse a system register or a PSTATE field name for an MSR/MRS instruction.
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Returns the encoding for the option, or PARSE_FAIL.
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@ -5801,6 +5913,7 @@ parse_operands (char *str, const aarch64_opcode *opcode)
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case AARCH64_OPND_SVE_Pm:
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case AARCH64_OPND_SVE_Pn:
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case AARCH64_OPND_SVE_Pt:
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case AARCH64_OPND_SME_Pm:
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reg_type = REG_TYPE_PN;
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goto vector_reg;
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@ -6867,6 +6980,15 @@ parse_operands (char *str, const aarch64_opcode *opcode)
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goto failure;
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break;
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case AARCH64_OPND_SME_ZAda_2b:
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case AARCH64_OPND_SME_ZAda_3b:
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val = parse_sme_zada_operand (&str, &qualifier);
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if (val == PARSE_FAIL)
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goto failure;
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info->reg.regno = val;
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info->qualifier = qualifier;
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break;
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default:
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as_fatal (_("unhandled operand code %d"), operands[i]);
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}
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@ -7463,7 +7585,10 @@ static const reg_entry reg_names[] = {
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REGSET (z, ZN), REGSET (Z, ZN),
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/* SVE predicate registers. */
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REGSET16 (p, PN), REGSET16 (P, PN)
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REGSET16 (p, PN), REGSET16 (P, PN),
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/* SME ZA tile registers. */
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REGSET16 (za, ZA), REGSET16 (ZA, ZA)
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};
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#undef REGDEF
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31
gas/testsuite/gas/aarch64/sme-f64.d
Normal file
31
gas/testsuite/gas/aarch64/sme-f64.d
Normal file
@ -0,0 +1,31 @@
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#name: SME F64 extension
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#as: -march=armv8-a+sme-f64
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0+ <.*>:
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0: 80c82020 fmopa za0.d, p0/m, p1/m, z1.d, z8.d
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4: 80c76841 fmopa za1.d, p2/m, p3/m, z2.d, z7.d
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8: 80c6b062 fmopa za2.d, p4/m, p5/m, z3.d, z6.d
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c: 80c5f883 fmopa za3.d, p6/m, p7/m, z4.d, z5.d
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10: 80c404a4 fmopa za4.d, p1/m, p0/m, z5.d, z4.d
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14: 80c34cc5 fmopa za5.d, p3/m, p2/m, z6.d, z3.d
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18: 80c294e6 fmopa za6.d, p5/m, p4/m, z7.d, z2.d
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1c: 80c1dd07 fmopa za7.d, p7/m, p6/m, z8.d, z1.d
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20: 80c41ca4 fmopa za4.d, p7/m, p0/m, z5.d, z4.d
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24: 80c338c5 fmopa za5.d, p6/m, p1/m, z6.d, z3.d
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28: 80c254e6 fmopa za6.d, p5/m, p2/m, z7.d, z2.d
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2c: 80c17107 fmopa za7.d, p4/m, p3/m, z8.d, z1.d
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30: 80c82030 fmops za0.d, p0/m, p1/m, z1.d, z8.d
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34: 80c76851 fmops za1.d, p2/m, p3/m, z2.d, z7.d
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38: 80c6b072 fmops za2.d, p4/m, p5/m, z3.d, z6.d
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3c: 80c5f893 fmops za3.d, p6/m, p7/m, z4.d, z5.d
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40: 80c404b4 fmops za4.d, p1/m, p0/m, z5.d, z4.d
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44: 80c34cd5 fmops za5.d, p3/m, p2/m, z6.d, z3.d
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48: 80c294f6 fmops za6.d, p5/m, p4/m, z7.d, z2.d
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4c: 80c1dd17 fmops za7.d, p7/m, p6/m, z8.d, z1.d
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50: 81a1f803 fmopa za3.s, p6/m, p7/m, z0.h, z1.h
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54: 8081f813 fmops za3.s, p6/m, p7/m, z0.s, z1.s
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32
gas/testsuite/gas/aarch64/sme-f64.s
Normal file
32
gas/testsuite/gas/aarch64/sme-f64.s
Normal file
@ -0,0 +1,32 @@
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/* Scalable Matrix Extension (SME F64). */
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/* FMOPA (non-widening), double-precision. */
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fmopa za0.d, p0/m, p1/m, z1.d, z8.d
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fmopa za1.d, p2/m, p3/m, z2.d, z7.d
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fmopa za2.d, p4/m, p5/m, z3.d, z6.d
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fmopa za3.d, p6/m, p7/m, z4.d, z5.d
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fmopa za4.d, p1/m, p0/m, z5.d, z4.d
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fmopa za5.d, p3/m, p2/m, z6.d, z3.d
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fmopa za6.d, p5/m, p4/m, z7.d, z2.d
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fmopa za7.d, p7/m, p6/m, z8.d, z1.d
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fmopa za4.d, p7/m, p0/m, z5.d, z4.d
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fmopa za5.d, p6/m, p1/m, z6.d, z3.d
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fmopa za6.d, p5/m, p2/m, z7.d, z2.d
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fmopa za7.d, p4/m, p3/m, z8.d, z1.d
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/* FMOPS (non-widening), double-precision. */
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fmops za0.d, p0/m, p1/m, z1.d, z8.d
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fmops za1.d, p2/m, p3/m, z2.d, z7.d
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fmops za2.d, p4/m, p5/m, z3.d, z6.d
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fmops za3.d, p6/m, p7/m, z4.d, z5.d
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fmops za4.d, p1/m, p0/m, z5.d, z4.d
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fmops za5.d, p3/m, p2/m, z6.d, z3.d
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fmops za6.d, p5/m, p4/m, z7.d, z2.d
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fmops za7.d, p7/m, p6/m, z8.d, z1.d
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/* Register aliases. */
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foo .req za3
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bar .req z0
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fmopa foo.s, p6/m, p7/m, bar.h, z1.h
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fmops foo.s, p6/m, p7/m, bar.s, z1.s
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117
gas/testsuite/gas/aarch64/sme-i64.d
Normal file
117
gas/testsuite/gas/aarch64/sme-i64.d
Normal file
@ -0,0 +1,117 @@
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#name: SME I64 extension
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#as: -march=armv8-a+sme-i64
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#objdump: -dr
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.*: file format .*
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Disassembly of section \.text:
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0+ <.*>:
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0: c0d02020 addha za0.d, p0/m, p1/m, z1.d
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4: c0d06841 addha za1.d, p2/m, p3/m, z2.d
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8: c0d0b062 addha za2.d, p4/m, p5/m, z3.d
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c: c0d0f883 addha za3.d, p6/m, p7/m, z4.d
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10: c0d004a4 addha za4.d, p1/m, p0/m, z5.d
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14: c0d04cc5 addha za5.d, p3/m, p2/m, z6.d
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18: c0d094e6 addha za6.d, p5/m, p4/m, z7.d
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1c: c0d0dd07 addha za7.d, p7/m, p6/m, z8.d
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20: c0d01ca4 addha za4.d, p7/m, p0/m, z5.d
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24: c0d038c5 addha za5.d, p6/m, p1/m, z6.d
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28: c0d054e6 addha za6.d, p5/m, p2/m, z7.d
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2c: c0d07107 addha za7.d, p4/m, p3/m, z8.d
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30: c0d12020 addva za0.d, p0/m, p1/m, z1.d
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34: c0d16841 addva za1.d, p2/m, p3/m, z2.d
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38: c0d1b062 addva za2.d, p4/m, p5/m, z3.d
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3c: c0d1f883 addva za3.d, p6/m, p7/m, z4.d
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40: c0d104a4 addva za4.d, p1/m, p0/m, z5.d
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44: c0d14cc5 addva za5.d, p3/m, p2/m, z6.d
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48: c0d194e6 addva za6.d, p5/m, p4/m, z7.d
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4c: c0d1dd07 addva za7.d, p7/m, p6/m, z8.d
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50: c0d11ca4 addva za4.d, p7/m, p0/m, z5.d
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54: c0d138c5 addva za5.d, p6/m, p1/m, z6.d
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58: c0d154e6 addva za6.d, p5/m, p2/m, z7.d
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5c: c0d17107 addva za7.d, p4/m, p3/m, z8.d
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60: a0c82020 smopa za0.d, p0/m, p1/m, z1.h, z8.h
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64: a0c76841 smopa za1.d, p2/m, p3/m, z2.h, z7.h
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68: a0c6b062 smopa za2.d, p4/m, p5/m, z3.h, z6.h
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6c: a0c5f883 smopa za3.d, p6/m, p7/m, z4.h, z5.h
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70: a0c404a4 smopa za4.d, p1/m, p0/m, z5.h, z4.h
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74: a0c34cc5 smopa za5.d, p3/m, p2/m, z6.h, z3.h
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78: a0c294e6 smopa za6.d, p5/m, p4/m, z7.h, z2.h
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7c: a0c1dd07 smopa za7.d, p7/m, p6/m, z8.h, z1.h
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80: a0c82030 smops za0.d, p0/m, p1/m, z1.h, z8.h
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84: a0c76851 smops za1.d, p2/m, p3/m, z2.h, z7.h
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88: a0c6b072 smops za2.d, p4/m, p5/m, z3.h, z6.h
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8c: a0c5f893 smops za3.d, p6/m, p7/m, z4.h, z5.h
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90: a0c404b4 smops za4.d, p1/m, p0/m, z5.h, z4.h
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94: a0c34cd5 smops za5.d, p3/m, p2/m, z6.h, z3.h
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98: a0c294f6 smops za6.d, p5/m, p4/m, z7.h, z2.h
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9c: a0c1dd17 smops za7.d, p7/m, p6/m, z8.h, z1.h
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a0: a0c41cb4 smops za4.d, p7/m, p0/m, z5.h, z4.h
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a4: a0c338d5 smops za5.d, p6/m, p1/m, z6.h, z3.h
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a8: a0c254f6 smops za6.d, p5/m, p2/m, z7.h, z2.h
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ac: a0c17117 smops za7.d, p4/m, p3/m, z8.h, z1.h
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b0: a0e82020 sumopa za0.d, p0/m, p1/m, z1.h, z8.h
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b4: a0e76841 sumopa za1.d, p2/m, p3/m, z2.h, z7.h
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b8: a0e6b062 sumopa za2.d, p4/m, p5/m, z3.h, z6.h
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bc: a0e5f883 sumopa za3.d, p6/m, p7/m, z4.h, z5.h
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c0: a0e404a4 sumopa za4.d, p1/m, p0/m, z5.h, z4.h
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c4: a0e34cc5 sumopa za5.d, p3/m, p2/m, z6.h, z3.h
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c8: a0e294e6 sumopa za6.d, p5/m, p4/m, z7.h, z2.h
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cc: a0e1dd07 sumopa za7.d, p7/m, p6/m, z8.h, z1.h
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d0: a0e82030 sumops za0.d, p0/m, p1/m, z1.h, z8.h
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d4: a0e76851 sumops za1.d, p2/m, p3/m, z2.h, z7.h
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||||
d8: a0e6b072 sumops za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
dc: a0e5f893 sumops za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
e0: a0e404b4 sumops za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
e4: a0e34cd5 sumops za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
e8: a0e294f6 sumops za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
ec: a0e1dd17 sumops za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
f0: a1e82020 umopa za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
f4: a1e76841 umopa za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
f8: a1e6b062 umopa za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
fc: a1e5f883 umopa za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
100: a1e404a4 umopa za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
104: a1e34cc5 umopa za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
108: a1e294e6 umopa za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
10c: a1e1dd07 umopa za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
110: a1e82030 umops za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
114: a1e76851 umops za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
118: a1e6b072 umops za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
11c: a1e5f893 umops za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
120: a1e404b4 umops za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
124: a1e34cd5 umops za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
128: a1e294f6 umops za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
12c: a1e1dd17 umops za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
130: a1c82020 usmopa za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
134: a1c76841 usmopa za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
138: a1c6b062 usmopa za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
13c: a1c5f883 usmopa za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
140: a1c404a4 usmopa za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
144: a1c34cc5 usmopa za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
148: a1c294e6 usmopa za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
14c: a1c1dd07 usmopa za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
150: a1c82030 usmops za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
154: a1c76851 usmops za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
158: a1c6b072 usmops za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
15c: a1c5f893 usmops za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
160: a1c404b4 usmops za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
164: a1c34cd5 usmops za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
168: a1c294f6 usmops za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
16c: a1c1dd17 usmops za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
170: a1c41cb4 usmops za4.d, p7/m, p0/m, z5.h, z4.h
|
||||
174: a1c338d5 usmops za5.d, p6/m, p1/m, z6.h, z3.h
|
||||
178: a1c254f6 usmops za6.d, p5/m, p2/m, z7.h, z2.h
|
||||
17c: a1c17117 usmops za7.d, p4/m, p3/m, z8.h, z1.h
|
||||
180: c0d02020 addha za0.d, p0/m, p1/m, z1.d
|
||||
184: c0d17107 addva za7.d, p4/m, p3/m, z8.d
|
||||
188: 8181f883 bfmopa za3.s, p6/m, p7/m, z4.h, z1.h
|
||||
18c: 8181f893 bfmops za3.s, p6/m, p7/m, z4.h, z1.h
|
||||
190: a0c1dd07 smopa za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
194: a0c17117 smops za7.d, p4/m, p3/m, z8.h, z1.h
|
||||
198: a0e1dd07 sumopa za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
19c: a0e1dd17 sumops za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
1a0: a1a1f883 umopa za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
1a4: a1a1f893 umops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
1a8: a1817083 usmopa za3.s, p4/m, p3/m, z4.b, z1.b
|
||||
1ac: a181f893 usmops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
135
gas/testsuite/gas/aarch64/sme-i64.s
Normal file
135
gas/testsuite/gas/aarch64/sme-i64.s
Normal file
@ -0,0 +1,135 @@
|
||||
/* Scalable Matrix Extension (SME I64). */
|
||||
|
||||
/* ADDHA 64-bit variant. */
|
||||
addha za0.d, p0/m, p1/m, z1.d
|
||||
addha za1.d, p2/m, p3/m, z2.d
|
||||
addha za2.d, p4/m, p5/m, z3.d
|
||||
addha za3.d, p6/m, p7/m, z4.d
|
||||
addha za4.d, p1/m, p0/m, z5.d
|
||||
addha za5.d, p3/m, p2/m, z6.d
|
||||
addha za6.d, p5/m, p4/m, z7.d
|
||||
addha za7.d, p7/m, p6/m, z8.d
|
||||
addha za4.d, p7/m, p0/m, z5.d
|
||||
addha za5.d, p6/m, p1/m, z6.d
|
||||
addha za6.d, p5/m, p2/m, z7.d
|
||||
addha za7.d, p4/m, p3/m, z8.d
|
||||
|
||||
/* ADDVA 64-bit variant. */
|
||||
addva za0.d, p0/m, p1/m, z1.d
|
||||
addva za1.d, p2/m, p3/m, z2.d
|
||||
addva za2.d, p4/m, p5/m, z3.d
|
||||
addva za3.d, p6/m, p7/m, z4.d
|
||||
addva za4.d, p1/m, p0/m, z5.d
|
||||
addva za5.d, p3/m, p2/m, z6.d
|
||||
addva za6.d, p5/m, p4/m, z7.d
|
||||
addva za7.d, p7/m, p6/m, z8.d
|
||||
addva za4.d, p7/m, p0/m, z5.d
|
||||
addva za5.d, p6/m, p1/m, z6.d
|
||||
addva za6.d, p5/m, p2/m, z7.d
|
||||
addva za7.d, p4/m, p3/m, z8.d
|
||||
|
||||
/* SMOPA 64-bit variant. */
|
||||
smopa za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
smopa za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
smopa za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
smopa za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
smopa za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
smopa za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
smopa za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
smopa za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
|
||||
/* SMOPS 64-bit variant. */
|
||||
smops za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
smops za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
smops za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
smops za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
smops za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
smops za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
smops za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
smops za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
smops za4.d, p7/m, p0/m, z5.h, z4.h
|
||||
smops za5.d, p6/m, p1/m, z6.h, z3.h
|
||||
smops za6.d, p5/m, p2/m, z7.h, z2.h
|
||||
smops za7.d, p4/m, p3/m, z8.h, z1.h
|
||||
|
||||
/* SUMOPA 64-bit variant. */
|
||||
sumopa za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
sumopa za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
sumopa za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
sumopa za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
sumopa za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
sumopa za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
sumopa za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
sumopa za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
|
||||
/* SUMOPS 64-bit variant. */
|
||||
sumops za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
sumops za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
sumops za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
sumops za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
sumops za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
sumops za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
sumops za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
sumops za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
|
||||
/* UMOPA 64-bit variant. */
|
||||
umopa za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
umopa za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
umopa za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
umopa za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
umopa za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
umopa za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
umopa za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
umopa za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
|
||||
/* UMOPS 64-bit variant. */
|
||||
umops za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
umops za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
umops za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
umops za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
umops za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
umops za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
umops za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
umops za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
|
||||
/* USMOPA 64-bit variant. */
|
||||
usmopa za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
usmopa za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
usmopa za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
usmopa za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
usmopa za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
usmopa za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
usmopa za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
usmopa za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
|
||||
/* USMOPS 64-bit variant. */
|
||||
usmops za0.d, p0/m, p1/m, z1.h, z8.h
|
||||
usmops za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
usmops za2.d, p4/m, p5/m, z3.h, z6.h
|
||||
usmops za3.d, p6/m, p7/m, z4.h, z5.h
|
||||
usmops za4.d, p1/m, p0/m, z5.h, z4.h
|
||||
usmops za5.d, p3/m, p2/m, z6.h, z3.h
|
||||
usmops za6.d, p5/m, p4/m, z7.h, z2.h
|
||||
usmops za7.d, p7/m, p6/m, z8.h, z1.h
|
||||
usmops za4.d, p7/m, p0/m, z5.h, z4.h
|
||||
usmops za5.d, p6/m, p1/m, z6.h, z3.h
|
||||
usmops za6.d, p5/m, p2/m, z7.h, z2.h
|
||||
usmops za7.d, p4/m, p3/m, z8.h, z1.h
|
||||
|
||||
/* Register aliases. */
|
||||
foo .req za3
|
||||
bar .req za7
|
||||
baz .req za0
|
||||
|
||||
addha baz.d, p0/m, p1/m, z1.d
|
||||
addva bar.d, p4/m, p3/m, z8.d
|
||||
bfmopa foo.s, p6/m, p7/m, z4.h, z1.h
|
||||
bfmops foo.s, p6/m, p7/m, z4.h, z1.h
|
||||
smopa bar.d, p7/m, p6/m, z8.h, z1.h
|
||||
smops bar.d, p4/m, p3/m, z8.h, z1.h
|
||||
sumopa bar.d, p7/m, p6/m, z8.h, z1.h
|
||||
sumops bar.d, p7/m, p6/m, z8.h, z1.h
|
||||
umopa foo.s, p6/m, p7/m, z4.b, z1.b
|
||||
umops foo.s, p6/m, p7/m, z4.b, z1.b
|
||||
usmopa foo.s, p4/m, p3/m, z4.b, z1.b
|
||||
usmops foo.s, p6/m, p7/m, z4.b, z1.b
|
||||
3
gas/testsuite/gas/aarch64/sme-illegal.d
Normal file
3
gas/testsuite/gas/aarch64/sme-illegal.d
Normal file
@ -0,0 +1,3 @@
|
||||
#as: -march=armv8-a+sme+sme-i64+sme-f64
|
||||
#source: sme-illegal.s
|
||||
#error_output: sme-illegal.l
|
||||
95
gas/testsuite/gas/aarch64/sme-illegal.l
Normal file
95
gas/testsuite/gas/aarch64/sme-illegal.l
Normal file
@ -0,0 +1,95 @@
|
||||
[^:]*: Assembler messages:
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `addha za4.s,p0/m,p1/m,z1.s'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `addha za15.s,p2/m,p3/m,z2.s'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `addha za0.s,p2/m,p3/m,z2.d'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: addha za0.d, p2/m, p3/m, z2.d
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `addha za8.d,p0/m,p1/m,z1.d'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `addha za15.d,p2/m,p3/m,z2.d'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `addha za0.d,p2/m,p3/m,z2.s'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: addha za0.d, p2/m, p3/m, z2.d
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `addva za4.s,p0/m,p1/m,z1.s'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `addva za15.s,p2/m,p3/m,z2.s'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `addva za0.s,p2/m,p3/m,z2.d'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: addva za0.d, p2/m, p3/m, z2.d
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `addva za8.d,p0/m,p1/m,z1.d'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `addva za15.d,p2/m,p3/m,z2.d'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `addva za0.d,p2/m,p3/m,z2.s'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: addva za0.d, p2/m, p3/m, z2.d
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `bfmopa za4.s,p0/m,p1/m,z1.h,z4.h'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `bfmopa za0.s,p2/m,p3/m,z2.s,z3.s'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: bfmopa za0.s, p2/m, p3/m, z2.h, z3.h
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `bfmops za4.s,p0/m,p1/m,z1.h,z4.h'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `bfmops za0.s,p2/m,p3/m,z2.s,z3.s'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: bfmops za0.s, p2/m, p3/m, z2.h, z3.h
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `fmopa za4.s,p0/m,p1/m,z1.s,z4.s'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `fmopa za0.s,p6/m,p7/m,z4.d,z1.d'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: fmopa za0.d, p6/m, p7/m, z4.d, z1.d
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `fmopa za8.d,p0/m,p1/m,z1.d,z8.d'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `fmopa za0.d,p2/m,p3/m,z2.s,z7.s'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: fmopa za0.d, p2/m, p3/m, z2.d, z7.d
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `fmopa za4.s,p0/m,p1/m,z1.h,z4.h'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `fmopa za1.s,p2/m,p3/m,z2.q,z3.q'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: fmopa za1.d, p2/m, p3/m, z2.d, z3.d
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `fmops za4.s,p0/m,p1/m,z1.s,z4.s'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `fmops za1.s,p2/m,p3/m,z2.q,z3.q'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: fmops za1.d, p2/m, p3/m, z2.d, z3.d
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `fmops za8.d,p0/m,p1/m,z1.d,z8.d'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `fmops za0.d,p2/m,p3/m,z2.s,z7.s'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: fmops za0.d, p2/m, p3/m, z2.d, z7.d
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `fmops za8.s,p0/m,p1/m,z1.h,z4.h'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile element size, allowed b, h, s and d at operand 1 -- `fmops za1.q,p2/m,p3/m,z2.h,z3.h'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `smopa za4.s,p0/m,p1/m,z1.b,z4.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile element size, allowed b, h, s and d at operand 1 -- `smopa za1.q,p2/m,p3/m,z2.b,z3.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `smopa za8.d,p0/m,p1/m,z1.h,z8.h'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `smopa za1.d,p2/m,p3/m,z2.h,z7.q'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: smopa za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `smops za4.s,p0/m,p1/m,z1.b,z4.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile element size, allowed b, h, s and d at operand 1 -- `smops za1.q,p2/m,p3/m,z2.b,z3.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `smops za8.d,p0/m,p1/m,z1.h,z8.h'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `smops za1.d,p2/m,p3/m,z2.h,z7.q'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: smops za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `sumopa za4.s,p0/m,p1/m,z1.b,z4.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile element size, allowed b, h, s and d at operand 1 -- `sumopa za1.q,p2/m,p3/m,z2.s,z3.s'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `sumopa za8.d,p0/m,p1/m,z1.h,z8.h'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `sumopa za1.d,p2/m,p3/m,z2.h,z7.q'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: sumopa za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `sumops za4.s,p0/m,p1/m,z1.b,z4.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile element size, allowed b, h, s and d at operand 1 -- `sumops za1.q,p2/m,p3/m,z2.b,z3.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `sumops za8.d,p0/m,p1/m,z1.h,z8.h'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile element size, allowed b, h, s and d at operand 1 -- `sumops za1.q,p2/m,p3/m,z2.h,z7.h'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `umopa za4.s,p0/m,p1/m,z1.b,z4.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile element size, allowed b, h, s and d at operand 1 -- `umopa za1.q,p2/m,p3/m,z2.b,z3.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `umopa za8.d,p0/m,p1/m,z1.h,z8.h'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile element size, allowed b, h, s and d at operand 1 -- `umopa za1.q,p2/m,p3/m,z2.h,z7.h'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `umops za4.s,p0/m,p1/m,z1.b,z4.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile element size, allowed b, h, s and d at operand 1 -- `umops za1.q,p2/m,p3/m,z2.b,z3.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `umops za8.d,p0/m,p1/m,z1.h,z8.h'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `umops za1.d,p2/m,p3/m,z2.d,z7.d'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: umops za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `usmopa za4.s,p0/m,p1/m,z1.b,z4.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile element size, allowed b, h, s and d at operand 1 -- `usmopa za1.q,p2/m,p3/m,z2.b,z3.b'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `usmopa za8.d,p0/m,p1/m,z1.h,z8.h'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile element size, allowed b, h, s and d at operand 1 -- `usmopa za1.q,p2/m,p3/m,z2.h,z7.h'
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za3 at operand 1 -- `usmops za4.s,p0/m,p1/m,z1.b,z4.b'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `usmops za1.s,p2/m,p3/m,z2.s,z3.b'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: usmops za1.d, p2/m, p3/m, z2.h, z3.h
|
||||
[^:]*:[0-9]+: Error: invalid ZA tile register number, expected za0-za7 at operand 1 -- `usmops za8.d,p0/m,p1/m,z1.h,z8.h'
|
||||
[^:]*:[0-9]+: Error: operand mismatch -- `usmops za1.d,p2/m,p3/m,z2.d,z7.d'
|
||||
[^:]*:[0-9]+: Info: did you mean this\?
|
||||
[^:]*:[0-9]+: Info: usmops za1.d, p2/m, p3/m, z2.h, z7.h
|
||||
117
gas/testsuite/gas/aarch64/sme-illegal.s
Normal file
117
gas/testsuite/gas/aarch64/sme-illegal.s
Normal file
@ -0,0 +1,117 @@
|
||||
/* Scalable Matrix Extension (SME). */
|
||||
|
||||
/* ADDHA 32-bit variant. */
|
||||
addha za4.s, p0/m, p1/m, z1.s
|
||||
addha za15.s, p2/m, p3/m, z2.s
|
||||
addha za0.s, p2/m, p3/m, z2.d
|
||||
|
||||
/* ADDHA 64-bit variant. */
|
||||
addha za8.d, p0/m, p1/m, z1.d
|
||||
addha za15.d, p2/m, p3/m, z2.d
|
||||
addha za0.d, p2/m, p3/m, z2.s
|
||||
|
||||
/* ADDVA 32-bit variant. */
|
||||
addva za4.s, p0/m, p1/m, z1.s
|
||||
addva za15.s, p2/m, p3/m, z2.s
|
||||
addva za0.s, p2/m, p3/m, z2.d
|
||||
|
||||
/* ADDVA 64-bit variant. */
|
||||
addva za8.d, p0/m, p1/m, z1.d
|
||||
addva za15.d, p2/m, p3/m, z2.d
|
||||
addva za0.d, p2/m, p3/m, z2.s
|
||||
|
||||
/* BFMOPA. */
|
||||
bfmopa za4.s, p0/m, p1/m, z1.h, z4.h
|
||||
bfmopa za0.s, p2/m, p3/m, z2.s, z3.s
|
||||
|
||||
/* BFMOPS. */
|
||||
bfmops za4.s, p0/m, p1/m, z1.h, z4.h
|
||||
bfmops za0.s, p2/m, p3/m, z2.s, z3.s
|
||||
|
||||
/* FMOPA (non-widening), single-precision. */
|
||||
fmopa za4.s, p0/m, p1/m, z1.s, z4.s
|
||||
fmopa za0.s, p6/m, p7/m, z4.d, z1.d
|
||||
|
||||
/* FMOPA (non-widening), double-precision. */
|
||||
fmopa za8.d, p0/m, p1/m, z1.d, z8.d
|
||||
fmopa za0.d, p2/m, p3/m, z2.s, z7.s
|
||||
|
||||
/* FMOPA (widening) */
|
||||
fmopa za4.s, p0/m, p1/m, z1.h, z4.h
|
||||
fmopa za1.s, p2/m, p3/m, z2.q, z3.q
|
||||
|
||||
/* FMOPS (non-widening), single-precision. */
|
||||
fmops za4.s, p0/m, p1/m, z1.s, z4.s
|
||||
fmops za1.s, p2/m, p3/m, z2.q, z3.q
|
||||
|
||||
/* FMOPS (non-widening), double-precision. */
|
||||
fmops za8.d, p0/m, p1/m, z1.d, z8.d
|
||||
fmops za0.d, p2/m, p3/m, z2.s, z7.s
|
||||
|
||||
/* FMOPS (widening) */
|
||||
fmops za8.s, p0/m, p1/m, z1.h, z4.h
|
||||
fmops za1.q, p2/m, p3/m, z2.h, z3.h
|
||||
|
||||
/* SMOPA 32-bit variant. */
|
||||
smopa za4.s, p0/m, p1/m, z1.b, z4.b
|
||||
smopa za1.q, p2/m, p3/m, z2.b, z3.b
|
||||
|
||||
/* SMOPA 64-bit variant. */
|
||||
smopa za8.d, p0/m, p1/m, z1.h, z8.h
|
||||
smopa za1.d, p2/m, p3/m, z2.h, z7.q
|
||||
|
||||
/* SMOPS 32-bit variant. */
|
||||
smops za4.s, p0/m, p1/m, z1.b, z4.b
|
||||
smops za1.q, p2/m, p3/m, z2.b, z3.b
|
||||
|
||||
/* SMOPS 64-bit variant. */
|
||||
smops za8.d, p0/m, p1/m, z1.h, z8.h
|
||||
smops za1.d, p2/m, p3/m, z2.h, z7.q
|
||||
|
||||
/* SUMOPA 32-bit variant. */
|
||||
sumopa za4.s, p0/m, p1/m, z1.b, z4.b
|
||||
sumopa za1.q, p2/m, p3/m, z2.s, z3.s
|
||||
|
||||
/* SUMOPA 64-bit variant. */
|
||||
sumopa za8.d, p0/m, p1/m, z1.h, z8.h
|
||||
sumopa za1.d, p2/m, p3/m, z2.h, z7.q
|
||||
|
||||
/* SUMOPS 32-bit variant. */
|
||||
sumops za4.s, p0/m, p1/m, z1.b, z4.b
|
||||
sumops za1.q, p2/m, p3/m, z2.b, z3.b
|
||||
|
||||
/* SUMOPS 64-bit variant. */
|
||||
sumops za8.d, p0/m, p1/m, z1.h, z8.h
|
||||
sumops za1.q, p2/m, p3/m, z2.h, z7.h
|
||||
|
||||
/* UMOPA 32-bit variant. */
|
||||
umopa za4.s, p0/m, p1/m, z1.b, z4.b
|
||||
umopa za1.q, p2/m, p3/m, z2.b, z3.b
|
||||
|
||||
/* UMOPA 64-bit variant. */
|
||||
umopa za8.d, p0/m, p1/m, z1.h, z8.h
|
||||
umopa za1.q, p2/m, p3/m, z2.h, z7.h
|
||||
|
||||
/* UMOPS 32-bit variant. */
|
||||
umops za4.s, p0/m, p1/m, z1.b, z4.b
|
||||
umops za1.q, p2/m, p3/m, z2.b, z3.b
|
||||
|
||||
/* UMOPS 64-bit variant. */
|
||||
umops za8.d, p0/m, p1/m, z1.h, z8.h
|
||||
umops za1.d, p2/m, p3/m, z2.d, z7.d
|
||||
|
||||
/* USMOPA 32-bit variant. */
|
||||
usmopa za4.s, p0/m, p1/m, z1.b, z4.b
|
||||
usmopa za1.q, p2/m, p3/m, z2.b, z3.b
|
||||
|
||||
/* USMOPA 64-bit variant. */
|
||||
usmopa za8.d, p0/m, p1/m, z1.h, z8.h
|
||||
usmopa za1.q, p2/m, p3/m, z2.h, z7.h
|
||||
|
||||
/* USMOPS 32-bit variant. */
|
||||
usmops za4.s, p0/m, p1/m, z1.b, z4.b
|
||||
usmops za1.s, p2/m, p3/m, z2.s, z3.b
|
||||
|
||||
/* USMOPS 64-bit variant. */
|
||||
usmops za8.d, p0/m, p1/m, z1.h, z8.h
|
||||
usmops za1.d, p2/m, p3/m, z2.d, z7.d
|
||||
93
gas/testsuite/gas/aarch64/sme.d
Normal file
93
gas/testsuite/gas/aarch64/sme.d
Normal file
@ -0,0 +1,93 @@
|
||||
#name: SME extension
|
||||
#as: -march=armv8-a+sme
|
||||
#objdump: -dr
|
||||
|
||||
.*: file format .*
|
||||
|
||||
Disassembly of section \.text:
|
||||
|
||||
0+ <.*>:
|
||||
0: c0902020 addha za0.s, p0/m, p1/m, z1.s
|
||||
4: c0906841 addha za1.s, p2/m, p3/m, z2.s
|
||||
8: c090b062 addha za2.s, p4/m, p5/m, z3.s
|
||||
c: c090f883 addha za3.s, p6/m, p7/m, z4.s
|
||||
10: c0912020 addva za0.s, p0/m, p1/m, z1.s
|
||||
14: c0916841 addva za1.s, p2/m, p3/m, z2.s
|
||||
18: c091b062 addva za2.s, p4/m, p5/m, z3.s
|
||||
1c: c091f883 addva za3.s, p6/m, p7/m, z4.s
|
||||
20: 81842020 bfmopa za0.s, p0/m, p1/m, z1.h, z4.h
|
||||
24: 81836841 bfmopa za1.s, p2/m, p3/m, z2.h, z3.h
|
||||
28: 8182b062 bfmopa za2.s, p4/m, p5/m, z3.h, z2.h
|
||||
2c: 8181f883 bfmopa za3.s, p6/m, p7/m, z4.h, z1.h
|
||||
30: 81842030 bfmops za0.s, p0/m, p1/m, z1.h, z4.h
|
||||
34: 81836851 bfmops za1.s, p2/m, p3/m, z2.h, z3.h
|
||||
38: 8182b072 bfmops za2.s, p4/m, p5/m, z3.h, z2.h
|
||||
3c: 8181f893 bfmops za3.s, p6/m, p7/m, z4.h, z1.h
|
||||
40: 80842020 fmopa za0.s, p0/m, p1/m, z1.s, z4.s
|
||||
44: 80836841 fmopa za1.s, p2/m, p3/m, z2.s, z3.s
|
||||
48: 8082b062 fmopa za2.s, p4/m, p5/m, z3.s, z2.s
|
||||
4c: 8081f883 fmopa za3.s, p6/m, p7/m, z4.s, z1.s
|
||||
50: 81a42020 fmopa za0.s, p0/m, p1/m, z1.h, z4.h
|
||||
54: 81a36841 fmopa za1.s, p2/m, p3/m, z2.h, z3.h
|
||||
58: 81a2b062 fmopa za2.s, p4/m, p5/m, z3.h, z2.h
|
||||
5c: 81a1f883 fmopa za3.s, p6/m, p7/m, z4.h, z1.h
|
||||
60: 80842030 fmops za0.s, p0/m, p1/m, z1.s, z4.s
|
||||
64: 80836851 fmops za1.s, p2/m, p3/m, z2.s, z3.s
|
||||
68: 8082b072 fmops za2.s, p4/m, p5/m, z3.s, z2.s
|
||||
6c: 8081f893 fmops za3.s, p6/m, p7/m, z4.s, z1.s
|
||||
70: 80841c30 fmops za0.s, p7/m, p0/m, z1.s, z4.s
|
||||
74: 80833851 fmops za1.s, p6/m, p1/m, z2.s, z3.s
|
||||
78: 80825472 fmops za2.s, p5/m, p2/m, z3.s, z2.s
|
||||
7c: 80817093 fmops za3.s, p4/m, p3/m, z4.s, z1.s
|
||||
80: 80842030 fmops za0.s, p0/m, p1/m, z1.s, z4.s
|
||||
84: 80836851 fmops za1.s, p2/m, p3/m, z2.s, z3.s
|
||||
88: 8082b072 fmops za2.s, p4/m, p5/m, z3.s, z2.s
|
||||
8c: 8081f893 fmops za3.s, p6/m, p7/m, z4.s, z1.s
|
||||
90: a0842020 smopa za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
94: a0836841 smopa za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
98: a082b062 smopa za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
9c: a081f883 smopa za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
a0: a0842030 smops za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
a4: a0836851 smops za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
a8: a082b072 smops za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
ac: a081f893 smops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
b0: a0a42020 sumopa za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
b4: a0a36841 sumopa za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
b8: a0a2b062 sumopa za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
bc: a0a1f883 sumopa za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
c0: a0a42030 sumops za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
c4: a0a36851 sumops za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
c8: a0a2b072 sumops za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
cc: a0a1f893 sumops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
d0: a0a41c30 sumops za0.s, p7/m, p0/m, z1.b, z4.b
|
||||
d4: a0a33851 sumops za1.s, p6/m, p1/m, z2.b, z3.b
|
||||
d8: a0a25472 sumops za2.s, p5/m, p2/m, z3.b, z2.b
|
||||
dc: a0a17093 sumops za3.s, p4/m, p3/m, z4.b, z1.b
|
||||
e0: a1a42020 umopa za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
e4: a1a36841 umopa za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
e8: a1a2b062 umopa za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
ec: a1a1f883 umopa za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
f0: a1a42030 umops za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
f4: a1a36851 umops za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
f8: a1a2b072 umops za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
fc: a1a1f893 umops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
100: a1842020 usmopa za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
104: a1836841 usmopa za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
108: a182b062 usmopa za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
10c: a181f883 usmopa za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
110: a1841c20 usmopa za0.s, p7/m, p0/m, z1.b, z4.b
|
||||
114: a1833841 usmopa za1.s, p6/m, p1/m, z2.b, z3.b
|
||||
118: a1825462 usmopa za2.s, p5/m, p2/m, z3.b, z2.b
|
||||
11c: a1817083 usmopa za3.s, p4/m, p3/m, z4.b, z1.b
|
||||
120: a1842030 usmops za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
124: a1836851 usmops za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
128: a182b072 usmops za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
12c: a181f893 usmops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
130: 8181f883 bfmopa za3.s, p6/m, p7/m, z4.h, z1.h
|
||||
134: 8181f893 bfmops za3.s, p6/m, p7/m, z4.h, z1.h
|
||||
138: 81a1f883 fmopa za3.s, p6/m, p7/m, z4.h, z1.h
|
||||
13c: 8081f893 fmops za3.s, p6/m, p7/m, z4.s, z1.s
|
||||
140: a1a1f883 umopa za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
144: a1a1f893 umops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
148: a1817083 usmopa za3.s, p4/m, p3/m, z4.b, z1.b
|
||||
14c: a181f893 usmops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
123
gas/testsuite/gas/aarch64/sme.s
Normal file
123
gas/testsuite/gas/aarch64/sme.s
Normal file
@ -0,0 +1,123 @@
|
||||
/* Scalable Matrix Extension (SME). */
|
||||
|
||||
/* ADDHA 32-bit variant. */
|
||||
addha za0.s, p0/m, p1/m, z1.s
|
||||
addha za1.s, p2/m, p3/m, z2.s
|
||||
addha za2.s, p4/m, p5/m, z3.s
|
||||
addha za3.s, p6/m, p7/m, z4.s
|
||||
|
||||
/* ADDVA 32-bit variant. */
|
||||
addva za0.s, p0/m, p1/m, z1.s
|
||||
addva za1.s, p2/m, p3/m, z2.s
|
||||
addva za2.s, p4/m, p5/m, z3.s
|
||||
addva za3.s, p6/m, p7/m, z4.s
|
||||
|
||||
/* BFMOPA. */
|
||||
bfmopa za0.s, p0/m, p1/m, z1.h, z4.h
|
||||
bfmopa za1.s, p2/m, p3/m, z2.h, z3.h
|
||||
bfmopa za2.s, p4/m, p5/m, z3.h, z2.h
|
||||
bfmopa za3.s, p6/m, p7/m, z4.h, z1.h
|
||||
|
||||
/* BFMOPS. */
|
||||
bfmops za0.s, p0/m, p1/m, z1.h, z4.h
|
||||
bfmops za1.s, p2/m, p3/m, z2.h, z3.h
|
||||
bfmops za2.s, p4/m, p5/m, z3.h, z2.h
|
||||
bfmops za3.s, p6/m, p7/m, z4.h, z1.h
|
||||
|
||||
/* FMOPA (non-widening), single-precision. */
|
||||
fmopa za0.s, p0/m, p1/m, z1.s, z4.s
|
||||
fmopa za1.s, p2/m, p3/m, z2.s, z3.s
|
||||
fmopa za2.s, p4/m, p5/m, z3.s, z2.s
|
||||
fmopa za3.s, p6/m, p7/m, z4.s, z1.s
|
||||
|
||||
/* FMOPA (widening) */
|
||||
fmopa za0.s, p0/m, p1/m, z1.h, z4.h
|
||||
fmopa za1.s, p2/m, p3/m, z2.h, z3.h
|
||||
fmopa za2.s, p4/m, p5/m, z3.h, z2.h
|
||||
fmopa za3.s, p6/m, p7/m, z4.h, z1.h
|
||||
|
||||
/* FMOPS (non-widening), single-precision. */
|
||||
fmops za0.s, p0/m, p1/m, z1.s, z4.s
|
||||
fmops za1.s, p2/m, p3/m, z2.s, z3.s
|
||||
fmops za2.s, p4/m, p5/m, z3.s, z2.s
|
||||
fmops za3.s, p6/m, p7/m, z4.s, z1.s
|
||||
fmops za0.s, p7/m, p0/m, z1.s, z4.s
|
||||
fmops za1.s, p6/m, p1/m, z2.s, z3.s
|
||||
fmops za2.s, p5/m, p2/m, z3.s, z2.s
|
||||
fmops za3.s, p4/m, p3/m, z4.s, z1.s
|
||||
|
||||
/* FMOPS (widening) */
|
||||
fmops za0.s, p0/m, p1/m, z1.s, z4.s
|
||||
fmops za1.s, p2/m, p3/m, z2.s, z3.s
|
||||
fmops za2.s, p4/m, p5/m, z3.s, z2.s
|
||||
fmops za3.s, p6/m, p7/m, z4.s, z1.s
|
||||
|
||||
/* SMOPA 32-bit variant. */
|
||||
smopa za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
smopa za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
smopa za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
smopa za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
|
||||
/* SMOPS 32-bit variant. */
|
||||
smops za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
smops za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
smops za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
smops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
|
||||
/* SUMOPA 32-bit variant. */
|
||||
sumopa za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
sumopa za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
sumopa za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
sumopa za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
|
||||
/* SUMOPS 32-bit variant. */
|
||||
sumops za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
sumops za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
sumops za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
sumops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
sumops za0.s, p7/m, p0/m, z1.b, z4.b
|
||||
sumops za1.s, p6/m, p1/m, z2.b, z3.b
|
||||
sumops za2.s, p5/m, p2/m, z3.b, z2.b
|
||||
sumops za3.s, p4/m, p3/m, z4.b, z1.b
|
||||
|
||||
/* UMOPA 32-bit variant. */
|
||||
umopa za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
umopa za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
umopa za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
umopa za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
|
||||
/* UMOPS 32-bit variant. */
|
||||
umops za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
umops za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
umops za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
umops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
|
||||
/* USMOPA 32-bit variant. */
|
||||
usmopa za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
usmopa za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
usmopa za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
usmopa za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
usmopa za0.s, p7/m, p0/m, z1.b, z4.b
|
||||
usmopa za1.s, p6/m, p1/m, z2.b, z3.b
|
||||
usmopa za2.s, p5/m, p2/m, z3.b, z2.b
|
||||
usmopa za3.s, p4/m, p3/m, z4.b, z1.b
|
||||
|
||||
/* USMOPS 32-bit variant. */
|
||||
usmops za0.s, p0/m, p1/m, z1.b, z4.b
|
||||
usmops za1.s, p2/m, p3/m, z2.b, z3.b
|
||||
usmops za2.s, p4/m, p5/m, z3.b, z2.b
|
||||
usmops za3.s, p6/m, p7/m, z4.b, z1.b
|
||||
|
||||
/* Register aliases. */
|
||||
foo .req za3
|
||||
bar .req za7
|
||||
baz .req za0
|
||||
|
||||
bfmopa foo.s, p6/m, p7/m, z4.h, z1.h
|
||||
bfmops foo.s, p6/m, p7/m, z4.h, z1.h
|
||||
fmopa foo.s, p6/m, p7/m, z4.h, z1.h
|
||||
fmops foo.s, p6/m, p7/m, z4.s, z1.s
|
||||
umopa foo.s, p6/m, p7/m, z4.b, z1.b
|
||||
umops foo.s, p6/m, p7/m, z4.b, z1.b
|
||||
usmopa foo.s, p4/m, p3/m, z4.b, z1.b
|
||||
usmops foo.s, p6/m, p7/m, z4.b, z1.b
|
||||
@ -445,6 +445,9 @@ enum aarch64_opnd
|
||||
AARCH64_OPND_SVE_ZnxN, /* SVE vector register list in Zn. */
|
||||
AARCH64_OPND_SVE_Zt, /* SVE vector register in Zt. */
|
||||
AARCH64_OPND_SVE_ZtxN, /* SVE vector register list in Zt. */
|
||||
AARCH64_OPND_SME_ZAda_2b, /* SME <ZAda>.S, 2-bits. */
|
||||
AARCH64_OPND_SME_ZAda_3b, /* SME <ZAda>.D, 3-bits. */
|
||||
AARCH64_OPND_SME_Pm, /* SME scalable predicate register, bits [15:13]. */
|
||||
AARCH64_OPND_TME_UIMM16, /* TME unsigned 16-bit immediate. */
|
||||
AARCH64_OPND_SM3_IMM2, /* SM3 encodes lane in bits [13, 14]. */
|
||||
};
|
||||
@ -609,6 +612,7 @@ enum aarch64_insn_class
|
||||
movewide,
|
||||
pcreladdr,
|
||||
ic_system,
|
||||
sme_misc,
|
||||
sve_cpy,
|
||||
sve_index,
|
||||
sve_limm,
|
||||
|
||||
@ -661,6 +661,9 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
case 198:
|
||||
case 204:
|
||||
case 207:
|
||||
case 209:
|
||||
case 210:
|
||||
case 211:
|
||||
return aarch64_ins_regno (self, info, code, inst, errors);
|
||||
case 15:
|
||||
return aarch64_ins_reg_extended (self, info, code, inst, errors);
|
||||
@ -672,7 +675,7 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
case 33:
|
||||
case 34:
|
||||
case 35:
|
||||
case 210:
|
||||
case 213:
|
||||
return aarch64_ins_reglane (self, info, code, inst, errors);
|
||||
case 36:
|
||||
return aarch64_ins_reglist (self, info, code, inst, errors);
|
||||
@ -717,7 +720,7 @@ aarch64_insert_operand (const aarch64_operand *self,
|
||||
case 187:
|
||||
case 188:
|
||||
case 189:
|
||||
case 209:
|
||||
case 212:
|
||||
return aarch64_ins_imm (self, info, code, inst, errors);
|
||||
case 44:
|
||||
case 45:
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -233,6 +233,9 @@ const struct aarch64_operand aarch64_operands[] =
|
||||
{AARCH64_OPND_CLASS_SVE_REG, "SVE_ZnxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zn}, "a list of SVE vector registers"},
|
||||
{AARCH64_OPND_CLASS_SVE_REG, "SVE_Zt", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zt}, "an SVE vector register"},
|
||||
{AARCH64_OPND_CLASS_SVE_REG, "SVE_ZtxN", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SVE_Zt}, "a list of SVE vector registers"},
|
||||
{AARCH64_OPND_CLASS_SVE_REG, "SME_ZAda_2b", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_ZAda_2b}, "an SME ZA tile ZA0-ZA3"},
|
||||
{AARCH64_OPND_CLASS_SVE_REG, "SME_ZAda_3b", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_ZAda_3b}, "an SME ZA tile ZA0-ZA7"},
|
||||
{AARCH64_OPND_CLASS_PRED_REG, "SME_Pm", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SME_Pm}, "an SVE predicate register"},
|
||||
{AARCH64_OPND_CLASS_IMMEDIATE, "TME_UIMM16", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_imm16}, "a 16-bit unsigned immediate for TME tcancel"},
|
||||
{AARCH64_OPND_CLASS_SIMD_ELEMENT, "SM3_IMM2", OPD_F_HAS_INSERTER | OPD_F_HAS_EXTRACTOR, {FLD_SM3_imm2}, "an indexed SM3 vector immediate"},
|
||||
{AARCH64_OPND_CLASS_NIL, "", 0, {0}, "DUMMY"},
|
||||
|
||||
@ -321,6 +321,9 @@ const aarch64_field fields[] =
|
||||
{ 19, 2 }, /* SVE_tszl_19: triangular size select low, bits [20,19]. */
|
||||
{ 14, 1 }, /* SVE_xs_14: UXTW/SXTW select (bit 14). */
|
||||
{ 22, 1 }, /* SVE_xs_22: UXTW/SXTW select (bit 22). */
|
||||
{ 0, 2 }, /* SME ZAda tile ZA0-ZA3. */
|
||||
{ 0, 3 }, /* SME ZAda tile ZA0-ZA7. */
|
||||
{ 13, 3 }, /* SME Pm second source scalable predicate register P0-P7. */
|
||||
{ 11, 2 }, /* rotate1: FCMLA immediate rotate. */
|
||||
{ 13, 2 }, /* rotate2: Indexed element FCMLA immediate rotate. */
|
||||
{ 12, 1 }, /* rotate3: FCADD immediate rotate. */
|
||||
@ -3304,6 +3307,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
|
||||
case AARCH64_OPND_SVE_Pm:
|
||||
case AARCH64_OPND_SVE_Pn:
|
||||
case AARCH64_OPND_SVE_Pt:
|
||||
case AARCH64_OPND_SME_Pm:
|
||||
if (opnd->qualifier == AARCH64_OPND_QLF_NIL)
|
||||
snprintf (buf, size, "p%d", opnd->reg.regno);
|
||||
else if (opnd->qualifier == AARCH64_OPND_QLF_P_Z
|
||||
@ -3345,6 +3349,12 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
|
||||
opnd->reglane.index);
|
||||
break;
|
||||
|
||||
case AARCH64_OPND_SME_ZAda_2b:
|
||||
case AARCH64_OPND_SME_ZAda_3b:
|
||||
snprintf (buf, size, "za%d.%s", opnd->reg.regno,
|
||||
aarch64_get_qualifier_name (opnd->qualifier));
|
||||
break;
|
||||
|
||||
case AARCH64_OPND_CRn:
|
||||
case AARCH64_OPND_CRm:
|
||||
snprintf (buf, size, "C%" PRIi64, opnd->imm.value);
|
||||
@ -5277,6 +5287,7 @@ verify_constraints (const struct aarch64_inst *inst,
|
||||
case AARCH64_OPND_SVE_Pm:
|
||||
case AARCH64_OPND_SVE_Pn:
|
||||
case AARCH64_OPND_SVE_Pt:
|
||||
case AARCH64_OPND_SME_Pm:
|
||||
inst_pred = inst_op;
|
||||
inst_pred_idx = i;
|
||||
break;
|
||||
|
||||
@ -150,6 +150,9 @@ enum aarch64_field_kind
|
||||
FLD_SVE_tszl_19,
|
||||
FLD_SVE_xs_14,
|
||||
FLD_SVE_xs_22,
|
||||
FLD_SME_ZAda_2b,
|
||||
FLD_SME_ZAda_3b,
|
||||
FLD_SME_Pm,
|
||||
FLD_rotate1,
|
||||
FLD_rotate2,
|
||||
FLD_rotate3,
|
||||
|
||||
@ -2168,6 +2168,42 @@
|
||||
{ \
|
||||
QLF3(X,X,NIL), \
|
||||
}
|
||||
/* e.g. ADDVA <ZAda>.S, <Pn>/M, <Pm>/M, <Zn>.S */
|
||||
#define OP_SME_ZADA_PN_PM_ZN_S \
|
||||
{ \
|
||||
QLF4(S_S,P_M,P_M,S_S), \
|
||||
}
|
||||
/* e.g. ADDVA <ZAda>.D, <Pn>/M, <Pm>/M, <Zn>.D */
|
||||
#define OP_SME_ZADA_PN_PM_ZN_D \
|
||||
{ \
|
||||
QLF4(S_D,P_M,P_M,S_D), \
|
||||
}
|
||||
/* e.g. BFMOPA <ZAda>.S, <Pn>/M, <Pm>/M, <Zn>.H, <Zm>.H */
|
||||
#define OP_SME_ZADA_PN_PM_ZN_ZM \
|
||||
{ \
|
||||
QLF5(S_S,P_M,P_M,S_H,S_H), \
|
||||
}
|
||||
#define OP_SME_ZADA_S_PM_PM_S_S \
|
||||
{ \
|
||||
QLF5(S_S,P_M,P_M,S_S,S_S) \
|
||||
}
|
||||
#define OP_SME_ZADA_D_PM_PM_D_D \
|
||||
{ \
|
||||
QLF5(S_D,P_M,P_M,S_D,S_D) \
|
||||
}
|
||||
#define OP_SME_ZADA_S_PM_PM_H_H \
|
||||
{ \
|
||||
QLF5(S_S,P_M,P_M,S_H,S_H) \
|
||||
}
|
||||
#define OP_SME_ZADA_S_PM_PM_B_B \
|
||||
{ \
|
||||
QLF5(S_S,P_M,P_M,S_B,S_B) \
|
||||
}
|
||||
#define OP_SME_ZADA_D_PM_PM_H_H \
|
||||
{ \
|
||||
QLF5(S_D,P_M,P_M,S_H,S_H) \
|
||||
}
|
||||
|
||||
/* e.g. UDOT <Vd>.2S, <Vn>.8B, <Vm>.8B. */
|
||||
#define QL_V3DOT \
|
||||
{ \
|
||||
@ -2564,6 +2600,18 @@ static const aarch64_feature_set aarch64_feature_flagm =
|
||||
#define SVE2SM4_INSNC(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,CONSTRAINTS,TIED) \
|
||||
{ NAME, OPCODE, MASK, CLASS, OP, SVE2_SM4, OPS, QUALS, \
|
||||
FLAGS | F_STRICT, CONSTRAINTS, TIED, NULL }
|
||||
#define SME_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
|
||||
{ NAME, OPCODE, MASK, CLASS, OP, SME, OPS, QUALS, \
|
||||
FLAGS, 0, TIED, NULL }
|
||||
#define SME_F64_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
|
||||
{ NAME, OPCODE, MASK, CLASS, OP, SME_F64, OPS, QUALS, \
|
||||
FLAGS, 0, TIED, NULL }
|
||||
#define SME_I64_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
|
||||
{ NAME, OPCODE, MASK, CLASS, OP, SME_I64, OPS, QUALS, \
|
||||
FLAGS, 0, TIED, NULL }
|
||||
#define SME_INSNC(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,CONSTRAINTS,TIED) \
|
||||
{ NAME, OPCODE, MASK, CLASS, OP, SME, OPS, QUALS, \
|
||||
FLAGS, CONSTRAINTS, TIED, NULL }
|
||||
#define SVE2BITPERM_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS,TIED) \
|
||||
{ NAME, OPCODE, MASK, CLASS, OP, SVE2_BITPERM, OPS, QUALS, \
|
||||
FLAGS | F_STRICT, 0, TIED, NULL }
|
||||
@ -5045,6 +5093,35 @@ const struct aarch64_opcode aarch64_opcode_table[] =
|
||||
SVE2BITPERM_INSN ("bdep", 0x4500b400, 0xff20fc00, sve_size_bhsd, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
|
||||
SVE2BITPERM_INSN ("bext", 0x4500b000, 0xff20fc00, sve_size_bhsd, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
|
||||
SVE2BITPERM_INSN ("bgrp", 0x4500b800, 0xff20fc00, sve_size_bhsd, 0, OP3 (SVE_Zd, SVE_Zn, SVE_Zm_16), OP_SVE_VVV_BHSD, 0, 0),
|
||||
/* SME instructions. */
|
||||
SME_INSN ("addha", 0xc0900000, 0xffff001c, sme_misc, 0, OP4 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn), OP_SME_ZADA_PN_PM_ZN_S, 0, 0),
|
||||
SME_I64_INSN ("addha", 0xc0d00000, 0xffff0018, sme_misc, 0, OP4 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn), OP_SME_ZADA_PN_PM_ZN_D, 0, 0),
|
||||
SME_INSN ("addva", 0xc0910000, 0xffff001c, sme_misc, 0, OP4 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn), OP_SME_ZADA_PN_PM_ZN_S, 0, 0),
|
||||
SME_I64_INSN ("addva", 0xc0d10000, 0xffff0018, sme_misc, 0, OP4 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn), OP_SME_ZADA_PN_PM_ZN_D, 0, 0),
|
||||
SME_INSN ("bfmopa", 0x81800000, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_PN_PM_ZN_ZM, 0, 0),
|
||||
SME_INSN ("bfmops", 0x81800010, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_PN_PM_ZN_ZM, 0, 0),
|
||||
SME_INSN ("fmopa", 0x80800000, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_S_S, 0, 0),
|
||||
SME_F64_INSN ("fmopa", 0x80c00000, 0xffe00018, sme_misc, 0, OP5 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_D_PM_PM_D_D, 0, 0),
|
||||
SME_INSN ("fmopa", 0x81a00000, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_H_H, 0, 0),
|
||||
SME_INSN ("fmops", 0x80800010, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_S_S, 0, 0),
|
||||
SME_F64_INSN ("fmops", 0x80c00010, 0xffe00018, sme_misc, 0, OP5 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_D_PM_PM_D_D, 0, 0),
|
||||
SME_INSN ("fmops", 0x81a00010, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_H_H, 0, 0),
|
||||
SME_INSN ("smopa", 0xa0800000, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_B_B, 0, 0),
|
||||
SME_I64_INSN ("smopa", 0xa0c00000, 0xffe00018, sme_misc, 0, OP5 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_D_PM_PM_H_H, 0, 0),
|
||||
SME_INSN ("smops", 0xa0800010, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_B_B, 0, 0),
|
||||
SME_I64_INSN ("smops", 0xa0c00010, 0xffe00018, sme_misc, 0, OP5 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_D_PM_PM_H_H, 0, 0),
|
||||
SME_INSN ("sumopa", 0xa0a00000, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_B_B, 0, 0),
|
||||
SME_I64_INSN ("sumopa", 0xa0e00000, 0xffe00018, sme_misc, 0, OP5 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_D_PM_PM_H_H, 0, 0),
|
||||
SME_INSN ("sumops", 0xa0a00010 ,0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_B_B, 0, 0),
|
||||
SME_I64_INSN ("sumops", 0xa0e00010 ,0xffe00018, sme_misc, 0, OP5 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_D_PM_PM_H_H, 0, 0),
|
||||
SME_INSN ("umopa", 0xa1a00000, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_B_B, 0, 0),
|
||||
SME_I64_INSN ("umopa", 0xa1e00000, 0xffe00018, sme_misc, 0, OP5 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_D_PM_PM_H_H, 0, 0),
|
||||
SME_INSN ("umops", 0xa1a00010 ,0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_B_B, 0, 0),
|
||||
SME_I64_INSN ("umops", 0xa1e00010 ,0xffe00018, sme_misc, 0, OP5 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_D_PM_PM_H_H, 0, 0),
|
||||
SME_INSN ("usmopa", 0xa1800000, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_B_B, 0, 0),
|
||||
SME_I64_INSN ("usmopa", 0xa1c00000, 0xffe00018, sme_misc, 0, OP5 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_D_PM_PM_H_H, 0, 0),
|
||||
SME_INSN ("usmops", 0xa1800010, 0xffe0001c, sme_misc, 0, OP5 (SME_ZAda_2b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_S_PM_PM_B_B, 0, 0),
|
||||
SME_I64_INSN ("usmops", 0xa1c00010, 0xffe00018, sme_misc, 0, OP5 (SME_ZAda_3b, SVE_Pg3, SME_Pm, SVE_Zn, SVE_Zm_16), OP_SME_ZADA_D_PM_PM_H_H, 0, 0),
|
||||
|
||||
/* SIMD Dot Product (optional in v8.2-A). */
|
||||
DOT_INSN ("udot", 0x2e009400, 0xbf20fc00, dotproduct, OP3 (Vd, Vn, Vm), QL_V3DOT, F_SIZEQ),
|
||||
@ -5613,6 +5690,12 @@ const struct aarch64_opcode aarch64_opcode_table[] =
|
||||
"an SVE vector register") \
|
||||
Y(SVE_REG, sve_reglist, "SVE_ZtxN", 0, F(FLD_SVE_Zt), \
|
||||
"a list of SVE vector registers") \
|
||||
Y(SVE_REG, regno, "SME_ZAda_2b", 0, F(FLD_SME_ZAda_2b), \
|
||||
"an SME ZA tile ZA0-ZA3") \
|
||||
Y(SVE_REG, regno, "SME_ZAda_3b", 0, F(FLD_SME_ZAda_3b), \
|
||||
"an SME ZA tile ZA0-ZA7") \
|
||||
Y(PRED_REG, regno, "SME_Pm", 0, F(FLD_SME_Pm), \
|
||||
"an SVE predicate register") \
|
||||
Y(IMMEDIATE, imm, "TME_UIMM16", 0, F(FLD_imm16), \
|
||||
"a 16-bit unsigned immediate for TME tcancel") \
|
||||
Y(SIMD_ELEMENT, reglane, "SM3_IMM2", 0, F(FLD_SM3_imm2), \
|
||||
|
||||
Reference in New Issue
Block a user