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Allow the --visualize-jumps feature to work with the AVR disassembler.

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* avr-dis.c (avr_operand); Pass in disassemble_info and fill
	in insn_type on branching instructions.
This commit is contained in:
Marcus Nilsson
2021-12-02 13:57:11 +00:00
committed by Nick Clifton
parent 6cade9185c
commit 96c7115a9a
2 changed files with 37 additions and 5 deletions
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5
opcodes/ChangeLog
View File

@ -1,3 +1,8 @@
2021-12-02 Marcus Nilsson <brainbomb@gmail.com>
* avr-dis.c (avr_operand); Pass in disassemble_info and fill
in insn_type on branching instructions.
2021-11-25 Andrew Burgess <aburgess@redhat.com> 2021-11-25 Andrew Burgess <aburgess@redhat.com>
Simon Cook <simon.cook@embecosm.com> Simon Cook <simon.cook@embecosm.com>

37
opcodes/avr-dis.c
View File

@ -49,8 +49,17 @@ const struct avr_opcodes_s avr_opcodes[] =
static const char * comment_start = "0x"; static const char * comment_start = "0x";
static int static int
avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constraint, avr_operand (unsigned int insn,
char *opcode_str, char *buf, char *comment, int regs, int *sym, bfd_vma *sym_addr) unsigned int insn2,
unsigned int pc,
int constraint,
char * opcode_str,
char * buf,
char * comment,
int regs,
int * sym,
bfd_vma * sym_addr,
disassemble_info * info)
{ {
int ok = 1; int ok = 1;
*sym = 0; *sym = 0;
@ -161,6 +170,9 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra
objdump_print_address() which would affect many targets. */ objdump_print_address() which would affect many targets. */
sprintf (buf, "%#lx", (unsigned long) *sym_addr); sprintf (buf, "%#lx", (unsigned long) *sym_addr);
strcpy (comment, comment_start); strcpy (comment, comment_start);
info->insn_info_valid = 1;
info->insn_type = dis_jsr;
info->target = *sym_addr;
break; break;
case 'L': case 'L':
@ -170,6 +182,9 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra
*sym = 1; *sym = 1;
*sym_addr = pc + 2 + rel_addr; *sym_addr = pc + 2 + rel_addr;
strcpy (comment, comment_start); strcpy (comment, comment_start);
info->insn_info_valid = 1;
info->insn_type = dis_branch;
info->target = *sym_addr;
} }
break; break;
@ -181,6 +196,9 @@ avr_operand (unsigned int insn, unsigned int insn2, unsigned int pc, int constra
*sym = 1; *sym = 1;
*sym_addr = pc + 2 + rel_addr; *sym_addr = pc + 2 + rel_addr;
strcpy (comment, comment_start); strcpy (comment, comment_start);
info->insn_info_valid = 1;
info->insn_type = dis_condbranch;
info->target = *sym_addr;
} }
break; break;
@ -314,6 +332,13 @@ print_insn_avr (bfd_vma addr, disassemble_info *info)
int sym_op1 = 0, sym_op2 = 0; int sym_op1 = 0, sym_op2 = 0;
bfd_vma sym_addr1, sym_addr2; bfd_vma sym_addr1, sym_addr2;
/* Clear instruction information field. */
info->insn_info_valid = 0;
info->branch_delay_insns = 0;
info->data_size = 0;
info->insn_type = dis_noninsn;
info->target = 0;
info->target2 = 0;
if (!initialized) if (!initialized)
{ {
@ -395,11 +420,13 @@ print_insn_avr (bfd_vma addr, disassemble_info *info)
{ {
int regs = REGISTER_P (*constraints); int regs = REGISTER_P (*constraints);
ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1, comment1, 0, &sym_op1, &sym_addr1); ok = avr_operand (insn, insn2, addr, *constraints, opcode_str, op1,
comment1, 0, &sym_op1, &sym_addr1, info);
if (ok && *(++constraints) == ',') if (ok && *(++constraints) == ',')
ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str, op2, ok = avr_operand (insn, insn2, addr, *(++constraints), opcode_str,
*comment1 ? comment2 : comment1, regs, &sym_op2, &sym_addr2); op2, *comment1 ? comment2 : comment1, regs,
&sym_op2, &sym_addr2, info);
} }
} }