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import gdb-1999-08-09 snapshot
This commit is contained in:
Jason Molenda
656
sim/m32r/cpu.h
656
sim/m32r/cpu.h
@ -117,317 +117,109 @@ typedef struct {
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int empty;
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} MODEL_TEST_DATA;
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/* Instruction argument buffer. */
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union sem_fields {
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struct { /* empty sformat for unspecified field list */
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int empty;
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} fmt_empty;
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struct { /* e.g. add $dr,$sr */
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SI * i_dr;
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SI * i_sr;
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unsigned char in_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_add;
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struct { /* e.g. add3 $dr,$sr,$hash$slo16 */
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INT f_simm16;
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_add3;
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struct { /* e.g. and3 $dr,$sr,$uimm16 */
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UINT f_uimm16;
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_and3;
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struct { /* e.g. or3 $dr,$sr,$hash$ulo16 */
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UINT f_uimm16;
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_or3;
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struct { /* e.g. addi $dr,$simm8 */
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INT f_simm8;
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SI * i_dr;
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unsigned char in_dr;
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unsigned char out_dr;
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} fmt_addi;
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struct { /* e.g. addv $dr,$sr */
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SI * i_dr;
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SI * i_sr;
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unsigned char in_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_addv;
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struct { /* e.g. addv3 $dr,$sr,$simm16 */
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INT f_simm16;
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_addv3;
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struct { /* e.g. addx $dr,$sr */
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SI * i_dr;
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SI * i_sr;
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unsigned char in_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_addx;
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struct { /* e.g. cmp $src1,$src2 */
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_cmp;
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struct { /* e.g. cmpi $src2,$simm16 */
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INT f_simm16;
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SI * i_src2;
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unsigned char in_src2;
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} fmt_cmpi;
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struct { /* e.g. div $dr,$sr */
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SI * i_dr;
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SI * i_sr;
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unsigned char in_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_div;
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struct { /* e.g. ld $dr,@$sr */
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_ld;
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struct { /* e.g. ld $dr,@($slo16,$sr) */
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INT f_simm16;
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_ld_d;
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struct { /* e.g. ldb $dr,@$sr */
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_ldb;
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struct { /* e.g. ldb $dr,@($slo16,$sr) */
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INT f_simm16;
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_ldb_d;
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struct { /* e.g. ldh $dr,@$sr */
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_ldh;
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struct { /* e.g. ldh $dr,@($slo16,$sr) */
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INT f_simm16;
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_ldh_d;
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struct { /* e.g. ld $dr,@$sr+ */
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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unsigned char out_sr;
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} fmt_ld_plus;
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struct { /* e.g. ld24 $dr,$uimm24 */
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ADDR i_uimm24;
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SI * i_dr;
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unsigned char out_dr;
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} fmt_ld24;
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struct { /* e.g. ldi8 $dr,$simm8 */
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INT f_simm8;
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SI * i_dr;
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unsigned char out_dr;
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} fmt_ldi8;
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struct { /* e.g. ldi16 $dr,$hash$slo16 */
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INT f_simm16;
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SI * i_dr;
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unsigned char out_dr;
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} fmt_ldi16;
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struct { /* e.g. lock $dr,@$sr */
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_lock;
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struct { /* e.g. machi $src1,$src2 */
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_machi;
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struct { /* e.g. mulhi $src1,$src2 */
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_mulhi;
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struct { /* e.g. mv $dr,$sr */
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_mv;
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struct { /* e.g. mvfachi $dr */
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SI * i_dr;
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unsigned char out_dr;
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} fmt_mvfachi;
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struct { /* e.g. mvfc $dr,$scr */
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UINT f_r2;
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SI * i_dr;
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unsigned char out_dr;
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} fmt_mvfc;
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struct { /* e.g. mvtachi $src1 */
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SI * i_src1;
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unsigned char in_src1;
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} fmt_mvtachi;
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struct { /* e.g. mvtc $sr,$dcr */
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UINT f_r1;
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SI * i_sr;
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unsigned char in_sr;
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} fmt_mvtc;
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struct { /* e.g. nop */
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int empty;
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} fmt_nop;
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struct { /* e.g. rac */
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int empty;
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} fmt_rac;
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struct { /* e.g. seth $dr,$hash$hi16 */
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UINT f_hi16;
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SI * i_dr;
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unsigned char out_dr;
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} fmt_seth;
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struct { /* e.g. sll3 $dr,$sr,$simm16 */
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INT f_simm16;
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SI * i_sr;
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SI * i_dr;
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unsigned char in_sr;
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unsigned char out_dr;
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} fmt_sll3;
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struct { /* e.g. slli $dr,$uimm5 */
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UINT f_uimm5;
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SI * i_dr;
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unsigned char in_dr;
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unsigned char out_dr;
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} fmt_slli;
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struct { /* e.g. st $src1,@$src2 */
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_st;
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struct { /* e.g. st $src1,@($slo16,$src2) */
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INT f_simm16;
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_st_d;
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struct { /* e.g. stb $src1,@$src2 */
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_stb;
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struct { /* e.g. stb $src1,@($slo16,$src2) */
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INT f_simm16;
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_stb_d;
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struct { /* e.g. sth $src1,@$src2 */
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_sth;
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struct { /* e.g. sth $src1,@($slo16,$src2) */
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INT f_simm16;
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_sth_d;
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struct { /* e.g. st $src1,@+$src2 */
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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unsigned char out_src2;
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} fmt_st_plus;
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struct { /* e.g. unlock $src1,@$src2 */
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_unlock;
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/* cti insns, kept separately so addr_cache is in fixed place */
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struct {
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union {
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struct { /* e.g. bc.s $disp8 */
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IADDR i_disp8;
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} fmt_bc8;
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struct { /* e.g. bc.l $disp24 */
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IADDR i_disp24;
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} fmt_bc24;
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struct { /* e.g. beq $src1,$src2,$disp16 */
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IADDR i_disp16;
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SI * i_src1;
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SI * i_src2;
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unsigned char in_src1;
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unsigned char in_src2;
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} fmt_beq;
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struct { /* e.g. beqz $src2,$disp16 */
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IADDR i_disp16;
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SI * i_src2;
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unsigned char in_src2;
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} fmt_beqz;
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struct { /* e.g. bl.s $disp8 */
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IADDR i_disp8;
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unsigned char out_h_gr_14;
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} fmt_bl8;
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struct { /* e.g. bl.l $disp24 */
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IADDR i_disp24;
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unsigned char out_h_gr_14;
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} fmt_bl24;
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struct { /* e.g. bra.s $disp8 */
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IADDR i_disp8;
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} fmt_bra8;
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struct { /* e.g. bra.l $disp24 */
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IADDR i_disp24;
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} fmt_bra24;
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struct { /* e.g. jl $sr */
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SI * i_sr;
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unsigned char in_sr;
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unsigned char out_h_gr_14;
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} fmt_jl;
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struct { /* e.g. jmp $sr */
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SI * i_sr;
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unsigned char in_sr;
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} fmt_jmp;
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struct { /* e.g. rte */
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int empty;
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} fmt_rte;
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struct { /* e.g. trap $uimm4 */
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UINT f_uimm4;
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} fmt_trap;
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} fields;
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#if WITH_SCACHE_PBB
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SEM_PC addr_cache;
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#endif
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} cti;
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struct { /* no operands */
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int empty;
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} fmt_empty;
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struct { /* */
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UINT f_uimm4;
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} sfmt_trap;
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struct { /* */
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IADDR i_disp24;
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unsigned char out_h_gr_14;
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} sfmt_bl24;
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struct { /* */
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IADDR i_disp8;
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unsigned char out_h_gr_14;
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} sfmt_bl8;
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struct { /* */
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SI* i_dr;
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UINT f_hi16;
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unsigned char out_dr;
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} sfmt_seth;
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struct { /* */
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SI* i_sr;
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UINT f_r1;
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unsigned char in_sr;
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} sfmt_mvtc;
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struct { /* */
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SI* i_dr;
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UINT f_r2;
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unsigned char out_dr;
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} sfmt_mvfc;
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struct { /* */
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ADDR i_uimm24;
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SI* i_dr;
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unsigned char out_dr;
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} sfmt_ld24;
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struct { /* */
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SI* i_sr;
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unsigned char in_sr;
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unsigned char out_h_gr_14;
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} sfmt_jl;
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struct { /* */
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SI* i_dr;
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UINT f_uimm5;
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unsigned char in_dr;
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unsigned char out_dr;
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} sfmt_slli;
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struct { /* */
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SI* i_dr;
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INT f_simm8;
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unsigned char in_dr;
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unsigned char out_dr;
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} sfmt_addi;
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struct { /* */
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SI* i_src1;
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SI* i_src2;
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unsigned char in_src1;
|
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unsigned char in_src2;
|
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unsigned char out_src2;
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} sfmt_st_plus;
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struct { /* */
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SI* i_src1;
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SI* i_src2;
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INT f_simm16;
|
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unsigned char in_src1;
|
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unsigned char in_src2;
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} sfmt_st_d;
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struct { /* */
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||||
SI* i_dr;
|
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SI* i_sr;
|
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unsigned char in_sr;
|
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unsigned char out_dr;
|
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unsigned char out_sr;
|
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} sfmt_ld_plus;
|
||||
struct { /* */
|
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IADDR i_disp16;
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SI* i_src1;
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SI* i_src2;
|
||||
unsigned char in_src1;
|
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unsigned char in_src2;
|
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} sfmt_beq;
|
||||
struct { /* */
|
||||
SI* i_dr;
|
||||
SI* i_sr;
|
||||
UINT f_uimm16;
|
||||
unsigned char in_sr;
|
||||
unsigned char out_dr;
|
||||
} sfmt_and3;
|
||||
struct { /* */
|
||||
SI* i_dr;
|
||||
SI* i_sr;
|
||||
INT f_simm16;
|
||||
unsigned char in_sr;
|
||||
unsigned char out_dr;
|
||||
} sfmt_add3;
|
||||
struct { /* */
|
||||
SI* i_dr;
|
||||
SI* i_sr;
|
||||
unsigned char in_dr;
|
||||
unsigned char in_sr;
|
||||
unsigned char out_dr;
|
||||
} sfmt_add;
|
||||
#if WITH_SCACHE_PBB
|
||||
/* Writeback handler. */
|
||||
struct {
|
||||
@ -449,6 +241,7 @@ union sem_fields {
|
||||
int insn_count;
|
||||
/* Next pbb to execute. */
|
||||
SCACHE *next;
|
||||
SCACHE *branch_target;
|
||||
} chain;
|
||||
#endif
|
||||
};
|
||||
@ -460,6 +253,9 @@ struct argbuf {
|
||||
const IDESC *idesc;
|
||||
char trace_p;
|
||||
char profile_p;
|
||||
/* ??? Temporary hack for skip insns. */
|
||||
char skip_count;
|
||||
char unused;
|
||||
/* cpu specific data follows */
|
||||
union sem semantic;
|
||||
int written;
|
||||
@ -480,13 +276,11 @@ struct scache {
|
||||
These define and assign the local vars that contain the insn's fields. */
|
||||
|
||||
#define EXTRACT_IFMT_EMPTY_VARS \
|
||||
/* Instruction fields. */ \
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_EMPTY_CODE \
|
||||
length = 0; \
|
||||
|
||||
#define EXTRACT_IFMT_ADD_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -494,13 +288,12 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_ADD_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
|
||||
|
||||
#define EXTRACT_IFMT_ADD3_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -509,14 +302,13 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_ADD3_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
|
||||
|
||||
#define EXTRACT_IFMT_AND3_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -525,14 +317,13 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_AND3_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
|
||||
f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
|
||||
f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \
|
||||
|
||||
#define EXTRACT_IFMT_OR3_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -541,26 +332,24 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_OR3_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
|
||||
f_uimm16 = EXTRACT_UINT (insn, 32, 16, 16); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
|
||||
f_uimm16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \
|
||||
|
||||
#define EXTRACT_IFMT_ADDI_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
INT f_simm8; \
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_ADDI_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_simm8 = EXTRACT_INT (insn, 16, 8, 8); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_simm8 = EXTRACT_MSB0_INT (insn, 16, 8, 8); \
|
||||
|
||||
#define EXTRACT_IFMT_ADDV3_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -569,38 +358,35 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_ADDV3_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
|
||||
|
||||
#define EXTRACT_IFMT_BC8_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
SI f_disp8; \
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_BC8_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_disp8 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_disp8 = ((((EXTRACT_MSB0_INT (insn, 16, 8, 8)) << (2))) + (((pc) & (-4)))); \
|
||||
|
||||
#define EXTRACT_IFMT_BC24_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
SI f_disp24; \
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_BC24_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_disp24 = ((((EXTRACT_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_disp24 = ((((EXTRACT_MSB0_INT (insn, 32, 8, 24)) << (2))) + (pc)); \
|
||||
|
||||
#define EXTRACT_IFMT_BEQ_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -609,14 +395,13 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_BEQ_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
|
||||
f_disp16 = ((((EXTRACT_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
|
||||
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
|
||||
|
||||
#define EXTRACT_IFMT_BEQZ_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -625,14 +410,13 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_BEQZ_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
|
||||
f_disp16 = ((((EXTRACT_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
|
||||
f_disp16 = ((((EXTRACT_MSB0_INT (insn, 32, 16, 16)) << (2))) + (pc)); \
|
||||
|
||||
#define EXTRACT_IFMT_CMP_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -640,13 +424,12 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_CMP_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
|
||||
|
||||
#define EXTRACT_IFMT_CMPI_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -655,14 +438,13 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_CMPI_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
|
||||
|
||||
#define EXTRACT_IFMT_DIV_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -671,14 +453,13 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_DIV_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
|
||||
|
||||
#define EXTRACT_IFMT_JL_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -686,25 +467,23 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_JL_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
|
||||
|
||||
#define EXTRACT_IFMT_LD24_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_uimm24; \
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_LD24_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_uimm24 = EXTRACT_UINT (insn, 32, 8, 24); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_uimm24 = EXTRACT_MSB0_UINT (insn, 32, 8, 24); \
|
||||
|
||||
#define EXTRACT_IFMT_LDI16_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -713,14 +492,13 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_LDI16_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
|
||||
|
||||
#define EXTRACT_IFMT_MVFACHI_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -728,13 +506,12 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_MVFACHI_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
|
||||
|
||||
#define EXTRACT_IFMT_MVFC_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -742,13 +519,12 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_MVFC_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
|
||||
|
||||
#define EXTRACT_IFMT_MVTACHI_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -756,13 +532,12 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_MVTACHI_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
|
||||
|
||||
#define EXTRACT_IFMT_MVTC_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -770,13 +545,12 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_MVTC_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
|
||||
|
||||
#define EXTRACT_IFMT_NOP_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -784,13 +558,12 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_NOP_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 16, 12, 4); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
|
||||
|
||||
#define EXTRACT_IFMT_SETH_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -799,14 +572,13 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_SETH_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
|
||||
f_hi16 = EXTRACT_UINT (insn, 32, 16, 16); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
|
||||
f_hi16 = EXTRACT_MSB0_UINT (insn, 32, 16, 16); \
|
||||
|
||||
#define EXTRACT_IFMT_SLLI_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_shift_op2; \
|
||||
@ -814,13 +586,12 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_SLLI_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_shift_op2 = EXTRACT_UINT (insn, 16, 8, 3); \
|
||||
f_uimm5 = EXTRACT_UINT (insn, 16, 11, 5); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_shift_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 3); \
|
||||
f_uimm5 = EXTRACT_MSB0_UINT (insn, 16, 11, 5); \
|
||||
|
||||
#define EXTRACT_IFMT_ST_D_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -829,14 +600,13 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_ST_D_CODE \
|
||||
length = 4; \
|
||||
f_op1 = EXTRACT_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_INT (insn, 32, 16, 16); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 32, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 32, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 32, 8, 4); \
|
||||
f_r2 = EXTRACT_MSB0_UINT (insn, 32, 12, 4); \
|
||||
f_simm16 = EXTRACT_MSB0_INT (insn, 32, 16, 16); \
|
||||
|
||||
#define EXTRACT_IFMT_TRAP_VARS \
|
||||
/* Instruction fields. */ \
|
||||
UINT f_op1; \
|
||||
UINT f_r1; \
|
||||
UINT f_op2; \
|
||||
@ -844,10 +614,10 @@ struct scache {
|
||||
unsigned int length;
|
||||
#define EXTRACT_IFMT_TRAP_CODE \
|
||||
length = 2; \
|
||||
f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_UINT (insn, 16, 8, 4); \
|
||||
f_uimm4 = EXTRACT_UINT (insn, 16, 12, 4); \
|
||||
f_op1 = EXTRACT_MSB0_UINT (insn, 16, 0, 4); \
|
||||
f_r1 = EXTRACT_MSB0_UINT (insn, 16, 4, 4); \
|
||||
f_op2 = EXTRACT_MSB0_UINT (insn, 16, 8, 4); \
|
||||
f_uimm4 = EXTRACT_MSB0_UINT (insn, 16, 12, 4); \
|
||||
|
||||
/* Collection of various things for the trace handler to use. */
|
||||
|
||||
|
||||
Reference in New Issue
Block a user