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Bye Bye PPC_OPCODE_VSX3
This bit is also useless as it can be replaced with PPC_OPCODE_POWER9. Defining the VSX2 and VSX3 selection based on cpu bits also lets the assembler/disassembler distinguish between the power7 VSX opcodes and the power8 ones. Note that this change means -mvsx now reverts back to just adding the power7 VSX insns. include/ * opcode/ppc.h (PPC_OPCODE_VSX3): Delete. opcodes/ * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_VSX3. * ppc-opc.c (PPCVSX2): Define as PPC_OPCODE_POWER8. (PPCVSX3): Define as PPC_OPCODE_POWER9.
This commit is contained in:
@ -1,6 +1,7 @@
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2017-04-11 Alan Modra <amodra@gmail.com>
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2017-04-11 Alan Modra <amodra@gmail.com>
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* opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete.
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* opcode/ppc.h (PPC_OPCODE_ALTIVEC2): Delete.
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(PPC_OPCODE_VSX3): Delete.
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2017-04-06 Pip Cet <pipcet@gmail.com>
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2017-04-06 Pip Cet <pipcet@gmail.com>
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@ -208,9 +208,6 @@ extern const int vle_num_opcodes;
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/* Opcode is only supported by Power9 architecture. */
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/* Opcode is only supported by Power9 architecture. */
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#define PPC_OPCODE_POWER9 0x20000000000ull
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#define PPC_OPCODE_POWER9 0x20000000000ull
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/* Opcode is supported by Vector-Scalar (VSX) Unit from ISA 2.08. */
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#define PPC_OPCODE_VSX3 0x40000000000ull
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/* Opcode is supported by e200z4. */
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/* Opcode is supported by e200z4. */
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#define PPC_OPCODE_E200Z4 0x80000000000ull
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#define PPC_OPCODE_E200Z4 0x80000000000ull
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@ -1,8 +1,11 @@
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2017-04-11 Alan Modra <amodra@gmail.com>
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2017-04-11 Alan Modra <amodra@gmail.com>
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* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_ALTIVEC2.
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* ppc-dis.c (ppc_opts): Remove PPC_OPCODE_ALTIVEC2 and
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PPC_OPCODE_VSX3.
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* ppc-opc.c (PPCVEC2): Define as PPC_OPCODE_POWER8|PPC_OPCODE_E6500.
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* ppc-opc.c (PPCVEC2): Define as PPC_OPCODE_POWER8|PPC_OPCODE_E6500.
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(PPCVEC3): Define as PPC_OPCODE_POWER9.
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(PPCVEC3): Define as PPC_OPCODE_POWER9.
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(PPCVSX2): Define as PPC_OPCODE_POWER8.
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(PPCVSX3): Define as PPC_OPCODE_POWER9.
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2017-04-10 Alan Modra <amodra@gmail.com>
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2017-04-10 Alan Modra <amodra@gmail.com>
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@ -177,8 +177,7 @@ struct ppc_mopt ppc_opts[] = {
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{ "power9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
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{ "power9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
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| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
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| PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC
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| PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
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| PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ),
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0 },
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0 },
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{ "ppc", PPC_OPCODE_PPC,
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{ "ppc", PPC_OPCODE_PPC,
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0 },
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0 },
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@ -221,8 +220,7 @@ struct ppc_mopt ppc_opts[] = {
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{ "pwr9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
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{ "pwr9", (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
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| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
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| PPC_OPCODE_POWER7 | PPC_OPCODE_POWER8 | PPC_OPCODE_POWER9
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| PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC
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| PPC_OPCODE_HTM | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX),
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| PPC_OPCODE_VSX | PPC_OPCODE_VSX3 ),
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0 },
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0 },
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{ "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
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{ "pwrx", PPC_OPCODE_POWER | PPC_OPCODE_POWER2,
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0 },
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0 },
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@ -3092,8 +3092,8 @@ extract_vleil (unsigned long insn,
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#define PPCVEC2 (PPC_OPCODE_POWER8 | PPC_OPCODE_E6500)
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#define PPCVEC2 (PPC_OPCODE_POWER8 | PPC_OPCODE_E6500)
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#define PPCVEC3 PPC_OPCODE_POWER9
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#define PPCVEC3 PPC_OPCODE_POWER9
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#define PPCVSX PPC_OPCODE_VSX
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#define PPCVSX PPC_OPCODE_VSX
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#define PPCVSX2 PPC_OPCODE_VSX
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#define PPCVSX2 PPC_OPCODE_POWER8
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#define PPCVSX3 PPC_OPCODE_VSX3
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#define PPCVSX3 PPC_OPCODE_POWER9
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#define POWER PPC_OPCODE_POWER
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#define POWER PPC_OPCODE_POWER
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#define POWER2 PPC_OPCODE_POWER | PPC_OPCODE_POWER2
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#define POWER2 PPC_OPCODE_POWER | PPC_OPCODE_POWER2
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#define PWR2COM PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_COMMON
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#define PWR2COM PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_COMMON
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