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Test switching between SPI/SPU.

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This commit is contained in:
Andrew Cagney
1998-02-13 05:19:02 +00:00
parent d04b9852c0
commit 93c6a010dc
4 changed files with 29 additions and 0 deletions
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5
sim/testsuite/d10v-elf/ChangeLog
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@ -1,3 +1,8 @@
Fri Feb 13 16:21:13 1998 Andrew Cagney <cagney@b1.cygnus.com>
* t-sp.s: New test.
* Makefile.in (TESTS): Update.
Wed Feb 11 17:58:50 1998 Andrew Cagney <cagney@b1.cygnus.com> Wed Feb 11 17:58:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
* t-macros.i: Update trap calls, func in r4, args in * t-macros.i: Update trap calls, func in r4, args in

2
sim/testsuite/d10v-elf/Makefile.in
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@ -48,6 +48,8 @@ TESTS = \
t-rac.ok \ t-rac.ok \
t-rachi.ok \ t-rachi.ok \
t-rep.ok \ t-rep.ok \
t-rte.ok \
t-sp.ok \
t-sub2w.ok \ t-sub2w.ok \
t-sub.ok \ t-sub.ok \
t-subi.ok \ t-subi.ok \

17
sim/testsuite/d10v-elf/t-sp.s Normal file
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@ -0,0 +1,17 @@
.include "t-macros.i"
start
;;; Read/Write values to SPU/SPI
loadpsw2 0
ldi sp, 0xdead
loadpsw2 PSW_SM
ldi sp, 0xbeef
loadpsw2 0
check 1 sp 0xdead
loadpsw2 PSW_SM
check 2 sp 0xbeef
exit0

5
sim/testsuite/d10v-elf/t-trap.s Normal file
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@ -0,0 +1,5 @@
.include "t-macros.i"
start
exit47