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[gas][aarch64] Armv8.6-a option [1/X]

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Hi,

This patch is part of a series that adds support for Armv8.6-A
to binutils.
This first patch adds the Armv8.6-A flag to binutils.
No instructions are behind it at the moment.

Commited on behalf of Mihail Ionescu.

gas/ChangeLog:

2019-11-07  Mihail Ionescu  <mihail.ionescu@arm.com>
2019-11-07  Matthew Malcomson  <matthew.malcomson@arm.com>

	* config/tc-aarch64.c (armv8.6-a): New arch.
	* doc/c-aarch64.texi (armv8.6-a): Document new arch.

include/ChangeLog:

2019-11-07  Mihail Ionescu  <mihail.ionescu@arm.com>
2019-11-07  Matthew Malcomson  <matthew.malcomson@arm.com>

	* opcode/aarch64.h (AARCH64_FEATURE_V8_6): New.
	(AARCH64_ARCH_V8_6): New.

opcodes/ChangeLog:

2019-11-07  Mihail Ionescu  <mihail.ionescu@arm.com>
2019-11-07  Matthew Malcomson  <matthew.malcomson@arm.com>

	* aarch64-tbl.h (ARMV8_6): New macro.

Is it ok for trunk?

Regards,
Mihail
This commit is contained in:
Matthew Malcomson
2019-11-07 16:18:51 +00:00
parent e264b5b7a5
commit 8ae2d3d9ea
7 changed files with 25 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
gas/ChangeLog
View File

@ -1,3 +1,9 @@
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-aarch64.c (armv8.6-a): New arch.
* doc/c-aarch64.texi (armv8.6-a): Document new arch.
2019-11-07 Jan Beulich <jbeulich@suse.com>
* config/tc-i386.c (cpu_arch): Add .rdpru and .mcommit entries.

1
gas/config/tc-aarch64.c
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@ -8918,6 +8918,7 @@ static const struct aarch64_arch_option_table aarch64_archs[] = {
{"armv8.3-a", AARCH64_ARCH_V8_3},
{"armv8.4-a", AARCH64_ARCH_V8_4},
{"armv8.5-a", AARCH64_ARCH_V8_5},
{"armv8.6-a", AARCH64_ARCH_V8_6},
{NULL, AARCH64_ARCH_NONE}
};

2
gas/doc/c-aarch64.texi
View File

@ -100,7 +100,7 @@ issue an error message if an attempt is made to assemble an
instruction which will not execute on the target architecture. The
following architecture names are recognized: @code{armv8-a},
@code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a}
and @code{armv8.5-a}.
@code{armv8.5-a}, and @code{armv8.6-a}.
If both @option{-mcpu} and @option{-march} are specified, the
assembler will use the setting for @option{-mcpu}. If neither are

6
include/ChangeLog
View File

@ -1,3 +1,9 @@
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_V8_6): New.
(AARCH64_ARCH_V8_6): New.
2019-11-07 Alan Modra <amodra@gmail.com>
* elf/cr16c.h: Delete.

4
include/opcode/aarch64.h
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@ -63,6 +63,7 @@ typedef uint32_t aarch64_insn;
#define AARCH64_FEATURE_DOTPROD 0x080000000 /* Dot Product instructions. */
#define AARCH64_FEATURE_F16_FML 0x1000000000ULL /* v8.2 FP16FML ins. */
#define AARCH64_FEATURE_V8_5 0x2000000000ULL /* ARMv8.5 processors. */
#define AARCH64_FEATURE_V8_6 0x00000002 /* ARMv8.6 processors. */
/* Flag Manipulation insns. */
#define AARCH64_FEATURE_FLAGMANIP 0x4000000000ULL
@ -129,7 +130,8 @@ typedef uint32_t aarch64_insn;
| AARCH64_FEATURE_SCXTNUM \
| AARCH64_FEATURE_ID_PFR2 \
| AARCH64_FEATURE_SSBS)
#define AARCH64_ARCH_V8_6 AARCH64_FEATURE (AARCH64_ARCH_V8_5, \
AARCH64_FEATURE_V8_6)
#define AARCH64_ARCH_NONE AARCH64_FEATURE (0, 0)
#define AARCH64_ANY AARCH64_FEATURE (-1, 0) /* Any basic core. */

5
opcodes/ChangeLog
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@ -1,3 +1,8 @@
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
2019-11-07 Matthew Malcomson <matthew.malcomson@arm.com>
* aarch64-tbl.h (ARMV8_6): New macro.
2019-11-07 Jan Beulich <jbeulich@suse.com>
* i386-dis.c (prefix_table): Add mcommit.

3
opcodes/aarch64-tbl.h
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@ -2343,6 +2343,8 @@ static const aarch64_feature_set aarch64_feature_sve2sm4 =
AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SVE2_SM4, 0);
static const aarch64_feature_set aarch64_feature_sve2bitperm =
AARCH64_FEATURE (AARCH64_FEATURE_SVE2 | AARCH64_FEATURE_SVE2_BITPERM, 0);
static const aarch64_feature_set aarch64_feature_v8_6 =
AARCH64_FEATURE (AARCH64_FEATURE_V8_6, 0);
#define CORE &aarch64_feature_v8
@ -2384,6 +2386,7 @@ static const aarch64_feature_set aarch64_feature_sve2bitperm =
#define SVE2_SHA3 &aarch64_feature_sve2sha3
#define SVE2_SM4 &aarch64_feature_sve2sm4
#define SVE2_BITPERM &aarch64_feature_sve2bitperm
#define ARMV8_6 &aarch64_feature_v8_6
#define CORE_INSN(NAME,OPCODE,MASK,CLASS,OP,OPS,QUALS,FLAGS) \
{ NAME, OPCODE, MASK, CLASS, OP, CORE, OPS, QUALS, FLAGS, 0, 0, NULL }