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[AArch64][SVE 17/32] Add a prefix parameter to print_register_list

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This patch generalises the interface to print_register_list so
that it can print register lists involving SVE z registers as
well as AdvSIMD v ones.

opcodes/
	* aarch64-opc.c (print_register_list): Add a prefix parameter.
	(aarch64_print_operand): Update accordingly.
This commit is contained in:
Richard Sandiford
2016-09-21 16:51:30 +01:00
parent aa2aa4c694
commit 8a7f0c1b5a
2 changed files with 21 additions and 13 deletions
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5
opcodes/ChangeLog
View File

@ -1,3 +1,8 @@
2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
* aarch64-opc.c (print_register_list): Add a prefix parameter.
(aarch64_print_operand): Update accordingly.
2016-09-21 Richard Sandiford <richard.sandiford@arm.com> 2016-09-21 Richard Sandiford <richard.sandiford@arm.com>
* aarch64-tbl.h (AARCH64_OPERNADS): Use fpimm rather than imm * aarch64-tbl.h (AARCH64_OPERNADS): Use fpimm rather than imm

29
opcodes/aarch64-opc.c
View File

@ -2261,9 +2261,11 @@ expand_fp_imm (int size, uint32_t imm8)
} }
/* Produce the string representation of the register list operand *OPND /* Produce the string representation of the register list operand *OPND
in the buffer pointed by BUF of size SIZE. */ in the buffer pointed by BUF of size SIZE. PREFIX is the part of
the register name that comes before the register number, such as "v". */
static void static void
print_register_list (char *buf, size_t size, const aarch64_opnd_info *opnd) print_register_list (char *buf, size_t size, const aarch64_opnd_info *opnd,
const char *prefix)
{ {
const int num_regs = opnd->reglist.num_regs; const int num_regs = opnd->reglist.num_regs;
const int first_reg = opnd->reglist.first_regno; const int first_reg = opnd->reglist.first_regno;
@ -2284,8 +2286,8 @@ print_register_list (char *buf, size_t size, const aarch64_opnd_info *opnd)
more than two registers in the list, and the register numbers more than two registers in the list, and the register numbers
are monotonically increasing in increments of one. */ are monotonically increasing in increments of one. */
if (num_regs > 2 && last_reg > first_reg) if (num_regs > 2 && last_reg > first_reg)
snprintf (buf, size, "{v%d.%s-v%d.%s}%s", first_reg, qlf_name, snprintf (buf, size, "{%s%d.%s-%s%d.%s}%s", prefix, first_reg, qlf_name,
last_reg, qlf_name, tb); prefix, last_reg, qlf_name, tb);
else else
{ {
const int reg0 = first_reg; const int reg0 = first_reg;
@ -2296,20 +2298,21 @@ print_register_list (char *buf, size_t size, const aarch64_opnd_info *opnd)
switch (num_regs) switch (num_regs)
{ {
case 1: case 1:
snprintf (buf, size, "{v%d.%s}%s", reg0, qlf_name, tb); snprintf (buf, size, "{%s%d.%s}%s", prefix, reg0, qlf_name, tb);
break; break;
case 2: case 2:
snprintf (buf, size, "{v%d.%s, v%d.%s}%s", reg0, qlf_name, snprintf (buf, size, "{%s%d.%s, %s%d.%s}%s", prefix, reg0, qlf_name,
reg1, qlf_name, tb); prefix, reg1, qlf_name, tb);
break; break;
case 3: case 3:
snprintf (buf, size, "{v%d.%s, v%d.%s, v%d.%s}%s", reg0, qlf_name, snprintf (buf, size, "{%s%d.%s, %s%d.%s, %s%d.%s}%s",
reg1, qlf_name, reg2, qlf_name, tb); prefix, reg0, qlf_name, prefix, reg1, qlf_name,
prefix, reg2, qlf_name, tb);
break; break;
case 4: case 4:
snprintf (buf, size, "{v%d.%s, v%d.%s, v%d.%s, v%d.%s}%s", snprintf (buf, size, "{%s%d.%s, %s%d.%s, %s%d.%s, %s%d.%s}%s",
reg0, qlf_name, reg1, qlf_name, reg2, qlf_name, prefix, reg0, qlf_name, prefix, reg1, qlf_name,
reg3, qlf_name, tb); prefix, reg2, qlf_name, prefix, reg3, qlf_name, tb);
break; break;
} }
} }
@ -2513,7 +2516,7 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc,
case AARCH64_OPND_LVt: case AARCH64_OPND_LVt:
case AARCH64_OPND_LVt_AL: case AARCH64_OPND_LVt_AL:
case AARCH64_OPND_LEt: case AARCH64_OPND_LEt:
print_register_list (buf, size, opnd); print_register_list (buf, size, opnd, "v");
break; break;
case AARCH64_OPND_Cn: case AARCH64_OPND_Cn: