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sim: move MACH/MODEL types into SIM_xxx namespace

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The "MACH" and "MODEL" names are a bit generic and collide with symbols
used by other sections of code (like h8300's opcodes).  Since these are
sim-specific types, they really should have a "SIM_" prefix.
This commit is contained in:
Mike Frysinger
2015-12-25 04:12:55 -05:00
parent 91d6df784d
commit 8a0ebee658
33 changed files with 172 additions and 116 deletions
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7
sim/sh64/ChangeLog
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@ -1,3 +1,10 @@
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* arch.c: Rename MACH to SIM_MACH.
* cpuall.h: Likewise.
* sh64.c: Rename MACH to SIM_MACH, MACH_IMP_PROPERTIES to
SIM_MACH_IMP_PROPERTIES, and MODEL to SIM_MODEL.
2015-12-25 Mike Frysinger <vapier@gentoo.org>
* sim-main.h (WITH_SCACHE_PBB): Move from ...

2
sim/sh64/arch.c
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@ -24,7 +24,7 @@ This file is part of the GNU simulators.
#include "sim-main.h"
#include "bfd.h"
const MACH *sim_machs[] =
const SIM_MACH *sim_machs[] =
{
#ifdef HAVE_CPU_SH64
& sh2_mach,

24
sim/sh64/cpuall.h
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@ -32,18 +32,18 @@ This file is part of the GNU simulators.
#include "decode.h"
#endif
extern const MACH sh2_mach;
extern const MACH sh2e_mach;
extern const MACH sh2a_fpu_mach;
extern const MACH sh2a_nofpu_mach;
extern const MACH sh3_mach;
extern const MACH sh3e_mach;
extern const MACH sh4_nofpu_mach;
extern const MACH sh4_mach;
extern const MACH sh4a_nofpu_mach;
extern const MACH sh4a_mach;
extern const MACH sh4al_mach;
extern const MACH sh5_mach;
extern const SIM_MACH sh2_mach;
extern const SIM_MACH sh2e_mach;
extern const SIM_MACH sh2a_fpu_mach;
extern const SIM_MACH sh2a_nofpu_mach;
extern const SIM_MACH sh3_mach;
extern const SIM_MACH sh3e_mach;
extern const SIM_MACH sh4_nofpu_mach;
extern const SIM_MACH sh4_mach;
extern const SIM_MACH sh4a_nofpu_mach;
extern const SIM_MACH sh4a_mach;
extern const SIM_MACH sh4al_mach;
extern const SIM_MACH sh5_mach;
#ifndef WANT_CPU
/* The ARGBUF struct. */

28
sim/sh64/sh64.c
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@ -1030,7 +1030,7 @@ sh64_model_init()
/* Do nothing. */
}
static const MODEL sh_models [] =
static const SIM_MODEL sh_models [] =
{
{ "sh2", & sh2_mach, MODEL_SH5, NULL, sh64_model_init },
{ "sh2e", & sh2e_mach, MODEL_SH5, NULL, sh64_model_init },
@ -1047,7 +1047,7 @@ static const MODEL sh_models [] =
{ 0 }
};
static const MACH_IMP_PROPERTIES sh5_imp_properties =
static const SIM_MACH_IMP_PROPERTIES sh5_imp_properties =
{
sizeof (SIM_CPU),
#if WITH_SCACHE
@ -1057,7 +1057,7 @@ static const MACH_IMP_PROPERTIES sh5_imp_properties =
#endif
};
const MACH sh2_mach =
const SIM_MACH sh2_mach =
{
"sh2", "sh2", MACH_SH5,
16, 16, &sh_models[0], &sh5_imp_properties,
@ -1065,7 +1065,7 @@ const MACH sh2_mach =
sh64_prepare_run
};
const MACH sh2e_mach =
const SIM_MACH sh2e_mach =
{
"sh2e", "sh2e", MACH_SH5,
16, 16, &sh_models[1], &sh5_imp_properties,
@ -1073,7 +1073,7 @@ const MACH sh2e_mach =
sh64_prepare_run
};
const MACH sh2a_fpu_mach =
const SIM_MACH sh2a_fpu_mach =
{
"sh2a", "sh2a", MACH_SH5,
16, 16, &sh_models[2], &sh5_imp_properties,
@ -1081,7 +1081,7 @@ const MACH sh2a_fpu_mach =
sh64_prepare_run
};
const MACH sh2a_nofpu_mach =
const SIM_MACH sh2a_nofpu_mach =
{
"sh2a_nofpu", "sh2a_nofpu", MACH_SH5,
16, 16, &sh_models[3], &sh5_imp_properties,
@ -1089,7 +1089,7 @@ const MACH sh2a_nofpu_mach =
sh64_prepare_run
};
const MACH sh3_mach =
const SIM_MACH sh3_mach =
{
"sh3", "sh3", MACH_SH5,
16, 16, &sh_models[4], &sh5_imp_properties,
@ -1097,7 +1097,7 @@ const MACH sh3_mach =
sh64_prepare_run
};
const MACH sh3e_mach =
const SIM_MACH sh3e_mach =
{
"sh3e", "sh3e", MACH_SH5,
16, 16, &sh_models[5], &sh5_imp_properties,
@ -1105,7 +1105,7 @@ const MACH sh3e_mach =
sh64_prepare_run
};
const MACH sh4_mach =
const SIM_MACH sh4_mach =
{
"sh4", "sh4", MACH_SH5,
16, 16, &sh_models[6], &sh5_imp_properties,
@ -1113,7 +1113,7 @@ const MACH sh4_mach =
sh64_prepare_run
};
const MACH sh4_nofpu_mach =
const SIM_MACH sh4_nofpu_mach =
{
"sh4_nofpu", "sh4_nofpu", MACH_SH5,
16, 16, &sh_models[7], &sh5_imp_properties,
@ -1121,7 +1121,7 @@ const MACH sh4_nofpu_mach =
sh64_prepare_run
};
const MACH sh4a_mach =
const SIM_MACH sh4a_mach =
{
"sh4a", "sh4a", MACH_SH5,
16, 16, &sh_models[8], &sh5_imp_properties,
@ -1129,7 +1129,7 @@ const MACH sh4a_mach =
sh64_prepare_run
};
const MACH sh4a_nofpu_mach =
const SIM_MACH sh4a_nofpu_mach =
{
"sh4a_nofpu", "sh4a_nofpu", MACH_SH5,
16, 16, &sh_models[9], &sh5_imp_properties,
@ -1137,7 +1137,7 @@ const MACH sh4a_nofpu_mach =
sh64_prepare_run
};
const MACH sh4al_mach =
const SIM_MACH sh4al_mach =
{
"sh4al", "sh4al", MACH_SH5,
16, 16, &sh_models[10], &sh5_imp_properties,
@ -1145,7 +1145,7 @@ const MACH sh4al_mach =
sh64_prepare_run
};
const MACH sh5_mach =
const SIM_MACH sh5_mach =
{
"sh5", "sh5", MACH_SH5,
32, 32, &sh_models[11], &sh5_imp_properties,