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* build / debug improvements for gx JIT sim prototype

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This commit is contained in:
Frank Ch. Eigler
1998-12-30 18:30:48 +00:00
parent 32ac892aab
commit 86df8e79fc
4 changed files with 23 additions and 3 deletions
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8
sim/m32r-gx/ChangeLog
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@ -1,3 +1,11 @@
1998-12-30 Frank Ch. Eigler <fche@elastic.org>
* cpuall.h: Don't include sim-model.h.
* gx-translate.c (m32r_emit_short_insn): Emit a PC trace on stdout
if $GX_TRACE is set.
(m32r_emit_long_insn): Ditto.
* sim-main.h: #undef some newly imported macros from cgen headers.
1998-12-05 Frank Ch. Eigler <fche@elastic.org> 1998-12-05 Frank Ch. Eigler <fche@elastic.org>
* gx-translate.c (m32r_emit_short_insn): Correct ABI result * gx-translate.c (m32r_emit_short_insn): Correct ABI result

2
sim/m32r-gx/cpuall.h
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@ -1,2 +1,2 @@
#include "sim-cpu.h" #include "sim-cpu.h"
#include "sim-model.h" /* #include "sim-model.h" */

12
sim/m32r-gx/gx-translate.c
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@ -435,7 +435,11 @@ m32r_emit_long_insn(sim_gx_block* gx, PCADDR pc, unsigned insn, int optimized)
ASSERT(f != NULL); ASSERT(f != NULL);
/* fprintf(f, " printf(\"0x%06x\\n\");\n", pc); */ /* force PC trace by environment variable */
#ifdef HAVE_GETENV
if(getenv("GX_TRACE"))
fprintf(f, " printf(\"0x%06x\\n\");\n", pc);
#endif
if(op1 == 0x8 && op2 == 0x4 && r1 == 0) if(op1 == 0x8 && op2 == 0x4 && r1 == 0)
{ {
@ -836,7 +840,11 @@ m32r_emit_short_insn(sim_gx_block* gx, PCADDR pc, unsigned insn, int optimized)
ASSERT(f != NULL); ASSERT(f != NULL);
/* fprintf(f, " printf(\"0x%06x\\n\");\n", pc); */ /* force PC trace by environment variable */
#ifdef HAVE_GETENV
if(getenv("GX_TRACE"))
fprintf(f, " printf(\"0x%06x\\n\");\n", pc);
#endif
if(0) if(0)
; /* place holder */ ; /* place holder */

4
sim/m32r-gx/sim-main.h
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@ -14,7 +14,11 @@ typedef struct _sim_cpu SIM_CPU;
#include "ansidecl.h" #include "ansidecl.h"
#include "symcat.h" #include "symcat.h"
#include "cgen-types.h" #include "cgen-types.h"
#undef SIM_HAVE_MODEL
#undef SIM_HAVE_ADDR_RANGE
#include "arch.h" #include "arch.h"
#include "sim-basics.h" #include "sim-basics.h"