espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-21 10:34:21 +08:00
Code Issues Packages Projects Releases Wiki Activity

Update tests to match recently modified ABI

Browse Source
This commit is contained in:
Andrew Cagney
1998-02-11 07:12:48 +00:00
parent b41dff6b54
commit 86b46474fd
2 changed files with 46 additions and 16 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
sim/testsuite/d10v-elf/ChangeLog
View File

@ -1,5 +1,16 @@
Wed Feb 11 17:58:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
* t-macros.i: Update trap calls, func in r4, args in
r0...
(start): Force r0 to zero.
* t-sub2w.s: Ditto.
Tue Dec 9 10:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com> Tue Dec 9 10:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com>
* t-rte.s (success): New file.
* Makefile.in: Update.
* t-rep.s: Check rep repeats correct number of times. * t-rep.s: Check rep repeats correct number of times.
Fri Dec 5 10:11:18 1997 Andrew Cagney <cagney@b1.cygnus.com> Fri Dec 5 10:11:18 1997 Andrew Cagney <cagney@b1.cygnus.com>

51
sim/testsuite/d10v-elf/t-macros.i
View File

@ -3,19 +3,20 @@
.align 2 .align 2
.globl _start .globl _start
_start: _start:
ldi r0, 0
.endm .endm
.macro exit47 .macro exit47
ldi r6, 1 ldi r4, 1
ldi r2, 47 ldi r0, 47
trap 15 trap 15
.endm .endm
.macro exit0 .macro exit0
ldi r6, 1 ldi r4, 1
ldi r2, 0 ldi r0, 0
trap 15 trap 15
.endm .endm
@ -38,8 +39,8 @@ _start:
.macro check exit reg val .macro check exit reg val
cmpeqi \reg, #\val cmpeqi \reg, #\val
brf0t 1f brf0t 1f
0: ldi r6, 1 0: ldi r4, 1
ldi r2, \exit ldi r0, \exit
trap 15 trap 15
1: 1:
.endm .endm
@ -54,8 +55,8 @@ _start:
cmpeqi r2, #\lo cmpeqi r2, #\lo
brf0f 0f brf0f 0f
bra 2f bra 2f
0: ldi r6, 1 0: ldi r4, 1
ldi r2, \exit ldi r0, \exit
trap 15 trap 15
.data .data
.align 2 .align 2
@ -89,8 +90,8 @@ _start:
cmpeq r2, r3 cmpeq r2, r3
brf0f 0f brf0f 0f
bra 4f bra 4f
0: ldi r6, 1 0: ldi r4, 1
ldi r2, \exit ldi r0, \exit
trap 15 trap 15
4: 4:
.endm .endm
@ -106,8 +107,8 @@ _start:
mvfc r2, cr0 mvfc r2, cr0
cmpeqi r2, #\val cmpeqi r2, #\val
brf0t 1f brf0t 1f
ldi r6, 1 ldi r4, 1
ldi r2, \exit ldi r0, \exit
trap 15 trap 15
1: 1:
.endm .endm
@ -115,13 +116,31 @@ _start:
.macro hello .macro hello
;; 4:write (1, string, strlen (string)) ;; 4:write (1, string, strlen (string))
ldi r6, 4 ldi r4, 4
ldi r2, 1 ldi r0, 1
ldi r3, 1f ldi r1, 1f
ldi r4, 2f-1f-1 ldi r2, 2f-1f-1
trap 15 trap 15
.section .rodata .section .rodata
1: .string "Hello World!\n" 1: .string "Hello World!\n"
2: .align 2 2: .align 2
.text .text
.endm .endm
PSW_SM = 0x8000
PSW_01 = 0x4000
PSW_EA = 0x2000
PSW_DB = 0x1000
PSW_DM = 0x0800
PSW_IE = 0x0400
PSW_RP = 0x0200
PSW_MD = 0x0100
PSW_FX = 0x0080
PSW_ST = 0x0040
PSW_10 = 0x0020
PSW_11 = 0x0010
PSW_F0 = 0x0008
PSW_F1 = 0x0004
PSW_14 = 0x0002
PSW_C = 0x0001