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* config/bfin-parse.y (asm_1): Only PREG and DREG are allowed

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in comparison.

	testsuite/
	* gas/bfin/expected_comparison_errors.s: Add more cases.
	* gas/bfin/expected_comparison_errors.l: Update accordingly.
This commit is contained in:
Jie Zhang
2009-09-01 07:21:42 +00:00
parent 08c1b05642
commit 83ee431c60
5 changed files with 48 additions and 27 deletions
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5
gas/ChangeLog
View File

@ -1,3 +1,8 @@
2009-09-01 Jie Zhang <jie.zhang@analog.com>
* config/bfin-parse.y (asm_1): Only PREG and DREG are allowed
in comparison.
2009-09-01 Jie Zhang <jie.zhang@analog.com> 2009-09-01 Jie Zhang <jie.zhang@analog.com>
2007-09-28 Bernd Schmidt <bernd.schmidt@analog.com> 2007-09-28 Bernd Schmidt <bernd.schmidt@analog.com>

42
gas/config/bfin-parse.y
View File

@ -1623,16 +1623,20 @@ asm_1:
} }
| CCREG ASSIGN REG LESS_THAN REG iu_or_nothing | CCREG ASSIGN REG LESS_THAN REG iu_or_nothing
{ {
if (REG_CLASS($3) == REG_CLASS($5)) if ((IS_DREG ($3) && IS_DREG ($5))
|| (IS_PREG ($3) && IS_PREG ($5)))
{ {
notethat ("CCflag: CC = dpregs < dpregs\n"); notethat ("CCflag: CC = dpregs < dpregs\n");
$$ = CCFLAG (&$3, $5.regno & CODE_MASK, $6.r0, 0, IS_PREG ($3) ? 1 : 0); $$ = CCFLAG (&$3, $5.regno & CODE_MASK, $6.r0, 0, IS_PREG ($3) ? 1 : 0);
} }
else else
return yyerror ("Compare only of same register class"); return yyerror ("Bad register in comparison");
} }
| CCREG ASSIGN REG LESS_THAN expr iu_or_nothing | CCREG ASSIGN REG LESS_THAN expr iu_or_nothing
{ {
if (!IS_DREG ($3) && !IS_PREG ($3))
return yyerror ("Bad register in comparison");
if (($6.r0 == 1 && IS_IMM ($5, 3)) if (($6.r0 == 1 && IS_IMM ($5, 3))
|| ($6.r0 == 3 && IS_UIMM ($5, 3))) || ($6.r0 == 3 && IS_UIMM ($5, 3)))
{ {
@ -1644,16 +1648,20 @@ asm_1:
} }
| CCREG ASSIGN REG _ASSIGN_ASSIGN REG | CCREG ASSIGN REG _ASSIGN_ASSIGN REG
{ {
if (REG_CLASS($3) == REG_CLASS($5)) if ((IS_DREG ($3) && IS_DREG($5))
|| (IS_PREG ($3) && IS_PREG ($3)))
{ {
notethat ("CCflag: CC = dpregs == dpregs\n"); notethat ("CCflag: CC = dpregs == dpregs\n");
$$ = CCFLAG (&$3, $5.regno & CODE_MASK, 0, 0, IS_PREG ($3) ? 1 : 0); $$ = CCFLAG (&$3, $5.regno & CODE_MASK, 0, 0, IS_PREG ($3) ? 1 : 0);
} }
else else
return yyerror ("Compare only of same register class"); return yyerror ("Bad register in comparison");
} }
| CCREG ASSIGN REG _ASSIGN_ASSIGN expr | CCREG ASSIGN REG _ASSIGN_ASSIGN expr
{ {
if (!IS_DREG ($3) && !IS_PREG ($3))
return yyerror ("Bad register in comparison");
if (IS_IMM ($5, 3)) if (IS_IMM ($5, 3))
{ {
notethat ("CCflag: CC = dpregs == imm3\n"); notethat ("CCflag: CC = dpregs == imm3\n");
@ -1674,34 +1682,26 @@ asm_1:
} }
| CCREG ASSIGN REG _LESS_THAN_ASSIGN REG iu_or_nothing | CCREG ASSIGN REG _LESS_THAN_ASSIGN REG iu_or_nothing
{ {
if (REG_CLASS($3) == REG_CLASS($5)) if ((IS_DREG ($3) && IS_DREG ($5))
|| (IS_PREG ($3) && IS_PREG ($5)))
{ {
notethat ("CCflag: CC = pregs <= pregs (..)\n"); notethat ("CCflag: CC = dpregs <= dpregs (..)\n");
$$ = CCFLAG (&$3, $5.regno & CODE_MASK, $$ = CCFLAG (&$3, $5.regno & CODE_MASK,
1 + $6.r0, 0, IS_PREG ($3) ? 1 : 0); 1 + $6.r0, 0, IS_PREG ($3) ? 1 : 0);
} }
else else
return yyerror ("Compare only of same register class"); return yyerror ("Bad register in comparison");
} }
| CCREG ASSIGN REG _LESS_THAN_ASSIGN expr iu_or_nothing | CCREG ASSIGN REG _LESS_THAN_ASSIGN expr iu_or_nothing
{ {
if (!IS_DREG ($3) && !IS_PREG ($3))
return yyerror ("Bad register in comparison");
if (($6.r0 == 1 && IS_IMM ($5, 3)) if (($6.r0 == 1 && IS_IMM ($5, 3))
|| ($6.r0 == 3 && IS_UIMM ($5, 3))) || ($6.r0 == 3 && IS_UIMM ($5, 3)))
{ {
if (IS_DREG ($3)) notethat ("CCflag: CC = dpregs <= (u)imm3\n");
{ $$ = CCFLAG (&$3, imm3 ($5), 1 + $6.r0, 1, IS_PREG ($3) ? 1 : 0);
notethat ("CCflag: CC = dregs <= (u)imm3\n");
/* x y opc I G */
$$ = CCFLAG (&$3, imm3 ($5), 1 + $6.r0, 1, 0);
}
else if (IS_PREG ($3))
{
notethat ("CCflag: CC = pregs <= (u)imm3\n");
/* x y opc I G */
$$ = CCFLAG (&$3, imm3 ($5), 1 + $6.r0, 1, 1);
}
else
return yyerror ("Dreg or Preg expected");
} }
else else
return yyerror ("Bad constant value"); return yyerror ("Bad constant value");

5
gas/testsuite/ChangeLog
View File

@ -1,3 +1,8 @@
2009-09-01 Jie Zhang <jie.zhang@analog.com>
* gas/bfin/expected_comparison_errors.s: Add more cases.
* gas/bfin/expected_comparison_errors.l: Update accordingly.
2009-09-01 Jie Zhang <jie.zhang@analog.com> 2009-09-01 Jie Zhang <jie.zhang@analog.com>
* gas/bfin/stack2.s: Add pop multiple instruction with a label * gas/bfin/stack2.s: Add pop multiple instruction with a label

17
gas/testsuite/gas/bfin/expected_comparison_errors.l
View File

@ -8,9 +8,14 @@
.*:7: Error: AREGs are in bad order or same. Input text was a0. .*:7: Error: AREGs are in bad order or same. Input text was a0.
.*:8: Error: AREGs are in bad order or same. Input text was a1. .*:8: Error: AREGs are in bad order or same. Input text was a1.
.*:9: Error: AREGs are in bad order or same. Input text was a0. .*:9: Error: AREGs are in bad order or same. Input text was a0.
.*:10: Error: Compare only of same register class. Input text was P0. .*:10: Error: Bad register in comparison. Input text was P0.
.*:11: Error: Compare only of same register class. .*:11: Error: Bad register in comparison.
.*:12: Error: Compare only of same register class. .*:12: Error: Bad register in comparison.
.*:13: Error: Compare only of same register class. Input text was R0. .*:14: Error: Bad register in comparison.
.*:14: Error: Compare only of same register class. .*:15: Error: Bad register in comparison.
.*:15: Error: Compare only of same register class. .*:16: Error: Bad register in comparison.
.*:17: Error: Bad register in comparison. Input text was I0.
.*:18: Error: Bad register in comparison.
.*:19: Error: Bad register in comparison.
.*:20: Error: Bad register in comparison.
.*:21: Error: Bad register in comparison.

6
gas/testsuite/gas/bfin/expected_comparison_errors.s
View File

@ -13,3 +13,9 @@
CC = P0 == R0; CC = P0 == R0;
CC = P0 < R0; CC = P0 < R0;
CC = P0 <= R0; CC = P0 <= R0;
CC = I0 == 0;
CC = I0 == I0;
CC = I0 < 0;
CC = I0 < I0;
CC = I0 <= 0;
CC = I0 <= I0;